Zhewen Yu

33 papers A 2B 4C 2Misc 2Journal 13Unranked 10
YearRankTypeTitle / Venue / Authors
2026 — conf
26.5 An Inductor-at-Middle Hybrid Buck Converter with Shared Power-Signal Path for Distributed Vertical Power Delivery.
ISSCC
Zhongyao Zhu, Junwei Huang, Zhibang Song, Zhewen Yu, Shousheng Han, Sai-Weng Sin, Yan Lu
2026 — conf
A Compact Dual-Capacitor Relay SPT Supply Modulator with Overshoot-Free Adaptive on-Time Control for 5G FR2 CMOS PA.
ISSCC
Zhewen Yu, Zhiguo Tong, Junwei Huang, Jun Yin, Yan Lu
2025 — conf
21.9 A 20MHz & 1MHz Dual-Loop Non-Uniform-Multi-Inductor Hybrid DC-DC Converter with Specified Inductor Current Allocation and Fast Transient Response.
ISSCC
Junwei Huang, Xiangyu Mao, Zhiguo Tong, Zhewen Yu, Wenjie Yang, Chi-Seng Lam, Rui Paulo Martins, Yan Lu
2025 — conf
Align²LLaVA: Cascaded Human and Large Language Model Preference Alignment for Multi-modal Instruction Curation.
ACL (Findings)
Hongzhe Huang, Jiang Liu, Zhewen Yu, Li Cai, Dian Jiao, Wenqiao Zhang, Siliang Tang, Juncheng Li, Hao Jiang, Haoyuan Li, Yueting Zhuang
2025 C conf
An Always Dual-Path Hybrid DC-DC Converter with Multiphase Interleaving Switched-Capacitor Cell Obtaining 45% Output Ripple Reduction.
ISCAS
Zhewen Yu, Junwei Huang, Zhiguo Tong, Mo Huang, Rui Paulo Martins, Yan Lu
2025 J jnl
From Loop Nests to Silicon: Mapping AI Workloads onto AMD NPUs with MLIR-AIR.
CoRR
Erwei Wang, Samuel Bayliss, Andra Bisca, Zachary Blair, Sangeeta Chowdhary, Kristof Denolf, Jeff Fifield, Brandon Freiberger, Erika Hunhoff, Phil James-Roxby, Jack Lo, Joseph Melber, Stephen Neuendorffer, Eddie Richter, Andre Roesti, Javier Setoain, Gagandeep Singh, Endri Taka, Pranathi Vasireddy, Zhewen Yu, Niansong Zhang, Jinming Zhuang
2025 — conf
HOOP: A Scalable Hybrid DC-DC Converter Ring for High-Performance Computing.
ISSCC
Zhiguo Tong, Zhewen Yu, Junwei Huang, Xiangyu Mao, Bernhard Wicht, Rui Paulo Martins, Yan Lu
2025 Misc conf
ITERA-LLM: Boosting Sub-8-Bit Large Language Model Inference via Iterative Tensor Decomposition.
FCCM
Yinting Huang, Keran Zheng, Zhewen Yu, Christos-Savvas Bouganis
2025 J jnl
ITERA-LLM: Boosting Sub-8-Bit Large Language Model Inference via Iterative Tensor Decomposition.
CoRR
Keran Zheng, Yinting Huang, Zhewen Yu, Christos-Savvas Bouganis
2024 J jnl
Align
CoRR
Hongzhe Huang, Zhewen Yu, Jiang Liu, Li Cai, Dian Jiao, Wenqiao Zhang, Siliang Tang, Juncheng Li, Hao Jiang, Haoyuan Li, Yueting Zhuang
2024 A conf
Auto WS: Automate Weights Streaming in Layer-Wise Pipelined DNN Accelerators.
DATE
Zhewen Yu, Christos-Savvas Bouganis
2024 J jnl
Cascading Time-Frequency Transformer and Spatio-Temporal Graph Attention Network for Rotating Machinery Fault Diagnosis.
IEEE Trans. Instrum. Meas.
Yiqi Liu, Zhewen Yu, Min Xie
2024 B conf
HASS: Hardware-Aware Sparsity Search for Dataflow DNN Accelerator.
FPL
Zhewen Yu, Sudarshan Sreeram, Krish Agrawal, Junyi Wu, Alexander Montgomerie-Corcoran, Cheng Zhang, Jianyi Cheng, Christos-Savvas Bouganis, Yiren Zhao
2024 J jnl
HASS: Hardware-Aware Sparsity Search for Dataflow DNN Accelerator.
CoRR
Zhewen Yu, Sudarshan Sreeram, Krish Agrawal, Junyi Wu, Alexander Montgomerie-Corcoran, Cheng Zhang, Jianyi Cheng, Christos-Savvas Bouganis, Yiren Zhao
2024 C conf
Prediction of Subharmonic Oscillation in SIMO DC-DC Converter with Ordered Power Distributive Control in CCM and Peak Current Mode.
ISCAS
Zhewen Yu, Fangyu Mao, Yan Lu
2024 Misc conf
SMOF: Streaming Modern CNNs on FPGAs with Smart Off-Chip Eviction.
FCCM
Petros Toupas, Zhewen Yu, Christos-Savvas Bouganis, Dimitrios Tzovaras
2024 J jnl
SMOF: Streaming Modern CNNs on FPGAs with Smart Off-Chip Eviction.
CoRR
Petros Toupas, Zhewen Yu, Christos-Savvas Bouganis, Dimitrios Tzovaras
2023 J jnl
AutoWS: Automate Weights Streaming in Layer-wise Pipelined DNN Accelerators.
CoRR
Zhewen Yu, Christos-Savvas Bouganis
2023 J jnl
Fast Prototyping Next-Generation Accelerators for New ML Models using MASE: ML Accelerator System Exploration.
CoRR
Jianyi Cheng, Cheng Zhang, Zhewen Yu, Alexander Montgomerie-Corcoran, Can Xiao, Christos-Savvas Bouganis, Yiren Zhao
2023 B conf
Mixed-TD: Efficient Neural Network Accelerator with Layer-Specific Tensor Decomposition.
FPL
Zhewen Yu, Christos-Savvas Bouganis
2023 J jnl
Mixed-TD: Efficient Neural Network Accelerator with Layer-Specific Tensor Decomposition.
CoRR
Zhewen Yu, Christos-Savvas Bouganis
2023 B conf
PASS: Exploiting Post-Activation Sparsity in Streaming Architectures for CNN Acceleration.
FPL
Alexander Montgomerie-Corcoran, Zhewen Yu, Jianyi Cheng, Christos-Savvas Bouganis
2023 J jnl
PASS: Exploiting Post-Activation Sparsity in Streaming Architectures for CNN Acceleration.
CoRR
Alexander Montgomerie-Corcoran, Zhewen Yu, Jianyi Cheng, Christos-Savvas Bouganis
2023 — conf
SATAY: A Streaming Architecture Toolflow for Accelerating YOLO Models on FPGA Devices.
ICFPT
Alexander Montgomerie-Corcoran, Petros Toupas, Zhewen Yu, Christos-Savvas Bouganis
2023 J jnl
SATAY: A Streaming Architecture Toolflow for Accelerating YOLO Models on FPGA Devices.
CoRR
Alexander Montgomerie-Corcoran, Petros Toupas, Zhewen Yu, Christos-Savvas Bouganis
2023 A conf
SVD-NAS: Coupling Low-Rank Approximation and Neural Architecture Search.
WACV
Zhewen Yu, Christos-Savvas Bouganis
2022 — conf
Dual-Encoder Transformers with Cross-modal Alignment for Multimodal Aspect-based Sentiment Analysis.
AACL/IJCNLP (1)
Zhewen Yu, Jin Wang, Liang-Chih Yu, Xuejie Zhang
2022 B conf
SAMO: Optimised Mapping of Convolutional Neural Networks to Streaming Architectures.
FPL
Alexander Montgomerie-Corcoran, Zhewen Yu, Christos-Savvas Bouganis
2022 J jnl
SVD-NAS: Coupling Low-Rank Approximation and Neural Architecture Search.
CoRR
Zhewen Yu, Christos-Savvas Bouganis
2021 J jnl
SAMO: Optimised Mapping of Convolutional Neural Networks to Streaming Architectures.
CoRR
Alexander Montgomerie-Corcoran, Zhewen Yu, Christos-Savvas Bouganis
2021 — conf
StreamSVD: Low-rank Approximation and Streaming Accelerator Co-design.
FPT
Zhewen Yu, Christos-Savvas Bouganis
2021 — conf
YNU-HPCC at SemEval-2021 Task 10: Using a Transformer-based Source-Free Domain Adaptation Model for Semantic Processing.
SemEval@ACL/IJCNLP
Zhewen Yu, Jin Wang, Xuejie Zhang
2020 — conf
A Parameterisable FPGA-Tailored Architecture for YOLOv3-Tiny.
ARC
Zhewen Yu, Christos-Savvas Bouganis