Zhenyu Liu - RankMe

89 papers A* 1A 4B 15C 12Misc 2Journal 32Unranked 23

Year	Rank	Type	Title / Venue / Authors
2019	—	`conf`	A Block-Floating-Point Arithmetic Based FPGA Accelerator for Convolutional Neural Networks. GlobalSIP Heshan Zhang, Zhenyu Liu, Guanwen Zhang, Jiwu Dai, Xiaocong Lian, Wei Zhou, Xiangyang Ji
2019	J	`jnl`	High-Performance FPGA-Based CNN Accelerator With Block-Floating-Point Arithmetic. IEEE Trans. Very Large Scale Integr. Syst. Xiaocong Lian, Zhenyu Liu, Zhourui Song, Jiwu Dai, Wei Zhou, Xiangyang Ji
2019	J	`jnl`	Optimize x265 Rate Control: An Exploration of Lookahead in Frame Bit Allocation and Slice Type Decision. IEEE Trans. Image Process. Zhenyu Liu, Libo Wang, Xiaobo Li, Xiangyang Ji
2018	B	`conf`	CNN Based CU Partition Mode Decision Algorithm for HEVC Inter Coding. ICIP Yunpeng Li, Zhenyu Liu, Xiangyang Ji, Dongsheng Wang
2018	A*	`conf`	Computation Error Analysis of Block Floating Point Arithmetic Oriented Convolution Neural Network Accelerator Design. AAAI Zhourui Song, Zhenyu Liu, Dongsheng Wang
2018	B	`conf`	Enhance the HEVC Fast Intra CU Mode Decision Based on Convolutional Neural Network by Corner Power Estimation. DCC Liangliang Chang, Zhenyu Liu, Libo Wang, Xiaobo Li
2018	J	`jnl`	Parallel Content-Aware Adaptive Quantization-Oriented Lossy Frame Memory Recompression for HEVC. IEEE Trans. Circuits Syst. Video Technol. Xiaocong Lian, Zhenyu Liu, Wei Zhou, Zhemin Duan
2018	B	`conf`	Rate Control Optimization of X265 Using Information from Quarter-Resolution Pre-Motion-Estimation. ICIP Zhenyu Liu, Libo Wang, Xiaobo Li
2017	—	`conf`	A 200MHZ [email protected] VGG16 accelerator in Xilinx VX690T. GlobalSIP Chunsheng Mei, Zhenyu Liu, Yue Niu, Xiangyang Ji, Wei Zhou, Dongsheng Wang
2017	—	`conf`	CNN oriented fast PU mode decision for HEVC hardwired intra encoder. GlobalSIP Nan Song, Zhenyu Liu, Xiangyang Ji, Dongsheng Wang
2017	B	`conf`	Coding sensitive based approximation algorithm for power efficient VBS-DCT VLSI design in HEVC hardwired Intra encoder. ICIP Liangliang Chang, Zhenyu Liu, Xiangyang Ji, Dongsheng Wang
2017	J	`jnl`	Computation Error Analysis of Block Floating Point Arithmetic Oriented Convolution Neural Network Accelerator Design. CoRR Zhourui Song, Zhenyu Liu, Chunlu Wang, Dongsheng Wang
2017	B	`conf`	Data-centric computation mode for convolution in deep neural networks. IJCNN Peiqi Wang, Zhenyu Liu, Haixia Wang, Dongsheng Wang
2017	—	`conf`	Sensitivity-based acceleration and compression algorithm for convolution neural network. GlobalSIP Yue Niu, Zhenyu Liu, Chunsheng Mei, Xiangyang Ji, Wei Zhou, Dongsheng Wang
2016	J	`jnl`	A High-Throughput and Multi-Parallel VLSI Architecture for HEVC Deblocking Filter. IEEE Trans. Multim. Wei Zhou, Jingzhi Zhang, Xin Zhou, Zhenyu Liu, Xiaoxiang Liu
2016	—	`conf`	A low power lossy frame memory recompression algorithm. APSIPA Xin Zhou, Xiaocong Lian, Wei Zhou, Zhenyu Liu, Xiu Zhang
2016	C	`conf`	CNN oriented fast HEVC intra CU mode decision. ISCAS Zhenyu Liu, Xianyu Yu, Shaolin Chen, Dongsheng Wang
2016	J	`jnl`	CU Partition Mode Decision for HEVC Hardwired Intra Encoder Using Convolution Neural Network. IEEE Trans. Image Process. Zhenyu Liu, Xianyu Yu, Yuan Gao, Shaolin Chen, Xiangyang Ji, Dongsheng Wang
2016	C	`conf`	Error models of finite word length arithmetic in CNN accelerator design. VCIP Yuan Gao, Zhenyu Liu, Dongsheng Wang
2016	C	`conf`	HEVC fast FME algorithm using IME RD-costs based error surface fitting scheme. VCIP Yunpeng Li, Zhenyu Liu, Xiangyang Ji, Dongsheng Wang
2016	J	`jnl`	Hardware Oriented Enhanced Category Determination Based on CTU Boundary Deblocking Strength Prediction for SAO in HEVC Encoder. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Gaoxing Chen, Zhenyu Pei, Zhenyu Liu, Takeshi Ikenaga
2016	J	`jnl`	Lossless Frame Memory Compression Using Pixel-Grain Prediction and Dynamic Order Entropy Coding. IEEE Trans. Circuits Syst. Video Technol. Xiaocong Lian, Zhenyu Liu, Wei Zhou, Zhemin Duan
2016	—	`conf`	Multi-feature based fast depth decision in HEVC inter prediction for VLSI implementation. CISP-BMEI Gaoxing Chen, Zhenyu Liu, Tetsunori Kobayashi, Takeshi Ikenaga
2015	J	`jnl`	An efficient interpolation filter VLSI architecture for HEVC standard. EURASIP J. Adv. Signal Process. Wei Zhou, Xin Zhou, Xiaocong Lian, Zhenyu Liu, Xiaoxiang Liu
2015	J	`jnl`	Cluster Cache Monitor: Leveraging the Proximity Data in CMP. Int. J. Parallel Program. Guohong Li, Olivier Temam, Zhenyu Liu, Sanchuan Guo, Dongsheng Wang
2015	C	`conf`	Deblocking strength prediction based CTU-level SAO category determination in HEVC encoder. VCIP Gaoxing Chen, Zhenyu Pei, Zhenyu Liu, Takeshi Ikenaga
2015	B	`conf`	Pixel-grain prediction and K-order UEG-rice entropy coding oriented lossless frame memory compression for motion estimation in HEVC. ICIP Xiaocong Lian, Zhenyu Liu, Wei Zhou, Zhemin Duan
2015	B	`conf`	VLSI friendly fast CU/PU mode decision for HEVC intra encoding: Leveraging convolution neural network. ICIP Xianyu Yu, Zhenyu Liu, Junjie Liu, Yuan Gao, Dongsheng Wang
2014	J	`jnl`	A Mode Mapping and Optimized MV Conjunction Based H.264/SVC to H.264/AVC Transcoder with Medium-Grain Quality Scalability for Videoconferencing. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Lei Sun, Zhenyu Liu, Takeshi Ikenaga
2014	B	`conf`	Binary classification based linear rate estimation model for HEVC RDO. ICIP Zhenyu Liu, Sanchuan Guo, Dongsheng Wang
2014	J	`jnl`	Fast Mode and Depth Decision for HEVC Intra Prediction Based on Edge Detection and Partition Reconfiguration. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Gaoxing Chen, Lei Sun, Zhenyu Liu, Takeshi Ikenaga
2014	—	`conf`	HDTV1080p HEVC Intra encoder with source texture based CU/PU mode pre-decision. ASP-DAC Jia Zhu, Zhenyu Liu, Dongsheng Wang, Qingrui Han, Yang Song
2014	—	`conf`	Hardware oriented category pre-determination algorithm for SAO in HEVC. APSIPA Gaoxing Chen, Zhenyu Pei, Zhenyu Liu, Takeshi Ikenaga
2014	B	`conf`	Linear Rate Estimation Model for HEVC RDO Using Binary Classification Based Regression. DCC Sanchuan Guo, Zhenyu Liu, Dongsheng Wang, Qingrui Han, Yang Song
2014	B	`conf`	Linear adaptive search range model for uni-prediction and motion analysis for bi-prediction in HEVC. ICIP Longshan Du, Zhenyu Liu, Takeshi Ikenaga, Dongsheng Wang
2014	—	`conf`	Low complexity SAO in HEVC base on class combination, pre-decision and merge separation. DSP Gaoxing Chen, Zhenyu Pei, Zhenyu Liu, Takeshi Ikenaga
2013	Misc	`conf`	41.7BN-pixels/s reconfigurable intra prediction architecture for HEVC 2560×1600 encoder. ICASSP Zhenyu Liu, Dongsheng Wang, Hongxiang Zhu, Xiaodong Huang
2013	J	`jnl`	A Drift-Constrained Frequency-Domain Ultra-Low-Delay H.264/SVC to H.264/AVC Transcoder with Medium-Grain Quality Scalability for Videoconferencing. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Lei Sun, Zhenyu Liu, Takeshi Ikenaga
2013	—	`conf`	A Low-Complexity Quantization-Domain H.264/SVC to H.264/AVC Transcoder with Medium-Grain Quality Scalability. MMM (1) Lei Sun, Zhenyu Liu, Takeshi Ikenaga
2013	C	`conf`	A mode-mapping and optimized MV conjunction based MGS-scalable SVC to AVC IPPP transcoder. ISCAS Lei Sun, Zhenyu Liu, Takeshi Ikenaga
2013	J	`jnl`	Bayesian Theory Based Adaptive Proximity Data Accessing for CMP Caches. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Guohong Li, Zhenyu Liu, Sanchuan Guo, Dongsheng Wang
2013	C	`conf`	Bayesian theory oriented Optimal Data-Provider Selection for CMP. ICCD Guohong Li, Zhenyu Liu, Sanchuan Guo, Chongmin Li, Dongsheng Wang
2013	C	`conf`	Cluster Cache Monitor. SBAC-PAD Guohong Li, Olivier Temam, Zhenyu Liu, Dongsheng Wang, Sanchuan Guo
2013	J	`jnl`	Content-Aware Write Reduction Mechanism of 3D Stacked Phase-Change RAM Based Frame Store in H.264 Video Codec System. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Sanchuan Guo, Zhenyu Liu, Guohong Li, Takeshi Ikenaga, Dongsheng Wang
2013	C	`conf`	Content-aware write reduction mechanism of phase-change RAM based Frame Store in H.264 Video codec system. ISCAS Sanchuan Guo, Zhenyu Liu, Guohong Li, Dongsheng Wang
2013	C	`conf`	Fast HEVC intra mode decision using matching edge detector and kernel density estimation alike histogram generation. ISCAS Guang Chen, Zhenyu Liu, Takeshi Ikenaga, Dongsheng Wang
2013	—	`conf`	Fast intra prediction for HEVC based on pixel gradient statistics and mode refinement. ChinaSIP Gaoxing Chen, Zhenyu Pei, Lei Sun, Zhenyu Liu, Takeshi Ikenaga
2013	—	`conf`	Fast mode and depth decision HEVC intra prediction based on edge detection and partitioning reconfiguration. ISPACS Gaoxing Chen, Lei Sun, Zhenyu Liu, Takeshi Ikenaga
2013	B	`conf`	Fast prediction mode decision with hadamard transform based rate-distortion cost estimation for HEVC intra coding. ICIP Jia Zhu, Zhenyu Liu, Dongsheng Wang, Qingrui Han, Yang Song
2013	C	`conf`	Fully pipelined DCT/IDCT/Hadamard unified transform architecture for HEVC Codec. ISCAS Jia Zhu, Zhenyu Liu, Dongsheng Wang
2013	J	`jnl`	Improving Cache Partitioning Algorithms for Pseudo-LRU Policies. IEICE Trans. Inf. Syst. Xi Zhang, Chuanyi Liu, Zhenyu Liu, Dongsheng Wang
2013	J	`jnl`	Low-Complexity Hybrid-Domain H.264/SVC to H.264/AVC Spatial Transcoding with Drift Compensation for Videoconferencing. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Lei Sun, Zhenyu Liu, Takeshi Ikenaga
2013	—	`conf`	Security Memory System for Mobile Device or Computer Against Memory Attacks. ISCTCS Genxian Liu, Xi Zhang, Dongsheng Wang, Zhenyu Liu, Haixia Wang
2012	—	`conf`	A Videoconferencing-Oriented Hybrid-Domain H.264/SVC to H.264/AVC Spatial Transcoder. PCM Lei Sun, Zhenyu Liu, Takeshi Ikenaga
2012	B	`conf`	A pixel-domain mode-mapping based SVC-to-AVC transcoder with coarse grain quality scalability. ICPR Lei Sun, Zhenyu Liu, Takeshi Ikenaga
2012	B	`conf`	Lagrangian Multiplier Optimization Using Markov Chain Based Rate and Piecewise Approximated Distortion Models. DCC Zhenyu Liu, Dongsheng Wang, Junwei Zhou, Takeshi Ikenaga
2012	Misc	`conf`	Lagrangian multiplier optimization using correlations in residues. ICASSP Zhenyu Liu, Dongsheng Wang, Junwei Zhou, Takeshi Ikenaga
2012	—	`conf`	Wear-Resistant Hybrid Cache Architecture with Phase Change Memory. NAS Sanchuan Guo, Zhenyu Liu, Dongsheng Wang, Haixia Wang, Guohong Li
2011	J	`jnl`	A Novel Cache Replacement Policy via Dynamic Adaptive Insertion and Re-Reference Prediction. IEICE Trans. Electron. Xi Zhang, Chongmin Li, Zhenyu Liu, Haixia Wang, Dongsheng Wang, Takeshi Ikenaga
2011	B	`conf`	One-round renormalization based 2-bin/cycle H.264/AVC CABAC encoder. ICIP Zhenyu Liu, Dongsheng Wang
2011	J	`jnl`	Register Length Analysis and VLSI Optimization of VBS Hadamard Transform in H.264/AVC. IEEE Trans. Circuits Syst. Video Technol. Zhenyu Liu, Junwei Zhou, Dongsheng Wang, Takeshi Ikenaga
2010	J	`jnl`	Architecture and Circuit Optimization of Hardwired Integer Motion Estimation Engine for H.264/AVC. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Zhenyu Liu, Dongsheng Wang, Takeshi Ikenaga
2009	J	`jnl`	HDTV1080p H.264/AVC Encoder Chip Design and Performance Analysis. IEEE J. Solid State Circuits Zhenyu Liu, Yang Song, Ming Shao, Shen Li, Lingfeng Li, Shunichi Ishiwata, Masaki Nakagawa, Satoshi Goto, Takeshi Ikenaga
2009	B	`conf`	Hardware optimizations of variable block size Hadamard transform for H.264/AVC FRExt. ICIP Zhenyu Liu, Dongsheng Wang, Takeshi Ikenaga
2009	J	`jnl`	Motion Estimation Optimization for H.264/AVC Using Source Image Edge Features. IEEE Trans. Circuits Syst. Video Technol. Zhenyu Liu, Junwei Zhou, Satoshi Goto, Takeshi Ikenaga
2008	J	`jnl`	Content-Aware Fast Motion Estimation for H.264/AVC. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Zhenyu Liu, Satoshi Goto, Takeshi Ikenaga
2008	A	`conf`	Fast motion estimation for H.264/AVC using image edge features. ICME Zhenyu Liu, Satoshi Goto, Takeshi Ikenaga
2008	A	`conf`	Hardware-oriented direction-based fast fractional motion estimation algorithm in H.264/AVC. ICME Yang Song, Yao Ma, Zhenyu Liu, Takeshi Ikenaga, Satoshi Goto
2008	J	`jnl`	Motion Feature and Hadamard Coefficient-Based Fast Multiple Reference Frame Motion Estimation for H.264. IEEE Trans. Circuits Syst. Video Technol. Zhenyu Liu, Lingfeng Li, Yang Song, Shen Li, Satoshi Goto, Takeshi Ikenaga
2008	C	`conf`	Optimization of Propagate Partial SAD and SAD tree motion estimation hardwired engine for H.264. ICCD Zhenyu Liu, Satoshi Goto, Takeshi Ikenaga
2008	J	`jnl`	Parallel Improved HDTV720p Targeted Propagate Partial SAD Architecture for Variable Block Size Motion Estimation in H.264/AVC. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Yiqing Huang, Zhenyu Liu, Yang Song, Satoshi Goto, Takeshi Ikenaga
2007	—	`conf`	32-Parallel SAD Tree Hardwired Engine for Variable Block Size Motion Estimation in HDTV1080P Real-Time Encoding Application. SiPS Zhenyu Liu, Yang Song, Ming Shao, Shen Li, Lingfeng Li, Satoshi Goto, Takeshi Ikenaga
2007	C	`conf`	Enhanced Strict Multilevel Successive Elimination Algorithm for Fast Motion Estimation. ISCAS Yang Song, Zhenyu Liu, Takeshi Ikenaga, Satoshi Goto
2007	—	`conf`	H.264/AVC Fractional Motion Estimation Engine with Computation Reusing in HDTV1080P Real-Time Encoding Applications. SiPS Yang Song, Ming Shao, Zhenyu Liu, Shen Li, Lingfeng Li, Takeshi Ikenaga, Satoshi Goto
2007	—	`conf`	Hardware-efficient propagate partial sad architecture for variable block size motion estimation in H.264/AVC. ACM Great Lakes Symposium on VLSI Zhenyu Liu, Yiqing Huang, Yang Song, Satoshi Goto, Takeshi Ikenaga
2007	J	`jnl`	Lossless VLSI Oriented Full Computation Reusing Algorithm for H.264/AVC Fractional Motion Estimation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Ming Shao, Zhenyu Liu, Satoshi Goto, Takeshi Ikenaga
2007	J	`jnl`	Lossy Strict Multilevel Successive Elimination Algorithm for Fast Motion Estimation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Yang Song, Zhenyu Liu, Takeshi Ikenaga, Satoshi Goto
2007	J	`jnl`	Low-Power Partial Distortion Sorting Fast Motion Estimation Algorithms and VLSI Implementations. IEICE Trans. Inf. Syst. Yang Song, Zhenyu Liu, Takeshi Ikenaga, Satoshi Goto
2007	A	`conf`	Ultra Low-Complexity Fast Variable Block Size Motion Estimation Algorithm in H.264/AVC. ICME Yang Song, Zhenyu Liu, Takeshi Ikenaga, Satoshi Goto
2007	A	`conf`	VLSI Oriented Fast Multiple Reference Frame Motion Estimation Algorithm for H.264/AVC. ICME Zhenyu Liu, Lingfeng Li, Yang Song, Takeshi Ikenaga, Satoshi Goto
2007	—	`conf`	VLSI friendly edge gradient detection based multiple reference frames motion estimation optimization for H.264/AVC. EUSIPCO Zhenyu Liu, Yiqing Huang, Yang Song, Satoshi Goto, Takeshi Ikenaga
2006	J	`jnl`	A Fine-Grain Scalable and Low Memory Cost Variable Block Size Motion Estimation Architecture for H.264/AVC. IEICE Trans. Electron. Zhenyu Liu, Yang Song, Takeshi Ikenaga, Satoshi Goto
2006	J	`jnl`	A VLSI Architecture for Variable Block Size Motion Estimation in H.264/AVC with Low Cost Memory Organization. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Yang Song, Zhenyu Liu, Takeshi Ikenaga, Satoshi Goto
2006	—	`conf`	Enhanced Partial Distortion Sorting Fast Motion Estimation Algorithm for Low-Power Applications. APCCAS Yang Song, Takeshi Ikenaga, Satoshi Goto, Zhenyu Liu
2006	—	`conf`	Low-Pass Filter Based Vlsi Oriented Variable Block Size Motion Estimation Algorithm for H.264. ICASSP (2) Zhenyu Liu, Yang Song, Takeshi Ikenaga, Satoshi Goto
2006	J	`jnl`	Scalable VLSI Architecture for Variable Block Size Integer Motion Estimation in H.264/AVC. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Yang Song, Zhenyu Liu, Satoshi Goto, Takeshi Ikenaga
2006	—	`conf`	System-in-silicon architecture and its application to H.264/AVC motion estimation for 1080HDTV. ISSCC Kouichi Kumagai, Changqi Yang, Hitoshi Izumino, Nobuyuki Narita, Keisuke Shinjo, Shin-ichi Iwashita, Yuji Nakaoka, Tomohiro Kawamura, Hideo Komabashiri, Tsukasa Minato, Atsushi Ambo, Takamasa Suzuki, Zhenyu Liu, Yang Song, Satoshi Goto, Takeshi Ikenaga, Yoshihiro Mabuchi, Kenji Yoshida
2005	J	`jnl`	A VLSI Array Processing Oriented Fast Fourier Transform Algorithm and Hardware Implementation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Zhenyu Liu, Yang Song, Takeshi Ikenaga, Satoshi Goto
2005	—	`conf`	A VLSI array processing oriented fast fourier transform algorithm and hardware implementation. ACM Great Lakes Symposium on VLSI Zhenyu Liu, Yang Song, Takeshi Ikenaga, Satoshi Goto