Zhen Zhuang

34 papers A* 1A 7B 1C 1Journal 15Unranked 9
YearRankTypeTitle / Venue / Authors
2026 J jnl
Adaptive Redistribution Layer Routing for Chiplet-Package Co-Design in 2.5D System.
ACM Trans. Design Autom. Electr. Syst.
Zhen Zhuang, Weishiun Hung, M. D. Arafat Kabir, Yarui Peng, Tsung-Yi Ho
2026 J jnl
Cracking the Code of Backdoor Attacks With Confidence Consistency.
IEEE Trans. Inf. Forensics Secur.
Zhen Zhuang, Yijian Ding, Shuyu Zheng, Jun Shao, Donghai Zhu, Huiyan Wang
2026 — conf
DPO-3D: Differentiable Power Delivery Network Optimization via Flexible Modeling for Routability and IR-Drop Tradeoff in Face-to-Face 3D ICs.
ASP-DAC
Zhen Zhuang, Zheng Yang, Yuxuan Zhao, Jiawei Hu, Bei Yu, Sung Kyu Lim, Tsung-Yi Ho
2026 J jnl
Distributed optimal consensus for stochastic fractional-order multi-agent systems: Frequency distribution model approach.
Appl. Math. Comput.
Jin You, Yan Li, Xiangyang Cao, Zhen Zhuang, Pu Ren
2026 J jnl
Event-Triggered Robust State of Charge Estimation for Lithium-Ion Battery With Cloud-Integrated Battery Management System.
IEEE Trans. Ind. Electron.
Tong Yang, Yan Li, Pu Ren, Yi Zeng, Daduan Zhao, Zhen Zhuang, Xiangyang Xing
2026 — conf
Graph Attention-Based Current Crowding Analysis at TSV Interfaces in 3D Power Delivery Networks.
ASP-DAC
Zheng Yang, Zhen Zhuang, Tsung-Yi Ho, Sung Kyu Lim
2026 J jnl
HiePlace: Efficient Hierarchical PCB Placement.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Shanyi Li, Zhen Zhuang, Mingyu Liu, Weihua Sheng, Bei Yu, Tsung-Yi Ho
2026 J jnl
Multilayer Package Power/Ground Planes Synthesis With Balanced DC IR Drops: A Game-Theoretic Optimization Approach.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Siyuan Liang, Zhen Zhuang, Kai-Yuan Chao, Bei Yu, Tsung-Yi Ho
2026 J jnl
Parallel Delay-Driven Layer Assignment Leveraging Hierarchical Task Graph Modeling for Advanced Technology Nodes.
IEEE Trans. Computers
Zepeng Li, Zhen Zhuang, Genggeng Liu, Wen-Hao Liu, Tsung-Yi Ho, Ting-Chi Wang
2026 — conf
Partitioning-free 3D-IC Floorplanning.
ASP-DAC
Shuo Ren, Zhen Zhuang, Rongliang Fu, Leilei Jin, Libo Shen, Bei Yu, Tsung-Yi Ho
2025 B conf
Accelerating k-means ++ Algorithm.
IEEE Big Data
Jiehao Liang, Somdeb Sarkhel, Zhao Song, Chenbo Yin, Zhen Zhuang, Danyang Zhuo
2025 A conf
ChronoTE: Crosstalk-Aware Timing Estimation for Routing Optimization via Edge-Enhanced GNNs.
ICCAD
Leilei Jin, Rongliang Fu, Zhen Zhuang, Liang Xiao, Fangzhou Liu, Bei Yu, Tsung-Yi Ho
2025 — conf
Conv-Basis: A New Paradigm for Efficient Attention Inference and Gradient Computation in Transformers.
EMNLP (Findings)
Yingyu Liang, Heshan Liu, Zhenmei Shi, Zhao Song, Zhuoyan Xu, Jiale Zhao, Zhen Zhuang
2025 — conf
Fast Routing Algorithm for Mask Stitching Region of Ultra Large Wafer Scale Integration.
ASP-DAC
Zhen Zhuang, Quan Chen, Hao Yu, Tsung-Yi Ho
2025 A* conf
GNN-MLS: Signal Routing in Mixed-Node 3D ICs through GNN-Assisted Metal Layer Sharing.
DAC
Jiawei Hu, Pruek Vanna-Iampikul, Zhen Zhuang, Tsung-Yi Ho, Sung Kyu Lim
2025 J jnl
Hierarchical Partitioning-Based Interchip Redistribution Layer Routing for Fan-Out Wafer-Level Packaging.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Haoyang Xu, Xing Huang, Zhen Zhuang, Zhiwen Yu, Bin Guo, Kai-Yuan Chao, Bei Yu, Tsung-Yi Ho, Martin D. F. Wong
2025 — conf
ML-Based Fine-Grained Modeling of DC Current Crowding in Power Delivery TSVs for Face-to-Face 3D ICs.
ISPD
Zheng Yang, Zhen Zhuang, Bei Yu, Tsung-Yi Ho, Martin D. F. Wong, Sung Kyu Lim
2025 A conf
MMPack: Multi-Mask Co-Design for Ultra-Large Wafer-Scale Package Integration.
ICCAD
Shanyi Li, Zhen Zhuang, Siyuan Liang, Bei Yu, Tsung-Yi Ho
2025 J jnl
Neural Algorithmic Reasoning for Hypergraphs with Looped Transformers.
CoRR
Xiaoyu Li, Yingyu Liang, Jiangxuan Long, Zhenmei Shi, Zhao Song, Zhen Zhuang
2025 J jnl
Text-to-Image Diffusion Models Cannot Count, and Prompt Refinement Cannot Help.
CoRR
Yuefan Cao, Xuyang Guo, Jiayan Huo, Yingyu Liang, Zhenmei Shi, Zhao Song, Jiahao Zhang, Zhen Zhuang
2024 J jnl
A Robust Multilayer X-Architecture Global Routing System Based on Particle Swarm Optimization.
IEEE Trans. Syst. Man Cybern. Syst.
Genggeng Liu, Yuhan Zhu, Zhen Zhuang, Zhenyu Pei, Min Gan, Xing Huang, Wenzhong Guo
2024 J jnl
Floorplet: Performance-Aware Floorplan Framework for Chiplet Integration.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Shixin Chen, Shanyi Li, Zhen Zhuang, Su Zheng, Zheng Liang, Tsung-Yi Ho, Bei Yu, Alberto L. Sangiovanni-Vincentelli
2023 J jnl
Floorplet: Performance-aware Floorplan Framework for Chiplet Integration.
CoRR
Shixin Chen, Shanyi Li, Zhen Zhuang, Su Zheng, Zheng Liang, Tsung-Yi Ho, Bei Yu, Alberto L. Sangiovanni-Vincentelli
2023 A conf
Multi-Product Optimization for 3D Heterogeneous Integration with D2W Bonding.
ICCAD
Zhen Zhuang, Kai-Yuan Chao, Bei Yu, Tsung-Yi Ho, Martin D. F. Wong
2022 A conf
Multi-Package Co-Design for Chiplet Integration.
ICCAD
Zhen Zhuang, Bei Yu, Kai-Yuan Chao, Tsung-Yi Ho
2022 C conf
SPTA: A Scalable Parallel ILP-Based Track Assignment Algorithm with Two-Stage Partition.
VLSI-SoC
Yidan Jing, Liliang Yang, Zhen Zhuang, Genggeng Liu, Xing Huang, Wen-Hao Liu, Ting-Chi Wang
2022 A conf
TRADER: A Practical Track-Assignment-Based Detailed Router.
DATE
Zhen Zhuang, Genggeng Liu, Tsung-Yi Ho, Bei Yu, Wenzhong Guo
2021 A conf
ALIFRouter: A Practical Architecture-Level Inter-FPGA Router for Logic Verification.
DATE
Zhen Zhuang, Xing Huang, Genggeng Liu, Wenzhong Guo, Weikang Qian, Wen-Hao Liu
2020 J jnl
A unified algorithm based on HTS and self-adapting PSO for the construction of octagonal and rectilinear SMT.
Soft Comput.
Genggeng Liu, Zhisheng Chen, Zhen Zhuang, Wenzhong Guo, Guolong Chen
2020 — conf
MSFRoute: Multi-Stage FPGA Routing for Timing Division Multiplexing Technique.
ACM Great Lakes Symposium on VLSI
Zhen Zhuang, Genggeng Liu, Xing Huang, Xiaotao Jia, Wen-Hao Liu, Wenzhong Guo
2020 A conf
MiniDelay: Multi-Strategy Timing-Aware Layer Assignment for Advanced Technology Nodes.
DATE
Xinghai Zhang, Zhen Zhuang, Genggeng Liu, Xing Huang, Wen-Hao Liu, Wenzhong Guo, Ting-Chi Wang
2019 — conf
RDTA: An Efficient Routability-Driven Track Assignment Algorithm.
ACM Great Lakes Symposium on VLSI
Genggeng Liu, Zhen Zhuang, Wenzhong Guo, Ting-Chi Wang
2019 — conf
X-Architecture Steiner Minimal Tree Construction Based on Discrete Differential Evolution.
ICNC-FSKD
Hailin Wu, Saijuan Xu, Zhen Zhuang, Genggeng Liu
2018 J jnl
A novel particle swarm optimizer with multi-stage transformation and genetic operation for VLSI routing.
CoRR
Genggeng Liu, Zhen Zhuang, Wenzhong Guo, Naixue Xiong, Guolong Chen