Zhen Liu

16 papers A 1B 2C 1Journal 4Unranked 8
YearRankTypeTitle / Venue / Authors
2010 J jnl
SimNP: A Flexible Platform for the Simulation of Network Processing Systems.
Commun. Netw.
David Bermingham, Zhen Liu, Xiaojun Wang
2010 A conf
Ultra-high throughput string matching for Deep Packet Inspection.
DATE
Alan Kennedy, Xiaojun Wang, Zhen Liu, Bin Liu
2009 B conf
Field-Based Branch Prediction for Packet Processing Engines.
ICPADS
David Bermingham, Zhen Liu, Xiaojun Wang, Bin Liu
2009 B conf
Multi-Engine Packet Classification Hardware Accelerator.
ICCCN
Alan Kennedy, Zhen Liu, Xiaojun Wang, Bin Liu
2009 J jnl
Power-Efficient Packet Classifier for Next-Generation Routers.
ERCIM News
Zhen Liu, Alan Kennedy, Olga Ormond, Xiaojun Wang
2008 — conf
Low power architecture for high speed packet classification.
ANCS
Alan Kennedy, Xiaojun Wang, Zhen Liu, Bin Liu
2008 C conf
Revisiting the Cache Effect on Multicore Multithreaded Network Processors.
DSD
Zhen Liu, Jia Yu, Xiaojun Wang, Bin Liu, Laxmi N. Bhuyan
2007 J jnl
Hybrid cache architecture for high-speed packet processing.
IET Comput. Digit. Tech.
Zhen Liu, Kai Zheng, Bin Liu
2006 — conf
A Trace Driven Comparison of Latency Hiding Techniques for Network Processors.
ICC
Zhen Liu, Hao Che, Kai Zheng, Shanzhen Chen, Chengchen Hu, Bin Liu
2006 J jnl
A scalable IPv6 route lookup scheme via dynamic variable-stride bitmap compression and path compression.
Comput. Commun.
Kai Zheng, Zhen Liu, Bin Liu
2006 — conf
Fuzzy Optimization for Security Sensors Deployment in Collaborative Intrusion Detection System.
FSKD
Chengchen Hu, Zhen Liu, Zhen Chen, Bin Liu
2006 — conf
Optimal Deployment of Distributed Passive Measurement Monitors.
ICC
Chengchen Hu, Bin Liu, Zhen Liu, Shifang Gao, Dapeng Wu
2005 — conf
High Performance Embedded Route Lookup Coprocessor for Network Processors.
ICCNMC
Kai Zheng, Zhen Liu, Bin Liu
2005 — conf
Hybrid Cache Architecture for High Speed Packet Processing.
Hot Interconnects
Zhen Liu, Kai Zheng, Bin Liu
2004 — conf
A low-latency software-based route lookup implementation for network processors.
ICON
Zhen Liu, Kai Zheng, Bin Liu
2004 — conf
FPGA implementation of hierarchical memory architecture for network processors.
FPT
Zhen Liu, Kai Zheng, Bin Liu