| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2026 | J | jnl |
IEEE Trans. Green Commun. Netw.
|
| 2026 | J | jnl |
IEEE Trans. Netw. Sci. Eng.
|
| 2025 | J | jnl |
IEEE Trans. Circuits Syst. Artif. Intell.
|
| 2025 | — | conf |
Approximate Memory Protection Against Double-Adjacent Bit Errors with Low Redundancy SEC-DAEC Codes.
DFT
|
| 2025 | J | jnl |
Computer
|
| 2025 | J | jnl |
CoRR
|
| 2025 | J | jnl |
Comput. Commun.
|
| 2025 | J | jnl |
IEEE Trans. Computers
|
| 2025 | — | conf |
DFT
|
| 2025 | J | jnl |
IEEE Trans. Computers
|
| 2025 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2025 | J | jnl |
CoRR
|
| 2025 | J | jnl |
IEEE Internet Things J.
|
| 2025 | J | jnl |
Future Gener. Comput. Syst.
|
| 2025 | J | jnl |
IEEE Trans. Circuits Syst. Artif. Intell.
|
| 2025 | J | jnl |
CoRR
|
| 2024 | J | jnl |
CoRR
|
| 2024 | J | jnl |
IEEE Internet Things J.
|
| 2024 | J | jnl |
IEEE Trans. Reliab.
|
| 2024 | J | jnl |
IEEE Trans. Cloud Comput.
|
| 2024 | J | jnl |
IEEE Open J. Commun. Soc.
|
| 2024 | J | jnl |
IEEE J. Emerg. Sel. Topics Circuits Syst.
|
| 2024 | J | jnl |
IEEE Trans. Veh. Technol.
|
| 2024 | C | conf |
ISCAS
|
| 2024 | J | jnl |
IEEE Trans. Emerg. Top. Comput.
|
| 2024 | J | jnl |
Computer
|
| 2024 | J | jnl |
IEEE Internet Things J.
|
| 2023 | J | jnl |
IEEE Trans. Circuits Syst. I Regul. Pap.
|
| 2023 | J | jnl |
CoRR
|
| 2023 | J | jnl |
IEEE Trans. Circuits Syst. I Regul. Pap.
|
| 2023 | J | jnl |
IEEE Open J. Comput. Soc.
|
| 2023 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2023 | J | jnl |
IEEE Trans. Cloud Comput.
|
| 2023 | J | jnl |
IEEE Trans. Intell. Transp. Syst.
|
| 2022 | — | conf |
ICC Workshops
|
| 2022 | — | conf |
ICC
|
| 2022 | — | conf |
DFT
|
| 2022 | J | jnl |
IEEE Trans. Emerg. Top. Comput.
|
| 2022 | J | jnl |
CoRR
|
| 2022 | J | jnl |
IEEE Trans. Ind. Informatics
|
| 2022 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2022 | Misc | conf |
VTS
|
| 2021 | — | conf |
Analysis and Evaluation of the Effects of Single Event Upsets (SEU s) on Memories in Polar Decoders.
DFT
|
| 2021 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2021 | — | conf |
AICAS
|
| 2021 | J | jnl |
ACM Trans. Design Autom. Electr. Syst.
|
| 2021 | — | conf |
DFT
|
| 2021 | Misc | conf |
VTS
|
| 2020 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2020 | J | jnl |
CoRR
|
| 2020 | — | conf |
DFT
|
| 2020 | — | conf |
DFT
|
| 2020 | — | conf |
AICAS
|
| 2018 | J | jnl |
IEEE Trans. Computers
|
| 2018 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2018 | J | jnl |
IEEE Trans. Circuits Syst. II Express Briefs
|
| 2015 | J | jnl |
CoRR
|
| 2014 | J | jnl |
Microelectron. Reliab.
|