Zhaori Cong

11 papers A* 1C 1Journal 6Unranked 3
YearRankTypeTitle / Venue / Authors
2026 J jnl
An area/energy-efficient RRAM computing-in-memory macro with fully-charge-domain multi-bit computation.
Sci. China Inf. Sci.
Zhi Li, Shengzhe Yan, Jun Wang, Zhuoyu Dai, Zeyu Guo, Zhaori Cong, Zhihang Qian, Xiangqu Fu, Xu Zheng, Chunmeng Dou, Dashan Shang, Jinshan Yue
2025 J jnl
A High-Density Energy-Efficient CNM Macro Using Hybrid RRAM and SRAM for Memory-Bound Applications.
IEEE Trans. Very Large Scale Integr. Syst.
Jun Wang, Shengzhe Yan, Xiangqu Fu, Zhihang Qian, Zhi Li, Zeyu Guo, Zhuoyu Dai, Zhaori Cong, Chunmeng Dou, Feng Zhang, Jinshan Yue, Dashan Shang
2025 J jnl
A monolithic 3D IGZO-RRAM-SRAM-integrated architecture for robust and efficient compute-in-memory enabling equivalent-ideal device metrics.
Sci. China Inf. Sci.
Shengzhe Yan, Zhaori Cong, Zi Wang, Zhuoyu Dai, Zeyu Guo, Zhihang Qian, Xufan Li, Xu Zheng, Chuanke Chen, Nianduan Lu, Chunmeng Dou, Guanhua Yang, Xiaoxin Xu, Di Geng, Jinshan Yue, Lingfei Wang, Ling Li, Ming Liu
2025 J jnl
An RRAM-Based Computing-in-Memory Macro With Low-Power Readout/Hold Circuits and Activation Differential Strategy for AdderNet.
IEEE Trans. Very Large Scale Integr. Syst.
Zhihang Qian, Shengzhe Yan, Zhuoyu Dai, Zeyu Guo, Zhaori Cong, Yifan He, Chunmeng Dou, Feng Zhang, Jinshan Yue, Yongpan Liu
2024 J jnl
A 28-nm Floating-Point Computing-in-Memory Processor Using Intensive-CIM Sparse-Digital Architecture.
IEEE J. Solid State Circuits
Shengzhe Yan, Jinshan Yue, Chaojie He, Zi Wang, Zhaori Cong, Yifan He, Mufeng Zhou, Wenyu Sun, Xueqing Li, Chunmeng Dou, Feng Zhang, Huazhong Yang, Yongpan Liu, Ming Liu
2024 — conf
A 41.7TOPS/W@INT8 Computing-in-Memory Processor with Zig-Zag Backbone-Systolic CIM and Block/Self-Gating CAM for NN/Recommendation Applications.
VLSI Technology and Circuits
Zhuoyu Dai, Shengzhe Yan, Zhaori Cong, Zeyu Guo, Yifan He, Wenyu Sun, Chunmeng Dou, Feng Zhang, Jinshan Yue, Yongpan Liu, Ming Liu
2024 A* conf
IG-CRM: Area/Energy-Efficient IGZO-Based Circuits and Architecture Design for Reconfigurable CIM/CAM Applications.
DAC
Zeyu Guo, Jinshan Yue, Shengzhe Yan, Zhuoyu Dai, Xiangqu Fu, Zhaori Cong, Zening Niu, Ke Hu, Lihua Xu, Jiawei Wang, Lingfei Wang, Guanhua Yang, Di Geng, Ling Li
2023 — conf
A 28nm 16.9-300TOPS/W Computing-in-Memory Processor Supporting Floating-Point NN Inference/Training with Intensive-CIM Sparse-Digital Architecture.
ISSCC
Jinshan Yue, Chaojie He, Zi Wang, Zhaori Cong, Yifan He, Mufeng Zhou, Wenyu Sun, Xueqing Li, Chunmeng Dou, Feng Zhang, Huazhong Yang, Yongpan Liu, Ming Liu
2023 C conf
A User-Friendly Fast and Accurate Simulation Framework for Non-Ideal Factors in Computing-in-Memory Architecture.
ISCAS
Zi Wang, Jinshan Yue, Chaojie He, Zhuoyu Dai, Feibin Xiang, Zhaori Cong, Yifan He, Xiaoyu Feng, Yongpan Liu
2023 J jnl
Recent progress in InGaZnO FETs for high-density 2T0C DRAM applications.
Sci. China Inf. Sci.
Shengzhe Yan, Zhaori Cong, Nianduan Lu, Jinshan Yue, Qing Luo
2020 — conf
CPP-Based Cooperative Defense Against DoS Attacks in Future Non-terrestrial Networks.
ChinaCom
Zhaori Cong, Zhilong Zhang, Danpu Liu