Zhaonan Lu

11 papers C 1Journal 5Unranked 5
YearRankTypeTitle / Venue / Authors
2025 J jnl
A 0.7 V 4.2
IEICE Electron. Express
Junqi Liu, Menglian Zhao, Zhaonan Lu, Lingxin Meng, Zhichao Tan
2025 J jnl
A 15-bit BW/Power Scalable Pseudo-Pseudo-Differential MASH ADC Using an Adaptively Biased Inverter Amplifier.
IEEE Trans. Circuits Syst. II Express Briefs
Zhenhao Fan, Zhaonan Lu, Menglian Zhao, Wanyuan Qu, Zhichao Tan
2025 C conf
A 94.1dB-DR 40kHz-BW Continuous-Time Delta-Sigma Modulator with Current-reused Amplifiers.
ISCAS
Zhaonan Lu, Menglian Zhao, Zhichao Tan
2025 J jnl
An 871 nW 96.2 dB SNDR Pipelined Second-Order Noise-Shaping SAR ADC Employing Charge-Efficient CLS-Assisted Residue Amplifier.
IEEE Trans. Circuits Syst. I Regul. Pap.
Shan Zhang, Lingxin Meng, Zhaonan Lu, Shuang Song, Wanyuan Qu, Menglian Zhao, Zhichao Tan
2025 J jnl
Analysis and Design of a 16-bit Continuous-Time Incremental Delta-Sigma ADC.
IEEE Trans. Circuits Syst. I Regul. Pap.
Zhaonan Lu, Menglian Zhao, Zhichao Tan
2024 — conf
A 188.6-μW Continuous-time Incremental Delta-Sigma ADC with Extended Counting achieving 95.2-dB SNDR and 175.4-dB FoMSNDR.
CICC
Zhaonan Lu, Menglian Zhao, Zhichao Tan
2024 — conf
A 91.7dB-SNDR 5kHz BW 18.5μW PPD-based Single-OTA Zoom ADC using CLS-enhanced Inverter Amplifier.
ICTA
Yining Zhao, Zhaonan Lu, Shuang Song, Liang Zhao, Menglian Zhao, Zhichao Tan
2024 — conf
A 96dB DR 3.1GΩ Input Impedance CT-DT ΔΣ Readout Frontend with Level-Crossing Input Range Enhancement for Neural Recordings.
BioCAS
Tian Yang, Mengyu Li, Shuang Song, Yiqi Chen, Zhaonan Lu, Shiwei Wang, Yongpeng Cheng, Zhichao Tan, Menglian Zhao
2024 — conf
An 871nW 96.2dB-SNDR Pipelined NS SAR ADC Achieving 180.8dB-FoMSNDR with a Charge-Efficient CLS-Assisted Two-Stage FIA.
CICC
Shan Zhang, Lingxin Meng, Zhaonan Lu, Wanyuan Qu, Shuang Song, Menglian Zhao, Zhichao Tan
2023 J jnl
A 1 V 1.07 μW 15-Bit Pseudo-Pseudo-Differential Incremental Zoom ADC.
IEEE J. Solid State Circuits
Zhaonan Lu, Huaikun Ji, Wanyuan Qu, Le Ye, Menglian Zhao, Zhichao Tan
2022 — conf
A 10.12μW 101.98dB-SNDR Three-step Incremental Analog-to-Digital Converter.
ISOCC
Huaikun Ji, Zhenhao Fan, Zhaonan Lu, Zhichao Tan, Menglian Zhao