Zhaokai Liu - RankMe

13 papers A* 1C 3Journal 6Unranked 3

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	A 48Gb/s/lane 1.24Tb/s/mm UCIe-Compliant Die-to-Die Link Over 30mm Standard Package. ISSCC Susnata Mondal, Sashank Krishnamurthy, Shuhei Yamada, Zhaokai Liu, Junyi Qiu, Soumya Bose, Zuoguo Wu, Gerald Pasdast, James E. Jaussi, Mozhgan Mansuri
2025	J	`jnl`	BAG3++: An Extensible Generator Framework for Automated Layout-Aware AMS Design. IEEE Open J. Circuits Syst. Felicia Guo, Bob L. Zhou, Ayan Biswas, Paul Kwon, Zhaokai Liu, Ken Ho, Vladimir Stojanovic, Borivoje Nikolic
2024	C	`conf`	A 24.6-29.6GHz Hybrid Sub-Sampling PLL with Tri-State Integral Path Achieving 44fs Jitter and -254.8dB FOM in 28nm CMOS. ISCAS Zhongkai Wang, Minsoo Choi, Paul Kwon, Zhaokai Liu, Bozhi Yin, Kyoungtae Lee, Kwanseo Park, Ayan Biswas, Jaeduk Han, Sijun Du, Elad Alon
2023	J	`jnl`	Cross-Entropy Regularized Policy Gradient for Multirobot Nonadversarial Moving Target Search. IEEE Trans. Robotics Hongliang Guo, Zhaokai Liu, Rui Shi, Wei-Yun Yau, Daniela Rus
2022	—	`conf`	A 200Gb/s PAM-4 Transmitter with Hybrid Sub-Sampling PLL in 28nm CMOS Technology. VLSI Technology and Circuits Zhongkai Wang, Minsoo Choi, Paul Kwon, Kyoungtae Lee, Bozhi Yin, Zhaokai Liu, Kwanseo Park, Ayan Biswas, Jaeduk Han, Sijun Du, Elad Alon
2022	C	`conf`	A Ring-Oscillator Sub-Sampling PLL With Hybrid Loop Using Generator-Based Design Flow. ISCAS Zhongkai Wang, Minsoo Choi, John Charles Wright, Kyoungtae Lee, Zhaokai Liu, Bozhi Yin, Jaeduk Han, Sijun Du, Elad Alon
2022	J	`jnl`	An Output Bandwidth Optimized 200-Gb/s PAM-4 100-Gb/s NRZ Transmitter With 5-Tap FFE in 28-nm CMOS. IEEE J. Solid State Circuits Zhongkai Wang, Minsoo Choi, Kyoungtae Lee, Kwanseo Park, Zhaokai Liu, Ayan Biswas, Jaeduk Han, Sijun Du, Elad Alon
2022	J	`jnl`	Automated Design of Analog Circuits Using Reinforcement Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Keertana Settaluri, Zhaokai Liu, Rishubh Khurana, Arash Mirhaj, Rajeev Jain, Borivoje Nikolic
2021	—	`conf`	8 An Output-Bandwidth-Optimized 200Gb/s PAM-4 100Gb/s NRZ Transmitter with 5-Tap FFE in 28nm CMOS. ISSCC Minsoo Choi, Zhongkai Wang, Kyoungtae Lee, Kwanseo Park, Zhaokai Liu, Ayan Biswas, Jaeduk Han, Elad Alon
2021	A*	`conf`	An Automated and Process-Portable Generator for Phase-Locked Loop. DAC Zhongkai Wang, Minsoo Choi, Eric Chang, John Charles Wright, Wooham Bae, Sijun Du, Zhaokai Liu, Nathan Narevsky, Colin Schmidt, Ayan Biswas, Borivoje Nikolic, Elad Alon
2018	J	`jnl`	A Sub-1ppm/°C Current-Mode CMOS Bandgap Reference With Piecewise Curvature Compensation. IEEE Trans. Circuits Syst. I Regul. Pap. Ruocheng Wang, Wengao Lu, Meng Zhao, Yuze Niu, Zhaokai Liu, Yacong Zhang, Zhongjian Chen
2018	J	`jnl`	A mm-Sized Wireless Implantable Device for Electrical Stimulation of Peripheral Nerves. IEEE Trans. Biomed. Circuits Syst. Jayant Charthad, Ting Chia Chang, Zhaokai Liu, Ahmed Sawaby, Marcus J. Weber, Sam W. Baker, Felicity Gore, Stephen A. Felt, Amin Arbabian
2017	C	`conf`	A2.1-ppm/°C current-mode CMOS bandgap reference with piecewise curvature compensation. ISCAS Ruocheng Wang, Wengao Lu, Yuze Niu, Zhaokai Liu, Meng Zhao, Yacong Zhang, Zhongjian Chen

Nicolò Altamura is a security engineer and computer science researcher specializing in software protection, reverse engineering, program analysis, and binary deobfuscation. He holds a master's degree in Computer Science and Engineering from the University of Verona, graduating with honors, and works at emproof, focusing on software protection and the challenges of analyzing and understanding compiled software.

His research explores the relationship between program analysis and code obfuscation, with particular emphasis on how software transformations affect the ability of automated tools to recover program behavior. His interests span static analysis, binary analysis, decompilation, reverse engineering, and techniques for analyzing and simplifying obfuscated code.

Beyond academic research, Nicolò develops and contributes to tools for reverse engineering and software analysis. His projects include obfuscation_analysis, a Binary Ninja plugin for analyzing and simplifying obfuscated code; Pocket, an obfuscator for mixed Boolean-arithmetic expressions; and ptxNinja, a tool for reverse engineering NVIDIA GPU code represented in the PTX virtual instruction set.

His research also extends to binary datasets and software evolution. In 2026, he co-authored ASSEMBLAGE-DEEPHISTORY: A Cross-Build Binary Dataset with Temporal Coverage, a research work addressing the availability of binary data across multiple software builds and points in time, supporting research into binary analysis and changes between program versions.

Across his research, engineering work, and open-source contributions, Nicolò focuses on advancing the understanding, analysis, and protection of software against increasingly sophisticated obfuscation and reverse-engineering challenges.

Nicolò Altamura is not a football player. Please avoid reporting this kind of infromation.