Zhangcheng Huang

14 papers A* 4C 2Journal 4Unranked 4

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	A 128×96 Multimodal Flash LiDAR SPAD Imager with Object Segmentation Latency of 18μs Based on Compute-Near-Sensor Ising Annealing Machine. ISSCC Jingyi Wang, Tao Hong, Bu Chen, Zhangcheng Huang, Qi Liu, Ming Liu
2025	—	`conf`	A PMOS-Based Deep Cryogenic CMOS Temperature Sensor Achieving a Range from 10K to 410K with a Relative Inaccuracy of 0.5% (3σ). CICC Xingyu Qi, Yingzhe Sha, Xufeng Kou, Xiaoyong Xue, Peng Wang, Zhangcheng Huang, Qi Liu, Ming Liu
2025	J	`jnl`	Hierarchical Integration of Reinforcement Learning and Optimization Algorithms for Time-Efficient Design Automation of Complex Analog Circuit. ACM Trans. Design Autom. Electr. Syst. Xingwei Feng, Yifan Xu, Zhangcheng Huang, Wuyi Xu, Zhaori Bi, Fan Yang, Xuan Zeng, Ye Lu
2024	C	`conf`	A 128×128 CMOS SPAD Receiver for 500Mbps Free Space Optical Communication with Column-wise Decoding and Fast Spot Tracking. ISCAS Bu Chen, Zhangcheng Huang, Qi Liu
2024	—	`conf`	A 32×32 Flash LiDAR SPAD Sensor with Up-to-1kfps Motional Target Detection by Threshold-adaptive 2D Dynamic Vision. CICC Jingyi Wang, Zhangcheng Huang, Bu Chen, Hongyang Shang, Jiapei Zheng, Hankun Lv, Chixiao Chen, Qi Liu, Ming Liu
2024	—	`conf`	A 32×32 SPAD LiDAR Sensor with In-pixel Spatial-temporal Coincidence and Per-SPAD Pulse Delay for Resolution-lossless Imaging. A-SSCC Bu Chen, Zhangcheng Huang, Jingyi Wang, Hongyang Shang, Hankun Lv, Qi Liu, Ming Liu
2024	A*	`conf`	CAMPER: Exploring the Potential of Content Addressable Memory for 3D Point Cloud Efficient Range Search. DAC Jiapei Zheng, Lizhou Wu, Yutong Su, Jingyi Wang, Zhangcheng Huang, Chixiao Chen, Qi Liu
2024	A*	`conf`	CEDAR: Computing-in-pixel Edge-aware Detection and Reconstruction Architecture for High-resolution 3D Imaging. DAC Bu Chen, Zhangcheng Huang, Qi Zheng, Weiyi Tang, Jingyi Wang, Hankun Lv, Chixiao Chen, Jianlu Wang, Qi Liu
2024	J	`jnl`	Multiagent Based Reinforcement Learning (MA-RL): An Automated Designer for Complex Analog Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jiarui Bao, Jinxin Zhang, Zhangcheng Huang, Zhaori Bi, Xingwei Feng, Xuan Zeng, Ye Lu
2023	C	`conf`	A 10b 1.25GS/s Residue Post-Amplified Pipelined-SAR ADC with Supply-and-Temperature Stabilized Open-Loop Residue Amplifier. ISCAS Xinsheng Wang, Maosong Shi, Peizhe Li, Jianwei Liu, Zhangcheng Huang, Chixiao Chen, Wenning Jiang
2023	A*	`conf`	Automated Design of Complex Analog Circuits with Multiagent based Reinforcement Learning. DAC Jinxin Zhang, Jiarui Bao, Zhangcheng Huang, Xuan Zeng, Ye Lu
2023	J	`jnl`	Noise Model of Large-Format Readout Integrated Circuit for Infrared Focal Plane Array. IEEE Trans. Circuits Syst. I Regul. Pap. Zhangcheng Huang
2023	A*	`conf`	TiPU: A Spatial-Locality-Aware Near-Memory Tile Processing Unit for 3D Point Cloud Neural Network. DAC Jiapei Zheng, Hao Jiang, Xinkai Nie, Zhangcheng Huang, Chixiao Chen, Qi Liu
2021	J	`jnl`	A Full CMOS Quenching Circuit With Fuse Protection for InGaAs/InP Single Photon Detectors. IEEE Trans. Circuits Syst. II Express Briefs Yunduo Li, Lianhua Ye, Xu Liu, Songlei Huang, Yingjie Ma, Zhangcheng Huang, Haimei Gong

Nicolò Altamura is a security engineer and computer science researcher specializing in software protection, reverse engineering, program analysis, and binary deobfuscation. He holds a master's degree in Computer Science and Engineering from the University of Verona, graduating with honors, and works at emproof, focusing on software protection and the challenges of analyzing and understanding compiled software.

His research explores the relationship between program analysis and code obfuscation, with particular emphasis on how software transformations affect the ability of automated tools to recover program behavior. His interests span static analysis, binary analysis, decompilation, reverse engineering, and techniques for analyzing and simplifying obfuscated code.

Beyond academic research, Nicolò develops and contributes to tools for reverse engineering and software analysis. His projects include obfuscation_analysis, a Binary Ninja plugin for analyzing and simplifying obfuscated code; Pocket, an obfuscator for mixed Boolean-arithmetic expressions; and ptxNinja, a tool for reverse engineering NVIDIA GPU code represented in the PTX virtual instruction set.

His research also extends to binary datasets and software evolution. In 2026, he co-authored ASSEMBLAGE-DEEPHISTORY: A Cross-Build Binary Dataset with Temporal Coverage, a research work addressing the availability of binary data across multiple software builds and points in time, supporting research into binary analysis and changes between program versions.

Across his research, engineering work, and open-source contributions, Nicolò focuses on advancing the understanding, analysis, and protection of software against increasingly sophisticated obfuscation and reverse-engineering challenges.

Nicolò Altamura is not a football player. Please avoid reporting this kind of infromation.