Zdenek Plíva

12 papers B 2C 3Misc 1Journal 3Unranked 3
YearRankTypeTitle / Venue / Authors
2020 — conf
Detection of NAT64/DNS64 by SRV Records: Detection Using Global DNS Tree in the World Beyond Plain-Text DNS.
CN
Martin Hunek, Zdenek Plíva
2018 J jnl
Test response compaction method with improved detection and diagnostic abilities.
Microelectron. Reliab.
Ondrej Novák, Zdenek Plíva
2017 C conf
Design and optimisation of NiTi pressure gauge.
DDECS
Martin Hunek, Zdenek Plíva
2017 C conf
Logic testing with test-per-clock pattern loading and improved diagnostic abilities.
DDECS
Ondrej Novák, Zdenek Plíva
2014 J jnl
A new method for in situ measurement of parameters and degradation processes in modern nanoscale programmable devices.
Microprocess. Microsystems
Petr Pfeifer, Zdenek Plíva
2014 — conf
On reliability enhancement using adaptive core voltage scaling and variations on nanoscale FPGAs.
LATW
Petr Pfeifer, Zdenek Plíva, Pieter Weckx, Ben Kaczer
2013 B conf
On measurement of parameters of programmable microelectronic nanostructures under accelerating extreme conditions (Xilinx 28nm XC7Z020 Zynq FPGA).
FPL
Petr Pfeifer, Zdenek Plíva
2013 C conf
On performance estimation of a scalable VLIW soft-core in XILINX FPGAs.
DDECS
Petr Pfeifer, Zdenek Plíva, Mario Schölzel, Tobias Koal, Heinrich Theodor Vierhaus
2012 B conf
On measurement of impact of the metallization and FPGA design to the changes of slice parameters and generation of delay faults.
FPL
Petr Pfeifer, Zdenek Plíva
2006 — conf
Self Testing SoC with Reduced Memory Requirements and Minimized Hardware Overhead.
DFT
Ondrej Novák, Zdenek Plíva, Jiri Jenícek, Zbynek Mader, Michal Jarkovský
2005 Misc conf
COMPAS - Compressed Test Pattern Sequencer for Scan Based Circuits.
EDCC
Ondrej Novák, Jirí Zahrádka, Zdenek Plíva
2004 J jnl
Test-Per-Clock Logic BIST with Semi-Deterministic Test Patterns and Zero-Aliasing Compactor.
J. Electron. Test.
Ondrej Novák, Zdenek Plíva, Jiri Nosek, Andrzej Hlawiczka, Tomasz Garbolino, Krzysztof Gucwa