Yvan Tortorella

26 papers A 3B 1Journal 17Unranked 5
YearRankTypeTitle / Venue / Authors
2026 J jnl
Temporal Lockstep: Low-Cost Resilient Design for Microcontroller-Class RISC-V Processors.
IEEE Access
Riccardo Tedeschi, Alessandro Nadalini, Yvan Tortorella, Filippo Grillotti, Fabio De Ambroggi, Elio Guidetti, Luca Benini, Davide Rossi
2025 J jnl
A Flexible Template for Edge Generative AI With High-Accuracy Accelerated Softmax and GELU.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Andrea Belano, Yvan Tortorella, Angelo Garofalo, Luca Benini, Davide Rossi, Francesco Conti
2025 J jnl
A Reliable, Time-Predictable Heterogeneous SoC for AI-Enhanced Mixed-Criticality Edge Applications.
CoRR
Angelo Garofalo, Alessandro Ottaviano, Matteo Perotti, Thomas Benz, Yvan Tortorella, Robert Balas, Michael Rogenmoser, Chi Zhang, Luca Bertaccini, Nils Wistoff, Maicol Ciani, Cyril Koenig, Mattia Sinigaglia, Luca Valente, Paul Scheffler, Manuel Eggimann, Matheus A. Cavalcante, Francesco Restuccia, Alessandro Biondi, Francesco Conti, Frank K. Gürkaynak, Davide Rossi, Luca Benini
2025 J jnl
A Reliable, Time-Predictable Heterogeneous SoC for AI-Enhanced Mixed-Criticality Edge Applications.
IEEE Trans. Circuits Syst. II Express Briefs
Angelo Garofalo, Alessandro Ottaviano, Matteo Perotti, Thomas Benz, Yvan Tortorella, Robert Balas, Michael Rogenmoser, Chi Zhang, Luca Bertaccini, Nils Wistoff, Maicol Ciani, Cyril Koenig, Mattia Sinigaglia, Luca Valente, Paul Scheffler, Manuel Eggimann, Matheus A. Cavalcante, Francesco Restuccia, Alessandro Biondi, Francesco Conti, Frank K. Gürkaynak, Davide Rossi, Luca Benini
2025 — conf
HMR-NEureka: Hybrid Modular Redundancy DNN Acceleration in Heterogeneous RISC-V SoCs.
ISVLSI
Luigi Ghionda, Riccardo Tedeschi, Yvan Tortorella, Arpan Suravi Prasad, Davide Rossi, Luca Benini, Francesco Conti
2025 J jnl
Hybrid Modular Redundancy: Exploring Modular Redundancy Approaches in RISC-V Multi-core Computing Clusters for Reliable Processing in Space.
ACM Trans. Cyber Phys. Syst.
Michael Rogenmoser, Yvan Tortorella, Davide Rossi, Francesco Conti, Luca Benini
2025 J jnl
Maestro: A 302 GFLOPS/W and 19.8GFLOPS RISC-V Vector-Tensor Architecture for Wearable Ultrasound Edge Computing.
CoRR
Mattia Sinigaglia, Amirhossein Kiamarzi, Marco Bertuletti, Luigi Ghionda, Mattia Orlandi, Riccardo Tedeschi, Aurora Di Giampietro, Yvan Tortorella, Luca Bertaccini, Simone Benatti, Giuseppe Tagliavini, Luca Benini, Francesco Conti, Davide Rossi
2025 J jnl
Maestro: A 302 GFLOPS/W and 19.8GFLOPS RISC-V Vector-Tensor Architecture for Wearable Ultrasound Edge Computing.
IEEE Trans. Circuits Syst. I Regul. Pap.
Mattia Sinigaglia, Amirhossein Kiamarzi, Marco Bertuletti, Luigi Ghionda, Mattia Orlandi, Riccardo Tedeschi, Aurora Di Giampietro, Yvan Tortorella, Luca Bertaccini, Simone Benatti, Giuseppe Tagliavini, Luca Benini, Francesco Conti, Davide Rossi
2025 — conf
RedMulE-FT: A Reconfigurable Fault-Tolerant Matrix Multiplication Engine.
CF (Companion)
Philip Wiese, Maurus Item, Luca Bertaccini, Yvan Tortorella, Angelo Garofalo, Luca Benini
2025 J jnl
RedMulE-FT: A Reconfigurable Fault-Tolerant Matrix Multiplication Engine.
CoRR
Philip Wiese, Maurus Item, Luca Bertaccini, Yvan Tortorella, Angelo Garofalo, Luca Benini
2025 A conf
SoftEx: A Low Power and Flexible Softmax Accelerator with Fast Approximate Exponentiation.
DATE
Andrea Belano, Yvan Tortorella, Angelo Garofalo, Luca Benini, Davide Rossi, Francesco Conti
2024 J jnl
A Flexible Template for Edge Generative AI with High-Accuracy Accelerated Softmax & GELU.
CoRR
Andrea Belano, Yvan Tortorella, Angelo Garofalo, Luca Benini, Davide Rossi, Francesco Conti
2024 J jnl
A Heterogeneous RISC-V Based SoC for Secure Nano-UAV Navigation.
IEEE Trans. Circuits Syst. I Regul. Pap.
Luca Valente, Alessandro Nadalini, Asif Hussain Chiralil Veeran, Mattia Sinigaglia, Bruno Sá, Nils Wistoff, Yvan Tortorella, Simone Benatti, Rafail Psiakis, Ari Kulmala, Baker Mohammad, Sandro Pinto, Daniele Palossi, Luca Benini, Davide Rossi
2024 J jnl
A Heterogeneous RISC-V based SoC for Secure Nano-UAV Navigation.
CoRR
Luca Valente, Alessandro Nadalini, Asif Veeran, Mattia Sinigaglia, Bruno Sá, Nils Wistoff, Yvan Tortorella, Simone Benatti, Rafail Psiakis, Ari Kulmala, Baker Mohammad, Sandro Pinto, Daniele Palossi, Luca Benini, Davide Rossi
2023 J jnl
DARKSIDE: A Heterogeneous RISC-V Compute Cluster for Extreme-Edge On-Chip DNN Inference and Training.
CoRR
Angelo Garofalo, Yvan Tortorella, Matteo Perotti, Luca Valente, Alessandro Nadalini, Luca Benini, Davide Rossi, Francesco Conti
2023 A conf
HULK-V: a Heterogeneous Ultra-low-power Linux capable RISC-V SoC.
DATE
Luca Valente, Yvan Tortorella, Mattia Sinigaglia, Giuseppe Tagliavini, Alessandro Capotondi, Luca Benini, Davide Rossi
2023 J jnl
Hybrid Modular Redundancy: Exploring Modular Redundancy Approaches in RISC-V Multi-Core Computing Clusters for Reliable Processing in Space.
CoRR
Michael Rogenmoser, Yvan Tortorella, Davide Rossi, Francesco Conti, Luca Benini
2023 B conf
PULP Fiction No More - Dependable PULP Systems for Space.
ETS
Markus Ulbricht, Yvan Tortorella, Michael Rogenmoser, Li Lu, Junchao Chen, Francesco Conti, Milos Krstic, Luca Benini
2023 — conf
RISC-V Processor Technologies for Aerospace Applications in the ISOLDE Project.
SAMOS
William Fornaciari, Federico Reghenzani, Giovanni Agosta, Davide Zoni, Andrea Galimberti, Francesco Conti, Yvan Tortorella, Emanuele Parisi, Francesco Barchi, Andrea Bartolini, Andrea Acquaviva, Daniele Gregori, Salvatore Cognetta, Carlo Ciancarelli, Antonio Leboffe, Paolo Serri, Alessio Burrello, Daniele Jahier Pagliari, Gianvito Urgese, Maurizio Martina, Guido Masera, Rosario Di Carlo, Antonio Sciarappa
2023 J jnl
RedMule: A Mixed-Precision Matrix-Matrix Operation Engine for Flexible and Energy-Efficient On-Chip Linear Algebra and TinyML Training Acceleration.
CoRR
Yvan Tortorella, Luca Bertaccini, Luca Benini, Davide Rossi, Francesco Conti
2023 J jnl
RedMule: A mixed-precision matrix-matrix operation engine for flexible and energy-efficient on-chip linear algebra and TinyML training acceleration.
Future Gener. Comput. Syst.
Yvan Tortorella, Luca Bertaccini, Luca Benini, Davide Rossi, Francesco Conti
2023 — conf
Shaheen: An Open, Secure, and Scalable RV64 SoC for Autonomous Nano-UAVs.
HCS
Luca Valente, Asif Veeran, Mattia Sinigaglia, Yvan Tortorella, Alessandro Nadalini, Nils Wistoff, Bruno Sá, Angelo Garofalo, Rafail Psiakis, M. Tolba, Ari Kulmala, Nimisha Limaye, Ozgur Sinanoglu, Sandro Pinto, Daniele Palossi, Luca Benini, Baker Mohammad, Davide Rossi
2022 — conf
Darkside: 2.6GFLOPS, 8.7mW Heterogeneous RISC-V Cluster for Extreme-Edge On-Chip DNN Inference and Training.
ESSCIRC
Angelo Garofalo, Matteo Perotti, Luca Valente, Yvan Tortorella, Alessandro Nadalini, Luca Benini, Davide Rossi, Francesco Conti
2022 J jnl
HULK-V: a Heterogeneous Ultra-low-power Linux capable RISC-V SoC.
CoRR
Luca Valente, Yvan Tortorella, Mattia Sinigaglia, Giuseppe Tagliavini, Alessandro Capotondi, Luca Benini, Davide Rossi
2022 A conf
RedMulE: A Compact FP16 Matrix-Multiplication Accelerator for Adaptive Deep Learning on RISC-V-Based Ultra-Low-Power SoCs.
DATE
Yvan Tortorella, Luca Bertaccini, Davide Rossi, Luca Benini, Francesco Conti
2022 J jnl
RedMulE: A Compact FP16 Matrix-Multiplication Accelerator for Adaptive Deep Learning on RISC-V-Based Ultra-Low-Power SoCs.
CoRR
Yvan Tortorella, Luca Bertaccini, Davide Rossi, Luca Benini, Francesco Conti