Yuzong Chen

26 papers A* 3B 1C 5Misc 2Journal 13Unranked 2
YearRankTypeTitle / Venue / Authors
2026 J jnl
Bit-Serial Acceleration of LLM Inference With Mixture-of-Datatype Quantization.
IEEE Trans. Computers
Yuzong Chen, Chi-Chih Chang, Xilai Dai, Ahmed F. AbouElhamayed, Marta Andronic, George A. Constantinides, Mohamed S. Abdelfattah
2025 A* conf
BitMoD: Bit-serial Mixture-of-Datatype LLM Acceleration.
HPCA
Yuzong Chen, Ahmed F. AbouElhamayed, Xilai Dai, Yang Wang, Marta Andronic, George A. Constantinides, Mohamed S. Abdelfattah
2025 J jnl
P3-LLM: An Integrated NPU-PIM Accelerator for LLM Inference Using Hybrid Numerical Formats.
CoRR
Yuzong Chen, Chao Fang, Xilai Dai, Yuheng Wu, Thierry Tambe, Marian Verhelst, Mohamed S. Abdelfattah
2025 J jnl
The Power of Negative Zero: Datatype Customization for Quantized Large Language Models.
CoRR
Yuzong Chen, Xilai Dai, Chi-Chih Chang, Yash Akhauri, Mohamed S. Abdelfattah
2024 A* conf
BBS: Bi-Directional Bit-Level Sparsity for Deep Learning Acceleration.
MICRO
Yuzong Chen, Jian Meng, Jae-sun Seo, Mohamed S. Abdelfattah
2024 J jnl
BBS: Bi-directional Bit-level Sparsity for Deep Learning Acceleration.
CoRR
Yuzong Chen, Jian Meng, Jae-sun Seo, Mohamed S. Abdelfattah
2024 J jnl
BitMoD: Bit-serial Mixture-of-Datatype LLM Acceleration.
CoRR
Yuzong Chen, Ahmed F. AbouElhamayed, Xilai Dai, Yang Wang, Marta Andronic, George A. Constantinides, Mohamed S. Abdelfattah
2024 Misc conf
FPGA Benchmark for Unrolled DNNs with Fine-Grained Sparsity and Mixed Precision.
FCCM
Xilai Dai, Yuzong Chen, Mohamed S. Abdelfattah
2024 B conf
Kratos: An FPGA Benchmark for Unrolled DNNs with Fine-Grained Sparsity and Mixed Precision.
FPL
Xilai Dai, Yuzong Chen, Mohamed S. Abdelfattah
2024 J jnl
Kratos: An FPGA Benchmark for Unrolled DNNs with Fine-Grained Sparsity and Mixed Precision.
CoRR
Xilai Dai, Yuzong Chen, Mohamed S. Abdelfattah
2024 A* conf
Learning from Students: Applying t-Distributions to Explore Accurate and Efficient Formats for LLMs.
ICML
Jordan Dotzel, Yuzong Chen, Bahaa Kotb, Sushma Prasad, Gang Wu, Sheng Li, Mohamed S. Abdelfattah, Zhiru Zhang
2024 J jnl
Learning from Students: Applying t-Distributions to Explore Accurate and Efficient Formats for LLMs.
CoRR
Jordan Dotzel, Yuzong Chen, Bahaa Kotb, Sushma Prasad, Gang Wu, Sheng Li, Mohamed S. Abdelfattah, Zhiru Zhang
2023 J jnl
BP-SCIM: A Reconfigurable 8T SRAM Macro for Bit-Parallel Searching and Computing In-Memory.
IEEE Trans. Circuits Syst. I Regul. Pap.
Yuzong Chen, Junjie Mu, Hyunjoon Kim, Lu Lu, Tony Tae-Hyoung Kim
2023 Misc conf
BRAMAC: Compute-in-BRAM Architectures for Multiply-Accumulate on FPGAs.
FCCM
Yuzong Chen, Mohamed S. Abdelfattah
2023 J jnl
BRAMAC: Compute-in-BRAM Architectures for Multiply-Accumulate on FPGAs.
CoRR
Yuzong Chen, Mohamed S. Abdelfattah
2023 — conf
M4BRAM: Mixed-Precision Matrix-Matrix Multiplication in FPGA Block RAMs.
ICFPT
Yuzong Chen, Jordan Dotzel, Mohamed S. Abdelfattah
2023 J jnl
M4BRAM: Mixed-Precision Matrix-Matrix Multiplication in FPGA Block RAMs.
CoRR
Yuzong Chen, Jordan Dotzel, Mohamed S. Abdelfattah
2022 — conf
A 181µW Real-Time 3-D Hand Gesture Recognition System based on Bi-directional Convolution and Computing-Efficient Feature Clustering.
CICC
Yuncheng Lu, Zehao Li, Yuzong Chen, Tony Tae-Hyoung Kim
2022 C conf
A Reconfigurable 8T SRAM Macro for Bit-Parallel Searching and Computing In-Memory.
ISCAS
Yuzong Chen, Junjie Mu, Hyunjoon Kim, Lu Lu, Tony Tae-Hyoung Kim
2022 J jnl
An Overview of Processing-in-Memory Circuits for Artificial Intelligence and Machine Learning.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Donghyuk Kim, Chengshuo Yu, Shanshan Xie, Yuzong Chen, Joo-Young Kim, Bongjin Kim, Jaydeep P. Kulkarni, Tony Tae-Hyoung Kim
2021 C conf
A Configurable Randomness Enhanced RRAM PUF with Biased Current Sensing Scheme.
ISCAS
Lu Lu, Yuzong Chen, Tony Tae-Hyoung Kim
2021 C conf
A Multi-Functional 4T2R ReRAM Macro Enabling 2-Dimensional Access and Computing In-Memory.
ISCAS
Yuzong Chen, Lu Lu, Yuncheng Lu, Tony Tae-Hyoung Kim
2021 J jnl
A Reconfigurable 4T2R ReRAM Computing In-Memory Macro for Efficient Edge Applications.
IEEE Open J. Circuits Syst.
Yuzong Chen, Lu Lu, Bongjin Kim, Tony Tae-Hyoung Kim
2021 C conf
AND8T SRAM Macro with Improved Linearity for Multi-Bit In-Memory Computing.
ISCAS
Vishal Sharma, Ju Eon Kim, Yong-Jun Jo, Yuzong Chen, Tony Tae-Hyoung Kim
2020 J jnl
Reconfigurable 2T2R ReRAM Architecture for Versatile Data Storage and Computing In-Memory.
IEEE Trans. Very Large Scale Integr. Syst.
Yuzong Chen, Lu Lu, Bongjin Kim, Tony Tae-Hyoung Kim
2020 C conf
Reconfigurable 2T2R ReRAM with Split Word-Lines for TCAM Operation and In-Memory Computing.
ISCAS
Yuzong Chen, Lu Lu, Bongjin Kim, Tony Tae-Hyoung Kim