Yuye Kang

11 papers Unranked 11
YearRankTypeTitle / Venue / Authors
2024 — conf
First Demonstration of BEOL-Compatible 3D Vertical FeNOR.
VLSI Technology and Circuits
Yang Feng, Dong Zhang, Chen Sun, Zijie Zheng, Yue Chen, Qiwen Kong, Gan Liu, Yuye Kang, Kaizhen Han, Zuopu Zhou, Gengchiau Liang, Kai Ni, Jixuan Wu, Jiezhi Chen, Xiao Gong
2024 — conf
Fluorine Plasma Treatment-Enabled ITO Transistors: Excellent Reliability and Comprehensive Understanding of Temperature Dependence from 77K to 375K.
VLSI Technology and Circuits
Xuanqi Chen, Gan Liu, Wei Shi, Yuye Kang, Qiwen Kong, Yuxuan Wang, Rui Shao, Bich-Yen Nguyen, Gengchiau Liang, Kaizhen Han, Xiao Gong
2024 — conf
Unveiling the Impact of AC PBTI on Hydrogen Formation in Oxide Semiconductor Transistors.
VLSI Technology and Circuits
Gan Liu, Qiwen Kong, Zuopu Zhou, X. Ying, Chen Sun, Kaizhen Han, Yuye Kang, Dong Zhang, Xiaolin Wang, Yang Feng, Wei Shi, Bich-Yen Nguyen, N. Kai, Gengchiau Liang, Xiao Gong
2023 — conf
First Demonstration of BEOL-Compatible MFMIS Fe-FETs with 3D Multi-Fin Floating Gate: In-situ ALD-deposited MFM, LCH of 50 nm, > 2×10
VLSI Technology and Circuits
Xiaolin Wang, Zijie Zheng, Qiwen Kong, Leming Jiao, Kaizhen Han, Chen Sun, Zuopu Zhou, Long Liu, Yuye Kang, Gan Liu, Dong Zhang, Xiao Gong
2023 — conf
First Demonstration of BEOL-Compatible Write-Enhanced Ferroelectric-Modulated Diode (FMD): New Possibility for Oxide Semiconductor Memory Devices.
VLSI Technology and Circuits
Leming Jiao, Kaizhen Han, Zuopu Zhou, Zijie Zheng, Xiaolin Wang, Qiwen Kong, Yuye Kang, Jishen Zhang, Long Liu, Xiao Gong
2023 — conf
Grain Size Reduction of Ferroelectric HZO Enabled by a Novel Solid Phase Epitaxy (SPE) Approach: Working Principle, Experimental Demonstration, and Theoretical Understanding.
VLSI Technology and Circuits
Dong Zhang, Jixuan Wu, Qiwen Kong, Zuopu Zhou, Long Liu, Kaizhen Han, Chen Sun, Xiaolin Wang, Gan Liu, Leming Jiao, Zijie Zheng, Yuye Kang, Jiezhi Chen, Xiao Gong
2023 — conf
Novel Bridge Transmission Line Method for Thin-Film Semiconductors: Modelling, Simulation Verification, and Experimental Demonstration.
VLSI Technology and Circuits
Kaizhen Han, Yuye Kang, Yue Chen, Xiao Gong
2023 — conf
Thickness-Engineered Extremely-thin Channel High Performance ITO TFTs with Raised S/D Architecture: Record-Low RSD, Highest Moblity (Sub-4 nm TCH Regime), and High VTH Tunability.
VLSI Technology and Circuits
Yuye Kang, Kaizhen Han, Yue Chen, Xiao Gong
2022 — conf
BEOL-compatible Ta/HZO/W Ferroelectric Tunnel Junction with Low Operating Voltage Targeting for Low Power Application.
ICICDT
Leming Jiao, Zuopu Zhou, Zijie Zheng, Yuye Kang, Chen Sun, Qiwen Kong, Xiaolin Wang, Dong Zhang, Gan Liu, Long Liu, Xiao Gong
2022 — conf
Experimental Demonstration of An Inversion-Type Ferroelectric Capacitive Memory and its 1 kbit Crossbar Array Featuring High CHCS/CLCS, Fast Speed, and Long Retention.
VLSI Technology and Circuits
Zuopu Zhou, Leming Jiao, Jiuren Zhou, Zijie Zheng, Yue Chen, Kaizhen Han, Yuye Kang, Xiao Gong
2022 — conf
Extremely Scaled Bottom Gate a-IGZO Transistors Using a Novel Patterning Technique Achieving Record High Gm of 479.5 μS/μm (VDS of 1 V) and fT of 18.3 GHz (VDS of 3 V).
VLSI Technology and Circuits
Chengkuan Wang, Annie Kumar, Kaizhen Han, Chen Sun, Haiwen Xu, Jishen Zhang, Yuye Kang, Qiwen Kong, Zijie Zheng, Yuxuan Wang, Xiao Gong