Yuuki Araga

15 papers C 1Misc 1Journal 6Unranked 7
YearRankTypeTitle / Venue / Authors
2021 J jnl
Analysis and evaluation of noise coupling between through-silicon-vias.
IEICE Electron. Express
Yuuki Araga, Naoya Watanabe, Haruo Shimamoto, Katsuya Kikuchi
2021 J jnl
Landside capacitor efficacy among multi-chip-module using Si-interposer.
IEICE Electron. Express
Yuuki Araga, Ryo Kasai, Daisuke Tanaka, Yoshihide Murakami, Kyoshi Mihara, Kazuo Makida, Hiroki Sonoda, Makoto Nagata, Naoya Watanabe, Haruo Shimamoto, Katsuya Kikuchi
2020 J jnl
Si-Backside Protection Circuits Against Physical Security Attacks on Flip-Chip Devices.
IEEE J. Solid State Circuits
Takuji Miki, Makoto Nagata, Hiroki Sonoda, Noriyuki Miura, Takaaki Okidono, Yuuki Araga, Naoya Watanabe, Haruo Shimamoto, Katsuya Kikuchi
2019 — conf
A Si-Backside Protection Circuits Against Physical Security Attacks on Flip-Chip Devices.
A-SSCC
Takuji Miki, Makoto Nagata, Hiroki Sonoda, Noriyuki Miura, Takaaki Okidono, Yuuki Araga, Naoya Watanabe, Haruo Shimamoto, Katsuya Kikuchi
2019 — conf
Electrostatic Shield TSVs to Suppress Coupling Among Stacked ICs.
3DIC
Yuuki Araga, Kikuchi Katsuya, Masahiro Aoyagi
2019 — conf
Over-the-top Si Interposer Embedding Backside Buried Metal PDN to Reduce Power Supply Impedance of Large Scale Digital ICs.
3DIC
Takuji Miki, Makoto Nagata, Akihiro Tsukioka, Noriyuki Miura, Takaaki Okidono, Yuuki Araga, Naoya Watanabe, Haruo Shimamoto, Katsuya Kikuchi
2018 J jnl
A study on substrate noise coupling among TSVs in 3D chip stack.
IEICE Electron. Express
Yuuki Araga, Makoto Nagata, Joeri De Vos, Geert Van der Plas, Eric Beyne
2015 — conf
Guard-ring monitoring system for inspecting defects in TSV-based data buses.
3DIC
Yuuki Araga, Kikuchi Katsuya, Masahiro Aoyagi
2014 — conf
Substrate monitoring system for inspecting defects in TSV-based data buses.
3DIC
Yuuki Araga, Kikuchi Katsuya, Masahiro Aoyagi
2013 — conf
Noise analysis using on-chip waveform monitor in bandgap voltage references.
EMC Compo
Akitaka Murata, Shuji Agatsuma, Daisaku Ikoma, Kouji Ichikawa, Takahiro Tsuda, Makoto Nagata, Kumpei Yoshikawa, Yuuki Araga, Yuji Harada
2013 J jnl
Performance Evaluation of Probing Front-End Circuits for On-Chip Noise Monitoring.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Yuuki Araga, Nao Ueda, Yasumasa Takagi, Makoto Nagata
2011 J jnl
A Diagnosis Testbench of Analog IP Cores for Characterization of Substrate Coupling Strength.
IEICE Trans. Electron.
Takushi Hashida, Yuuki Araga, Makoto Nagata
2011 Misc conf
A diagnosis testbench of analog IP cores against on-chip environmental disturbances.
VTS
Takushi Hashida, Yuuki Araga, Makoto Nagata
2011 — conf
In-tier diagnosis of power domains in 3D TSV ICs.
3DIC
Yuuki Araga, Makoto Nagata, Geert Van der Plas, Jaemin Kim, Nikolaos Minas, Pol Marchal, Youssef Travaly, Michael Libois, Antonio La Manna, Wenqi Zhang, Eric Beyne
2010 C conf
An on-chip waveform capturing technique pursuing minimum cost of integration.
ISCAS
Yuuki Araga, Takushi Hashida, Makoto Nagata