Yutaka Arima

12 papers Journal 12
YearRankTypeTitle / Venue / Authors
2021 J jnl
Silicon Near-Infrared Sensor Using Trench Photodiode Array.
IEEE Access
Yutaka Arima
2018 J jnl
Modulation transfer function analysis of silicon X-ray sensor with trench-structured photodiodes.
IEICE Electron. Express
Tetsuya Ariyoshi, Jumpei Iwasa, Yuta Takane, Kenji Sakamoto, Akiyoshi Baba, Yutaka Arima
2014 J jnl
Binocular range-sensor LSI with improved distance detection precision by coordinated pixel placement.
IEICE Electron. Express
Masatomo Kawano, Yutaka Arima
2014 J jnl
Erratum: Binocular range-sensor LSI with improved distance detection precision by coordinated pixel placement [IEICE Electronics Express Vol. 11(2014) No. 19 pp. 20140747].
IEICE Electron. Express
Masatomo Kawano, Yutaka Arima
2009 J jnl
Improved near-infrared sensitivity of a back-side illuminated image sensor with a metal reflector.
IEICE Electron. Express
Tetsuya Ariyoshi, Shozo Morita, Akiyoshi Baba, Yutaka Arima
2006 J jnl
Binobjective monocular optical module for single-chip stereo vision sensor LSI.
IEICE Electron. Express
Takashi Yoshida, Yutaka Arima
2006 J jnl
On-chip solar battery structure for CMOS LSI.
IEICE Electron. Express
Yutaka Arima, Masaya Ehara
1996 J jnl
A 1.2 GFLOPS neural network chip for high-speed neural network servers.
IEEE J. Solid State Circuits
Yoshikazu Kondo, Yuichi Koshiba, Yutaka Arima, Mitsuhiro Murasaki, Tuyoshi Yamada, Hiroyuki Amishiro, Hakuro Mori, Kazuo Kyuma
1992 J jnl
A refreshable analog VLSI neural network chip with 400 neurons and 40 K synapses.
IEEE J. Solid State Circuits
Yutaka Arima, Mitsuhiro Murasaki, Tsuyoshi Yamada, Atsushi Maeda, Hirofumi Shinohara
1991 J jnl
A 336-neuron, 28 K-synapse, self-learning neural network chip with branch-neuron-unit architecture.
IEEE J. Solid State Circuits
Yutaka Arima, Koichiro Mashiko, Keisuke Okada, Tsuyoshi Yamada, Atsushi Maeda, Hiromi Notani, Harufusa Kondoh, Shinpei Kayano
1991 J jnl
A self-learning neural network chip with 125 neurons and 10 K self-organization synapses.
IEEE J. Solid State Circuits
Yutaka Arima, Koichiro Mashiko, Keisuke Okada, Tsuyoshi Yamada, Atsushi Maeda, Harufusa Kondoh, Shimpei Kayano
1989 J jnl
Design for reducing alpha-particle-induced soft errors in ECL logic circuitry.
IEEE J. Solid State Circuits
Masatomi Okabe, Makoto Tatsuki, Yutaka Arima, Tadashi Hirao, Yoichi Kuramitsu