Yusuke Shuto

11 papers A 2Unranked 9
YearRankTypeTitle / Venue / Authors
2024 — conf
HZO-based Nonvolatile SRAM Array with 100% Bit Recall Yield and Sufficient Retention Time at 85°C.
VLSI Technology and Circuits
Yusuke Shuto, Jun Okuno, Tsubasa Yonai, Ryo Ono, Peter Reinig, Maximilian Lederer, Konrad Seidel, Ruben Alcala, Thomas Mikolajick, Uwe Schroeder, Taku Umebayashi, Kentaro Akiyama
2021 — conf
Analog In-memory Computing in FeFET-based 1T1R Array for Edge AI Applications.
VLSI Circuits
Daisuke Saito, Toshiyuki Kobayashi, Hiroki Koga, Nicolo Ronchi, Kaustuv Banerjee, Yusuke Shuto, Jun Okuno, Kenta Konishi, Luca Di Piazza, Arindam Mallik, Jan Van Houdt, Masanori Tsukamoto, Kazunobu Ohkuri, Taku Umebayashi, Takayuki Ezaki
2021 — conf
High-Endurance and Low-Voltage operation of 1T1C FeRAM Arrays for Nonvolatile Memory Application.
IMW
Jun Okuno, Takafumi Kunihiro, Kenta Konishi, Hideki Maemura, Yusuke Shuto, Fumitaka Sugaya, Monica Materano, Tarek Ali, Maximilian Lederer, Kati Kühnel, Konrad Seidel, Uwe Schroeder, Thomas Mikolajick, Masanori Tsukamoto, Taku Umebayashi
2018 — conf
A Coarse Grained-Reconfigurable Accelerator with energy efficient MTJ-based Non-volatile Flip-flops.
ReConFig
Takeharu Ikezoe, Hideharu Amano, Junya Akaike, Kimiyoshi Usami, Masaru Kudo, Keizo Hiraga, Yusuke Shuto, Kojiro Yagami
2018 — conf
Energy Efficient Write Verify and Retry Scheme for MTJ Based Flip-Flop and Application.
NVMSA
Kimiyoshi Usami, Junya Akaike, Sosuke Akiba, Masaru Kudo, Hideharu Amano, Takeharu Ikezoe, Keizo Hiraga, Yusuke Shuto, Kojiro Yagami
2016 A conf
Design and implementation of nonvolatile power-gating SRAM using SOTB technology.
ISLPED
Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara
2016 — conf
Energy performance of nonvolatile power-gating SRAM using SOTB technology.
ESSCIRC
Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara
2015 A conf
Comparative study of power-gating architectures for nonvolatile FinFET-SRAM using spintronics-based retention technology.
DATE
Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara
2014 — conf
Comparative study of power-gating architectures for nonvolatile SRAM cells based on spintronics technology.
APCCAS
Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara
2013 — conf
Monolithic integration of pseudo-spin-MOSFETs using a custom CMOS chip fabricated through multi-project wafer service.
ESSDERC
Ryosho Nakane, Yusuke Shuto, Hiroaki Sukegawa, Zhenchao Wen, Shuu'ichirou Yamamoto, Seiji Mitani, Masaaki Tanaka, Koichiro Inomata, Satoshi Sugahara
2009 — conf
Nonvolatile SRAM (NV-SRAM) using functional MOSFET merged with resistive switching devices.
CICC
Shuu'ichirou Yamamoto, Yusuke Shuto, Satoshi Sugahara