Yung-Chih Chen

123 papers A* 8A 19B 4C 3Misc 2Journal 43Unranked 44
YearRankTypeTitle / Venue / Authors
2026 J jnl
Approximate Logic Synthesis for Dot-Inverter Graphs Using Node Merging-Enhanced Genetic Algorithm-Based Approach.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yi-Ting Li, Ihao Chen, Yung-Chih Chen, Chun-Yao Wang
2026 J jnl
Enhanced 2
ACM Trans. Design Autom. Electr. Syst.
Yu-Shan Lin, Yung-Chih Chen, Li-Cheng Zheng, Kuei-Chung Chen
2026 J jnl
Graph Neural Network-Based Glitch Rate Prediction at the Signoff Stage.
ACM Trans. Design Autom. Electr. Syst.
Yen-Lin Lin, Yung-Chih Chen, Ming-Chao Lee
2025 — conf
CNN Model Optimization Using a Hybrid Approach of Genetic Algorithm-based Pruning and Retraining with Knowledge Distillation.
ACM Great Lakes Symposium on VLSI
Kuan-Ling Chou, Cheng-Lung Wang, Yung-Chih Chen, Wuqian Tang, Yi-Ting Li, Shih-Chieh Chang, Chun-Yao Wang
2025 C conf
Decomposition Attack on Structural Logic Locking of Reversible Circuits.
ICCD
Feng-Jie Chao, Yung-Chih Chen
2025 A conf
Dynamic IR-Drop Prediction Through a Multi-Task U-Net with Package Effect Consideration.
DATE
Yu-Hsuan Chen, Yu-Chen Cheng, Yong-Fong Chang, Yu-Che Lee, Jia-Wei Lin, Hsun-Wei Pao, Peng-Wen Chen, Po-Yu Chen, Hao-Yun Chen, Yung-Chih Chen, Chun-Yao Wang, Shih-Chieh Chang
2025 J jnl
Expanding and Obfuscating In-Cone Trees to Resist SAT Attack in Logic Locking.
IEEE Trans. Reliab.
Ruijie Wang, Li-Nung Hsu, Yung-Chih Chen, TingTing Hwang
2025 — conf
IMU-Based Motion Trajectory Reconstruction and Recognition with Dynamic Calibration on Embedded System Platform.
ISQED
Kai-Po Hsu, Tsung-Han Lai, Yi-Ting Li, Wuqian Tang, Yun-Ju Lee, Yung-Chih Chen, Wen-Hsin Chiu, Chun-Yao Wang
2025 A* conf
Real-Time Dynamic IR-drop Prediction for IR ECO.
DAC
Yu-Che Lee, Yu-Hsuan Chen, Yu-Chen Cheng, Yong-Fong Chang, Jia-Wei Lin, Hsun-Wei Pao, Yung-Chih Chen, Yi-Ting Li, Wuqian Tang, Shih-Chieh Chang, Chun-Yao Wang
2024 J jnl
9-Input Threshold Function Identification Using a New Necessary Condition of Threshold Function.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yu-Chuan Yen, Meng-Jing Li, Yi-Ting Li, Yung-Chih Chen, Ihao Chen, Chun-Yao Wang
2024 A conf
A Hybrid Approach to Reverse Engineering on Combinational Circuits.
DATE
Wuqian Tang, Yi-Ting Li, Kai-Po Hsu, Kuan-Ling Chou, You-Cheng Lin, Chia-Feng Chien, Tzu-Li Hsu, Yung-Chih Chen, Ting-Chi Wang, Shih-Chieh Chang, TingTing Hwang, Chun-Yao Wang
2024 — conf
IR drop Prediction Based on Machine Learning and Pattern Reduction.
ACM Great Lakes Symposium on VLSI
Yong-Fong Chang, Yung-Chih Chen, Yu-Chen Cheng, Shu-Hong Lin, Che-Hsu Lin, Chun-Yuan Chen, Yu-Hsuan Chen, Yu-Che Lee, Jia-Wei Lin, Hsun-Wei Pao, Shih-Chieh Chang, Yi-Ting Li, Chun-Yao Wang
2024 B conf
LOOPLock 3.0: A Robust Cyclic Logic Locking Approach.
ASPDAC
Pei-Pei Chen, Xiang-Min Yang, Yu-Cheng He, Yung-Chih Chen, Yi-Ting Li, Chun-Yao Wang
2024 — conf
Model Reduction Using a Hybrid Approach of Genetic Algorithm and Rule-based Method.
SOCC
Wuqian Tang, Chuan-Shun Huang, Yung-Chih Chen, Yi-Ting Li, Shih-Chieh Chang, Chun-Yao Wang
2024 — conf
On Construction of Trajectory of Boxer's Punch using a single IMU.
ISPACS
Yu-Cheng Lee, Kai-Po Hsu, Yun-Ju Lee, Yi-Ting Li, Wuqian Tang, Yung-Chih Chen, Wen-Hsin Chiu, Chun-Yao Wang
2023 J jnl
A Constructive Approach for Threshold Function Identification.
ACM Trans. Design Autom. Electr. Syst.
Meng-Jing Li, Yu-Chuan Yen, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang
2023 — conf
A Flexible Cluster Tool Simulation Framework with Wafer Batch Dispatching Time Recommendation.
ISQED
Hsin-Ping Yen, Shiuan-Hau Huang, Yan-Hsiu Liu, Kuang-Hsien Tseng, Ji-Fu Kung, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang
2023 — conf
A Robust Approach to Detecting Non-Equivalent Quantum Circuits Using Specially Designed Stimuli.
ASP-DAC
Hsiao-Lun Liu, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang
2023 A conf
An Effective and Efficient Heuristic for Rational-Weight Threshold Logic Gate Identification.
DATE
Ting-Yu Yeh, Yueh Cho, Yung-Chih Chen
2023 — conf
Approximate Logic Synthesis by Genetic Algorithm with an Error Rate Guarantee.
ASP-DAC
Chun-Ting Lee, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang
2023 J jnl
Don't-Care-Based Logic Optimization for Threshold Logic.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yung-Chih Chen, Li-Cheng Zheng, Hao-Ju Chang
2023 A conf
Expanding In-Cone Obfuscated Tree for Anti SAT Attack.
DATE
Ruijie Wang, Li-Nung Hsu, Yung-Chih Chen, TingTing Hwang
2023 — conf
Optimization of Reversible Logic Networks with Gate Sharing.
ASP-DAC
Yung-Chih Chen, Feng-Jie Chao
2022 J jnl
A Don't-Care-Based Approach to Reducing the Multiplicative Complexity in Logic Networks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hsiao-Lun Liu, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang
2022 J jnl
A High Voltage Driving Chiplet in Standard 0.18-μm CMOS for Micro-Pixelated LED Displays Integrated With LTPS TFTs.
IEEE Trans. Circuits Syst. Video Technol.
Hsu-Chi Lee, Yun-Chih Lu, Yu-Chen Lin, Wei-Lin Lai, Hsiang-Yuan Hsieh, Boy-Yiing Jaw, Chin-Tang Chuang, Yung-Chih Chen, Yi-Jan Emery Chen
2022 A conf
An Approach to Unlocking Cyclic Logic Locking: LOOPLock 2.0.
ICCAD
Pei-Pei Chen, Xiang-Min Yang, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang
2022 J jnl
Don't Care Computation and De Morgan Transformation for Threshold Logic Network Optimization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chia-Chun Lin, Ciao-Syun Lin, You-Hsuen Tsai, Yung-Chih Chen, Chun-Yao Wang
2022 J jnl
LOOPLock 2.0: An Enhanced Cyclic Logic Locking Approach.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xiang-Min Yang, Pei-Pei Chen, Hsiao-Yu Chiang, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang
2022 J jnl
Majority Logic Circuit Minimization Using Node Addition and Removal.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chang-Cheng Ko, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang
2021 — conf
1st-Order to 2nd-Order Threshold Logic Gate Transformation with an Enhanced ILP-based Identification Method.
ASP-DAC
Li-Cheng Zheng, Hao-Ju Chang, Yung-Chih Chen, Jing-Yang Jou
2021 — conf
A General Equivalence Checking Framework for Multivalued Logic.
ASP-DAC
Chia-Chun Lin, Hsin-Ping Yen, Sheng-Hsiu Wei, Pei-Pei Chen, Yung-Chih Chen, Chun-Yao Wang
2021 — conf
An Efficient Approximate Node Merging with an Error Rate Guarantee.
ASP-DAC
Kit Seng Tam, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang
2021 — conf
An IMU-aided Fitness System.
SoCC
Yi-Ting Lin, Chun-Jui Chen, Pei-Yi Kuo, Si-Huei Lee, Chia-Chun Lin, Yun-Ju Lee, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang
2021 — conf
Cluster Tool Performance Analysis using Graph Database.
SoCC
Shiuan-Hau Huang, Hsin-Ping Yen, Yan-Hsiu Liu, Kuang-Hsien Tseng, Ji-Fu Kung, Chia-Chun Lin, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang
2021 J jnl
Diagnosis for Reconfigurable Single-Electron Transistor Arrays with a More Generalized Defect Model.
ACM J. Emerg. Technol. Comput. Syst.
Chia-Cheng Wu, Yi-Hsiang Hu, Chia-Chun Lin, Yung-Chih Chen, Juinn-Dar Huang, Chun-Yao Wang
2021 J jnl
Dynamic Workload Allocation for Edge Computing.
IEEE Trans. Very Large Scale Integr. Syst.
Yi-Wen Hung, Yung-Chih Chen, Chi Lo, Austin Go So, Shih-Chieh Chang
2021 — conf
On Reduction of Computations for Threshold Function Identification.
SoCC
Wen-Chih Hsu, Chia-Chun Lin, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang
2021 — conf
On Synthesizing Memristor-Based Logic Circuits in Area-Constrained Crossbar Arrays.
ISQED
Hsin-Tsung Lee, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang
2021 B conf
Towards Deep Learning-Based Sarcopenia Screening with Body Joint Composition Analysis.
ICIP
Yung-Chih Chen, Jun-Wei Hsieh, Yao-Hong Yang, Chien-Hung Lee, Pei-Yi Yu, Ping-Yang Chen, Arpita Samanta Santa
2020 A conf
A Convolutional Result Sharing Approach for Binarized Neural Network Inference.
DATE
Ya-Chun Chang, Chia-Chun Lin, Yi-Ting Lin, Yung-Chih Chen, Chun-Yao Wang
2020 — conf
A Dynamic Expansion Order Algorithm for the SAT-based Minimization.
SoCC
Chia-Chun Lin, Kit Seng Tam, Chana-Cheng Ko, Hsin-Ping Yen, Shenz-Hsiu Wei, Yung-Chih Chen, Chun-Yao Wang
2020 J jnl
A New Necessary Condition for Threshold Function Identification.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chia-Chun Lin, Chin-Heng Liu, Yung-Chih Chen, Chun-Yao Wang
2020 A conf
Accuracy Tolerant Neural Networks Under Aggressive Power Optimization.
DATE
Xiang-Xiu Wu, Yi-Wen Hung, Yung-Chih Chen, Shih-Chieh Chang
2020 A* conf
Don't-Care-Based Node Minimization for Threshold Logic Networks.
DAC
Yung-Chih Chen, Hao-Ju Chang, Li-Cheng Zheng
2020 — conf
IMU-based Smart Knee Pad for Walking Distance and Stride Count Measurement.
ISQED
Teng-Chia Wang, Yan-Ping Chang, Chun-Jui Chen, Yun-Ju Lee, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang
2020 J jnl
LOOPLock: Logic Optimization-Based Cyclic Logic Locking.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hsiao-Yu Chiang, Yung-Chih Chen, De-Xuan Ji, Xiang-Min Yang, Chia-Chun Lin, Chun-Yao Wang
2020 J jnl
Prediction of chronic kidney disease stages by renal ultrasound imaging.
Enterp. Inf. Syst.
Chi-Jim Chen, Tun-Wen Pai, Hui-Huang Hsu, Chien-Hung Lee, Kuo-Su Chen, Yung-Chih Chen
2020 — conf
Rehabilitation System for Limbs using IMUs.
ISQED
Chun-Jui Chen, Yi-Ting Lin, Chia-Chun Lin, Yung-Chih Chen, Yun-Ju Lee, Chun-Yao Wang
2020 J jnl
SMARTLock: SAT Attack and Removal Attack-Resistant Tree-Based Logic Locking.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Yung-Chih Chen
2019 — conf
A Glitch Key-Gate for Logic Locking.
SoCC
De-Xuan Ji, Hsiao-Yu Chiang, Chia-Chun Lin, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang
2019 — conf
A Smart Single-Sensor Device for Instantaneously Monitoring Lower Limb Exercises.
SoCC
Yan-Ping Chang, Teng-Chia Wang, Yun-Ju Lee, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang
2019 J jnl
Optimization of Threshold Logic Networks with Node Merging and Wire Replacement.
ACM Trans. Design Autom. Electr. Syst.
Yung-Chih Chen, Li-Cheng Zheng, Fu-Lian Wong
2019 J jnl
Threshold Function Identification by Redundancy Removal and Comprehensive Weight Assignments.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chin-Heng Liu, Chia-Chun Lin, Yung-Chih Chen, Chia-Cheng Wu, Chun-Yao Wang, Shigeru Yamashita
2018 — conf
A Hybrid Approach to Equivalent Fault Identification for Verification Environment Qualification.
ACM Great Lakes Symposium on VLSI
Chia-Cheng Wu, Tung-Yuan Lee, Yung-An Lai, Hsin-Pei Wang, De-Xuan Ji, Yan-Ping Chang, Teng-Chia Wang, Chin-Heng Liu, Chun-Yao Wang, Yung-Chih Chen
2018 J jnl
Contactless Testing for Prebond Interposers.
IEEE Trans. Very Large Scale Integr. Syst.
Kai-Hsiang Hsu, Yung-Chih Chen, You-Luen Lee, Shih-Chieh Chang
2018 A conf
Efficient synthesis of approximate threshold logic circuits with an error rate guarantee.
DATE
Yung-An Lai, Chia-Chun Lin, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang
2018 J jnl
Enhancements to SAT Attack: Speedup and Breaking Cyclic Logic Encryption.
ACM Trans. Design Autom. Electr. Syst.
Yung-Chih Chen
2018 A conf
Logic optimization with considering boolean relations.
DATE
Tung-Yuan Lee, Chia-Cheng Wu, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang
2018 J jnl
On Synthesizing Memristor-Based Logic Circuits With Minimal Operational Pulses.
IEEE Trans. Very Large Scale Integr. Syst.
Hsin-Pei Wang, Chia-Chun Lin, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang
2018 — conf
Optimization of threshold logic networks with ODC-based node merging.
VLSI-DAT
Fu-Lian Wong, Li-Cheng Zheng, Yung-Chih Chen
2018 — conf
Using range-equivalent circuits for facilitating bounded sequential equivalence checking.
VLSI-DAT
Yung-Chih Chen, Wei-An Ji, Chih-Chung Wang, Ching-Yi Huang, Chia-Cheng Wu, Chia-Chun Lin, Chun-Yao Wang
2017 J jnl
Dynamic Diagnosis for Defective Reconfigurable Single-Electron Transistor Arrays.
IEEE Trans. Very Large Scale Integr. Syst.
Yun-Jui Li, Ching-Yi Huang, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang, Suman Datta, Vijaykrishnan Narayanan
2017 — conf
In&Out: Restructuring for threshold logic network optimization.
ISQED
Chia-Chun Lin, Chiao-Wei Huang, Chun-Yao Wang, Yung-Chih Chen
2017 — conf
Majority logic circuits optimisation by node merging.
ASP-DAC
Chun-Che Chung, Yung-Chih Chen, Chun-Yao Wang, Chia-Cheng Wu
2017 — conf
Tree-Based Logic Encryption for Resisting SAT Attack.
ATS
Yung-Chih Chen
2016 J jnl
An Efficient Interpolation-Based Projected Sum of Product Decomposition via Genetic Algorithm.
J. Multiple Valued Log. Soft Comput.
Tai-Lin Chen, Chun-Yao Wang, Ching-Yi Huang, Yung-Chih Chen
2016 J jnl
Area-Aware Decomposition for Single-Electron Transistor Arrays.
ACM Trans. Design Autom. Electr. Syst.
Ching-Hsuan Ho, Yung-Chih Chen, Chun-Yao Wang, Ching-Yi Huang, Suman Datta, Vijaykrishnan Narayanan
2016 J jnl
Diagnosis and Synthesis for Defective Reconfigurable Single-Electron Transistor Arrays.
IEEE Trans. Very Large Scale Integr. Syst.
Ching-Yi Huang, Yun-Jui Li, Chian-Wei Liu, Chun-Yao Wang, Yung-Chih Chen, Suman Datta, Vijaykrishnan Narayanan
2016 — conf
Fast synthesis of threshold logic networks with optimization.
ASP-DAC
Yung-Chih Chen, Runyi Wang, Yan-Ping Chang
2016 J jnl
MSPlayer: Multi-Source and Multi-Path Video Streaming.
IEEE J. Sel. Areas Commun.
Yung-Chih Chen, Don Towsley, Ramin Khalili
2016 — conf
MajorSat: A SAT solver to majority logic.
ASP-DAC
Yu-Min Chou, Yung-Chih Chen, Chun-Yao Wang, Ching-Yi Huang
2016 J jnl
Minimization of Number of Neurons in Voronoi Diagram-Based Artificial Neural Networks.
IEEE Trans. Multi Scale Comput. Syst.
Chen-Yu Lin, Yung-Chih Chen, Chun-Yao Wang, Ching-Yi Huang, Chiou-Ting Hsu
2015 — conf
A defect-aware approach for mapping reconfigurable Single-Electron Transistor arrays.
ASP-DAC
Ching-Yi Huang, Chian-Wei Liu, Chun-Yao Wang, Yung-Chih Chen, Suman Datta, Vijaykrishnan Narayanan
2015 J jnl
Correctness Analysis and Power Optimization for Probabilistic Boolean Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Ching-Yi Huang, Zheng-Shan Yu, Yung-Chun Hu, Tung-Chen Tsou, Chun-Yao Wang, Yung-Chih Chen
2015 A conf
Design, implementation, and evaluation of energy-aware multi-path TCP.
CoNEXT
Yeon-Sup Lim, Yung-Chih Chen, Erich M. Nahum, Don Towsley, Richard J. Gibbens, Emmanuel Cecchet
2015 — conf
Measurement of body joint angles for physical therapy based on mean shift tracking using two low cost Kinect images.
EMBC
Yung-Chih Chen, H. J. Lee, K. H. Lin
2015 — conf
Synthesis and verification of cyclic combinational circuits.
SoCC
Jui-Hung Chen, Yung-Chih Chen, Wan-Chen Weng, Ching-Yi Huang, Chun-Yao Wang
2015 J jnl
Synthesis for Width Minimization in the Single-Electron Transistor Array.
IEEE Trans. Very Large Scale Integr. Syst.
Chian-Wei Liu, Chang-En Chiang, Ching-Yi Huang, Yung-Chih Chen, Chun-Yao Wang, Suman Datta, Vijaykrishnan Narayanan
2015 A conf
Using structural relations for checking combinationality of cyclic circuits.
DATE
Wan-Chen Weng, Yung-Chih Chen, Jui-Hung Chen, Ching-Yi Huang, Chun-Yao Wang
2014 A* conf
Cross-layer path management in multi-path transport protocol for mobile devices.
INFOCOM
Yeon-Sup Lim, Yung-Chih Chen, Erich M. Nahum, Don Towsley, Kang-Won Lee
2014 — conf
How green is multipath TCP for mobile devices?
AllThingsCellular@SIGCOMM
Yeon-Sup Lim, Yung-Chih Chen, Erich M. Nahum, Don Towsley, Richard J. Gibbens
2014 J jnl
Hybrid LUT and SOP Reconfigurable Architecture.
J. Inf. Sci. Eng.
Po-Yang Hsu, Yung-Chih Chen, Yi-Yu Liu
2014 J jnl
Improving Energy Efficiency of MPTCP for Mobile Devices.
CoRR
Yeon-Sup Lim, Yung-Chih Chen, Erich M. Nahum, Don Towsley, Richard J. Gibbens
2014 A conf
MSPlayer: Multi-Source and multi-Path LeverAged YoutubER.
CoNEXT
Yung-Chih Chen, Don Towsley, Ramin Khalili
2014 J jnl
MSPlayer: Multi-Source and multi-Path LeverAged YoutubER.
CoRR
Yung-Chih Chen, Don Towsley, Ramin Khalili
2014 A* conf
Multi-source multipath HTTP (mHTTP): a proposal.
SIGMETRICS
Juhoon Kim, Yung-Chih Chen, Ramin Khalili, Don Towsley, Anja Feldmann
2014 B conf
On bufferbloat and delay analysis of multipath TCP in wireless networks.
Networking
Yung-Chih Chen, Don Towsley
2014 A conf
Rewiring for threshold logic circuit minimization.
DATE
Chia-Chun Lin, Chun-Yao Wang, Yung-Chih Chen, Ching-Yi Huang
2014 — conf
SAT-based complete logic implication with application to logic optimization.
VLSI-DAT
Yung-Chih Chen, Kung-Ming Ji
2014 — conf
Stage diagnosis for Chronic Kidney Disease based on ultrasonography.
FSKD
Chi-Jim Chen, Tun-Wen Pai, Hamido Fujita, Chien-Hung Lee, Yang-Ting Chen, Kuo-Su Chen, Yung-Chih Chen
2014 A conf
Width minimization in the Single-Electron Transistor array synthesis.
DATE
Chian-Wei Liu, Chang-En Chiang, Ching-Yi Huang, Chun-Yao Wang, Yung-Chih Chen, Suman Datta, Vijaykrishnan Narayanan
2013 J jnl
A Synthesis Algorithm for Reconfigurable Single-Electron Transistor Arrays.
ACM J. Emerg. Technol. Comput. Syst.
Yung-Chih Chen, Soumya Eachempati, Chun-Yao Wang, Suman Datta, Yuan Xie, Vijaykrishnan Narayanan
2013 A conf
A measurement-based study of MultiPath TCP performance over wireless networks.
Internet Measurement Conference
Yung-Chih Chen, Yeon-Sup Lim, Richard J. Gibbens, Erich M. Nahum, Ramin Khalili, Don Towsley
2013 J jnl
Multi-Source Multi-Path HTTP (mHTTP): A Proposal.
CoRR
Juhoon Kim, Ramin Khalili, Anja Feldmann, Yung-Chih Chen, Don Towsley
2013 A conf
On reconfigurable single-electron transistor arrays synthesis using reordering techniques.
DATE
Chang-En Chiang, Li-Fu Tang, Chun-Yao Wang, Ching-Yi Huang, Yung-Chih Chen, Suman Datta, Vijaykrishnan Narayanan
2013 C conf
Pattern generation for Mutation Analysis using Genetic Algorithms.
ISCAS
Yen-Chi Yang, Chun-Yao Wang, Ching-Yi Huang, Yung-Chih Chen
2013 A conf
Sensitization criterion for threshold logic circuits and its application.
ICCAD
Chen-Kuan Tsai, Chun-Yao Wang, Ching-Yi Huang, Yung-Chih Chen
2013 J jnl
Verification of Reconfigurable Binary Decision Diagram-Based Single-Electron Transistor Arrays.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yung-Chih Chen, Chun-Yao Wang, Ching-Yi Huang
2012 A* conf
A mixed queueing network model of mobility in a campus wireless network.
INFOCOM
Yung-Chih Chen, Jim Kurose, Don Towsley
2012 A conf
A probabilistic analysis method for functional qualification under Mutation Analysis.
DATE
Hsiu-Yi Lin, Chun-Yao Wang, Shih-Chieh Chang, Yung-Chih Chen, Hsuan-Ming Chou, Ching-Yi Huang, Yen-Chi Yang, Chun-Chien Shen
2012 J jnl
Logic Restructuring Using Node Addition and Removal.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yung-Chih Chen, Chun-Yao Wang
2012 Misc conf
Ultrasonography Image Analysis for Detection and Classification of Chronic Kidney Disease.
CISIS
Chih-Yin Ho, Tun-Wen Pai, Yuan-Chi Peng, Chien-Hung Lee, Yung-Chih Chen, Yang-Ting Chen, Kuo-Su Chen
2011 Misc conf
A recursive SVD-based self-constructing rule generation for neuro-fuzzy system modeling.
ICMLC
Chen-Sen Ouyang, Chih-Chung Wang, Yung-Chih Chen
2011 — conf
A simple queueing network model of mobility in a campus wireless network.
S3@MobiCom
Yung-Chih Chen, Jim Kurose, Don Towsley
2011 A* conf
Automated mapping for reconfigurable single-electron transistor arrays.
DAC
Yung-Chih Chen, Soumya Eachempati, Chun-Yao Wang, Suman Datta, Yuan Xie, Vijaykrishnan Narayanan
2010 J jnl
An Analytical Study of People Mobility in Opportunistic Networks.
J. Inf. Sci. Eng.
Ling-Jyh Chen, Yung-Chih Chen
2010 J jnl
Fast Node Merging With Don't Cares Using Logic Implications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yung-Chih Chen, Chun-Yao Wang
2010 B conf
Group detection in mobility traces.
IWCMC
Yung-Chih Chen, Elisha J. Rosensweig, Jim Kurose, Donald F. Towsley
2010 A* conf
Node addition and removal in the presence of don't cares.
DAC
Yung-Chih Chen, Chun-Yao Wang
2009 — conf
A novel ACO-based pattern generation for peak power estimation in VLSI circuits.
ISQED
Yi-Ling Liu, Chun-Yao Wang, Yung-Chih Chen, Ya-Hsin Chang
2009 — conf
An efficient approach to sip design integration.
ISQED
Meng-Syue Chan, Chun-Yao Wang, Yung-Chih Chen
2009 J jnl
Dependent-Latch Identification in Reachable State Space.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chen-Hsuan Lin, Chun-Yao Wang, Yung-Chih Chen
2009 — conf
Enhancing SAT-based sequential depth computation by pruning search space.
ACM Great Lakes Symposium on VLSI
Yung-Chih Chen, Chun-Yao Wang
2009 A conf
Fast detection of node mergers using logic implications.
ICCAD
Yung-Chih Chen, Chun-Yao Wang
2008 — conf
A Novel Mobility Model from a Heterogeneous Military MANET Trace.
ADHOC-NOW
Xiaofeng Lu, Yung-Chih Chen, Ian X. Y. Leung, Zhang Xiong, Pietro Liò
2008 — conf
A Statistic-Based Approach to Testability Analysis.
ISQED
Chuang-Chi Chiou, Chun-Yao Wang, Yung-Chih Chen
2008 J jnl
An Implicit Approach to Minimizing Range-Equivalent Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yung-Chih Chen, Chun-Yao Wang
2008 J jnl
Novel Probabilistic Combinational Equivalence Checking.
IEEE Trans. Very Large Scale Integr. Syst.
Shih-Chieh Wu, Chun-Yao Wang, Yung-Chih Chen
2007 A* conf
Finding Self-Similarities in Opportunistic People Networks.
INFOCOM
Ling-Jyh Chen, Yung-Chih Chen, Tony Sun, Paruvelli Sreedevi, Kuan-Ta Chen, Chen-Hung Yu, Hao-Hua Chu
2006 — conf
A hybrid routing approach for opportunistic networks.
CHANTS@SIGCOMM
Ling-Jyh Chen, Chen-Hung Yu, Tony Sun, Yung-Chih Chen, Hao-Hua Chu
2006 — conf
Improving Bluetooth EDR Data Throughput Using FEC and Interleaving.
MSN
Ling-Jyh Chen, Tony Sun, Yung-Chih Chen
2006 — conf
Language-Based High Level Transaction Extraction on On-chip Buses.
ISQED
Yi-Le Huang, Chun-Yao Wang, Richard Yeh, Shih-Chieh Chang, Yung-Chih Chen
2005 C conf
An Improved Approach for AlternativeWires Identi.cation.
ICCD
Yung-Chih Chen, Chun-Yao Wang