Yun Liang - RankMe

228 papers A* 47A 42B 5C 5Misc 9Journal 83Unranked 37

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	A Full-Stack Framework for GNN Acceleration via Partition-Compiler-Architecture Co-Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yangjie Zhou, Zhihui Zhang, Shuwen Lu, Cong Guo, Jingwen Leng, Feng Zhang, Yufei Ma, Yun Liang, Minyi Guo
2026	—	`conf`	FESTAL: Dataflow Accelerator Synthesis Framework with Graph-Based Fusion for FPGA. ASP-DAC Ruifan Xu, Yuyang Zou, Yun Liang
2026	—	`conf`	Finding Reusable Instructions via E-Graph Anti-Unification. ASPLOS (2) Youwei Xiao, Chenyun Yin, Yitian Sun, Yuyang Zou, Yun Liang
2026	—	`conf`	HeteroLatch: A CPU-GPU Heterogeneous Latch-Aware Timing Analysis Engine. ASP-DAC Xizhe Shi, Zizheng Guo, Yibo Lin, Zuodong Zhang, Yun Liang, Runsheng Wang
2026	A*	`conf`	ORANGE: Exploring Ockham's Razor for Neural Rendering by Accelerating 3DGS on NPUs with GEMM-Friendly Blending and Balanced Workloads. HPCA Haomin Li, Yun Liang, Fangxin Liu, Bowen Zhu, Zongwu Wang, Yu Feng, Liqiang Lu, Li Jiang, Haibing Guan
2026	J	`jnl`	STDD:Spatio-Temporal Dynamics-Driven Token Refinement in Diffusion Language Models. CoRR Xinhao Sun, Maoliang Li, Zihao Zheng, Jiayu Chen, Hezhao Xu, Yun Liang, Xiang Chen
2026	A*	`conf`	TENET-v2: Applying Relation-Centric Notation to Model and Optimize Data Swizzle in the Cache of Modern NPU. HPCA Hanyu Zhang, Fangxu Guo, Liqiang Lu, Long Wang, Yunfei Du, Zhe Wang, Jinghan Zhang, Jie Zhang, Chenli Xue, Chengpeng Wu, Ziyi Zhang, Yun Liang, Size Zheng, Jianwei Yin
2025	—	`conf`	A Unified Synthesis Framework for Dataflow Accelerators Through Multi-level Software and Hardware Intermediate Representations. APPT Xiaochen Hao, Ruifan Xu, Yun Liang
2025	A*	`conf`	ARTERY: Fast Quantum Feedback using Branch Prediction. ISCA Wuwei Tian, Liqiang Lu, Siwei Tan, Yun Liang, Tingting Li, Kaiwen Zhou, Xinghui Jia, Jianwei Yin
2025	A	`conf`	An Empirical Comparision of LLM-based Hardware Design and High-level Synthesis. FPGA Fan Cui, Youwei Xiao, Kexing Zhou, Yun Liang
2025	J	`jnl`	Aquas: Enhancing Domain Specialization through Holistic Hardware-Software Co-Optimization based on MLIR. CoRR Yuyang Zou, Youwei Xiao, Yansong Xu, Chenyun Yin, Yuhao Luo, Yitian Sun, Ruifan Xu, Renze Chen, Yun Liang
2025	J	`jnl`	CIPHERMATCH: Accelerating Homomorphic Encryption-Based String Matching via Memory-Efficient Data Packing and In-Flash Processing. CoRR Mayank Kabra, Rakesh Nadig, Harshita Gupta, Rahul Bera, Manos Frouzakis, Vamanan Arulchelvan, Yun Liang, Haiyu Mao, Mohammad Sadrosadati, Onur Mutlu
2025	A*	`conf`	Cayman: Custom Accelerator Generation with Control Flow and Data Access Optimization. DAC Youwei Xiao, Fan Cui, Zizhang Luo, Weijie Peng, Yun Liang
2025	J	`jnl`	Cement2: Temporal Hardware Transactions for High-Level and Efficient FPGA Programming. CoRR Youwei Xiao, Zizhang Luo, Weijie Peng, Yuyang Zou, Yun Liang
2025	A	`conf`	DynamicSAT: Dynamic Configuration Tuning for SAT Solving. CP Zhengyuan Shi, Wentao Jiang, Xindi Zhang, Jin Luo, Yun Liang, Zhufei Chu, Qiang Xu
2025	J	`jnl`	FedHQ: Hybrid Runtime Quantization for Federated Learning. CoRR Zihao Zheng, Ziyao Wang, Xiuping Cui, Maoliang Li, Jiayu Chen, Yun Liang, Ang Li, Xiang Chen
2025	J	`jnl`	FlashDecoding++Next: High Throughput LLM Inference With Latency and Memory Optimization. IEEE Trans. Computers Guohao Dai, Ke Hong, Qiuli Mao, Xiuhong Li, Jiaming Xu, Haofeng Huang, Hongtu Xia, Xuefei Ning, Shengen Yan, Yun Liang, Yu Wang
2025	A	`conf`	Invited Paper: APS: Open-Source Hardware-Software Co-Design Framework for Agile Processor Specialization. ICCAD Youwei Xiao, Yuyang Zou, Yansong Xu, Yuhao Luo, Yitian Sun, Chenyun Yin, Ruifan Xu, Renze Chen, Yun Liang
2025	J	`jnl`	NOVA: Coordinated Test Selection and Bayes-Optimized Constrained Randomization for Accelerated Coverage Closure. CoRR Weijie Peng, Nanbing Li, Jin Luo, Shuai Wang, Yihui Li, Jun Fang, Yun Liang
2025	J	`jnl`	PAICORE: A 1.9-Million-Neuron 5.181-TSOPS/W Digital Neuromorphic Processor With Unified SNN-ANN and On-Chip Learning Paradigm. IEEE J. Solid State Circuits Yi Zhong, Yisong Kuang, Kefei Liu, Zilin Wang, Shuo Feng, Guang Chen, Youming Yang, Xiuping Cui, Qiankun Wang, Jian Cao, Song Jia, Yun Liang, Guangyu Sun, Xiaoxin Cui, Ru Huang, Yuan Wang
2025	J	`jnl`	Productively Generating a High-Performance Linear Algebra Library on FPGAs. ACM Trans. Reconfigurable Technol. Syst. Xiaochen Hao, Mingzhe Zhang, Ce Sun, Zhuofu Tao, Hongbo Rong, Yu Zhang, Lei He, Eric Petit, Wenguang Chen, Yun Liang
2025	J	`jnl`	R3A: Reliable RTL Repair Framework with Multi-Agent Fault Localization and Stochastic Tree-of-Thoughts Patch Generation. CoRR Zizhang Luo, Fan Cui, Kexing Zhou, Runlin Guo, Mile Xia, Hongyuan Hou, Yun Liang
2025	A*	`conf`	Rasengan: A Transition Hamiltonian-based Approximation Algorithm for Solving Constrained Binary Optimization Problems. MICRO Qifan Jiang, Liqiang Lu, Debin Xiang, Tianyao Chu, Tianze Zhu, Jingwen Leng, Yun Liang, Xiaoming Sun, Jianwei Yin
2025	—	`conf`	SOLA: Optimizing SLO Attainment for Large Language Model Serving with State-Aware Scheduling. MLSys Ke Hong, Xiuhong Li, Lufang Chen, Qiuli Mao, Guohao Dai, Xuefei Ning, Shengen Yan, Yun Liang, Yu Wang
2025	J	`jnl`	SkyEgg: Joint Implementation Selection and Scheduling for Hardware Synthesis using E-graphs. CoRR Youwei Xiao, Yuyang Zou, Yun Liang
2025	J	`jnl`	SlowPoke: Understanding and Detecting On-Chip Fail-Slow Failures in Many-Core Systems. CoRR Junchi Wu, Xinfei Wan, Zhuoran Li, Yuyang Jin, Guangyu Sun, Yun Liang, Diyu Zhou, Youwei Zhuo
2025	A	`conf`	StructILU: Dependency-Preserving Incomplete LU with Hierarchical Parallelism for Structured Grid PDEs on GPUs. ICS Hao Luo, Qianchao Zhu, Xiaochen Hao, Chunxi Lei, Chengdi Ma, Chenchen Zhang, Yun Liang, Chao Yang
2025	A*	`conf`	Telos: A Dataflow Accelerator for Sparse Triangular Solver of Partial Differential Equations. ISCA Xiaochen Hao, Hao Luo, Chu Wang, Chao Yang, Yun Liang
2025	J	`jnl`	Theseus: Exploring Efficient Wafer-Scale Chip Design for Large Language Models. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jingchen Zhu, Chenhao Xue, Yiqi Chen, Zhao Wang, Chen Zhang, Yu Shen, Yifan Chen, Zekang Cheng, Yu Jiang, Tianqi Wang, Yibo Lin, Wei Hu, Bin Cui, Runsheng Wang, Yun Liang, Guangyu Sun
2025	J	`jnl`	Trend-Aware Supervision: On Learning Invariance for Semi-Supervised Facial Action Unit Intensity Estimation. CoRR Yingjie Chen, Jiarui Zhang, Tao Wang, Yun Liang
2025	J	`jnl`	Triton-distributed: Programming Overlapping Kernels on Distributed AI Systems with the Triton Compiler. CoRR Size Zheng, Wenlei Bao, Qi Hou, Xuegui Zheng, Jin Fang, Chenhui Huang, Tianqi Li, Haojie Duanmu, Renze Chen, Ruifan Xu, Yifan Guo, Ningxin Zheng, Ziheng Jiang, Xinyi Di, Dongyang Wang, Jianxi Ye, Haibin Lin, Li-Wen Chang, Liqiang Lu, Yun Liang, Jidong Zhai, Xin Liu
2025	—	`conf`	Voyager: Input-Adaptive Algebraic Transformations for High-Performance Graph Neural Networks. ASPLOS (3) Yangjie Zhou, Wenting Shen, Jingwen Leng, Shuwen Lu, Zihan Liu, Weihao Cui, Zhendong Zhang, Wencong Xiao, Baole Ai, Yong Li, Wei Lin, Deze Zeng, Yun Liang, Quan Chen, Ning Liu, Minyi Guo
2024	A*	`conf`	A Holistic Functionalization Approach to Optimizing Imperative Tensor Programs in Deep Learning. DAC Jinming Ma, Xiuhong Li, Zihan Wang, Xingcheng Zhang, Shengen Yan, Yuting Chen, Yueqian Zhang, Minxi Jin, Lijuan Jiang, Yun Liang, Chao Yang, Dahua Lin
2024	—	`conf`	Amanda: Unified Instrumentation Framework for Deep Neural Networks. ASPLOS (1) Yue Guan, Yuxian Qiu, Jingwen Leng, Fan Yang, Shuo Yu, Yunxin Liu, Yu Feng, Yuhao Zhu, Lidong Zhou, Yun Liang, Chen Zhang, Chao Li, Minyi Guo
2024	A*	`conf`	ArkVale: Efficient Generative LLM Inference with Recallable Key-Value Eviction. NeurIPS Renze Chen, Zhuofeng Wang, Beiquan Cao, Tong Wu, Size Zheng, Xiuhong Li, Xuechao Wei, Shengen Yan, Meng Li, Yun Liang
2024	A	`conf`	Cement: Streamlining FPGA Hardware Design with Cycle-Deterministic eHDL and Synthesis. FPGA Youwei Xiao, Zizhang Luo, Kexing Zhou, Yun Liang
2024	J	`jnl`	Erratum to: Large circuit models: opportunities and challenges. Sci. China Inf. Sci. Lei Chen, Yiqi Chen, Zhufei Chu, Wenji Fang, Tsung-Yi Ho, Ru Huang, Yu Huang, Sadaf Khan, Min Li, Xingquan Li, Yu Li, Yun Liang, Jinwei Liu, Yi Liu, Yibo Lin, Guojie Luo, Hongyang Pan, Zhengyuan Shi, Guangyu Sun, Dimitrios Tsaras, Runsheng Wang, Ziyi Wang, Xinming Wei, Zhiyao Xie, Qiang Xu, Chenhao Xue, Junchi Yan, Jun Yang, Bei Yu, Mingxuan Yuan, Evangeline F. Y. Young, Xuan Zeng, Haoyi Zhang, Zuodong Zhang, Yuxiang Zhao, Hui-Ling Zhen, Ziyang Zheng, Binwu Zhu, Keren Zhu, Sunan Zou
2024	A	`conf`	FlexHE: A flexible Kernel Generation Framework for Homomorphic Encryption-Based Private Inference. ICCAD Jiangrui Yu, Wenxuan Zeng, Tianshi Xu, Renze Chen, Yun Liang, Runsheng Wang, Ru Huang, Meng Li
2024	A	`conf`	HeLEM-GR: Heterogeneous Global Routing with Linearized Exponential Multiplier Method. ICCAD Chunyuan Zhao, Zizheng Guo, Rui Wang, Zaiwen Wen, Yun Liang, Yibo Lin
2024	A	`conf`	Hermes: Enhancing Extensibility in High-Level Synthesis through Multi-Level IRs. FPGA Ruifan Xu, Jin Luo, Yun Liang
2024	A*	`conf`	Hestia: An Efficient Cross-Level Debugger for High-Level Synthesis. MICRO Ruifan Xu, Jin Luo, Yawen Zhang, Yibo Lin, Runsheng Wang, Ru Huang, Yun Liang
2024	A	`conf`	Hierarchical Power Co-Optimization and Management for LLM Chiplet Designs. ICCAD Yanchi Dong, Xueping Liu, Xiaochen Hao, Yun Liang, Ru Huang, Le Ye, Tianyu Jia
2024	J	`jnl`	Large circuit models: opportunities and challenges. Sci. China Inf. Sci. Lei Chen, Yiqi Chen, Zhufei Chu, Wenji Fang, Tsung-Yi Ho, Ru Huang, Yu Huang, Sadaf Khan, Min Li, Xingquan Li, Yu Li, Yun Liang, Jinwei Liu, Yi Liu, Yibo Lin, Guojie Luo, Hongyang Pan, Zhengyuan Shi, Guangyu Sun, Dimitrios Tsaras, Runsheng Wang, Ziyi Wang, Xinming Wei, Zhiyao Xie, Qiang Xu, Chenhao Xue, Junchi Yan, Jun Yang, Bei Yu, Mingxuan Yuan, Evangeline F. Y. Young, Xuan Zeng, Haoyi Zhang, Zuodong Zhang, Yuxiang Zhao, Hui-Ling Zhen, Ziyang Zheng, Binwu Zhu, Keren Zhu, Sunan Zou
2024	—	`conf`	MAGIS: Memory Optimization via Coordinated Graph Transformation and Scheduling for DNN. ASPLOS (3) Renze Chen, Zijian Ding, Size Zheng, Chengrui Zhang, Jingwen Leng, Xuanzhe Liu, Yun Liang
2024	A	`conf`	MCUBERT: Memory-Efficient BERT Inference on Commodity Microcontrollers. ICCAD Zebin Yang, Renze Chen, Taiqiang Wu, Ngai Wong, Yun Liang, Runsheng Wang, Ru Huang, Meng Li
2024	J	`jnl`	MCUBERT: Memory-Efficient BERT Inference on Commodity Microcontrollers. CoRR Zebin Yang, Renze Chen, Taiqiang Wu, Ngai Wong, Yun Liang, Runsheng Wang, Ru Huang, Meng Li
2024	A*	`conf`	MoteNN: Memory Optimization via Fine-grained Scheduling for Deep Neural Networks on Tiny Devices. DAC Renze Chen, Zijian Ding, Size Zheng, Meng Li, Yun Liang
2024	J	`jnl`	Open-Source Acceleration of Stable-Diffusion.cpp. CoRR Jingxu Ng, Cheng Lv, Pu Zhao, Wei Niu, Juyi Lin, Minzhou Pan, Yun Liang, Yanzhi Wang
2024	A	`conf`	OriGen: Enhancing RTL Code Generation with Code-to-Code Augmentation and Self-Reflection. ICCAD Fan Cui, Chenyang Yin, Kexing Zhou, Youwei Xiao, Guangyu Sun, Qiang Xu, Qipeng Guo, Yun Liang, Xingcheng Zhang, Demin Song, Dahua Lin
2024	J	`jnl`	OriGen:Enhancing RTL Code Generation with Code-to-Code Augmentation and Self-Reflection. CoRR Fan Cui, Chenyang Yin, Kexing Zhou, Youwei Xiao, Guangyu Sun, Qiang Xu, Qipeng Guo, Demin Song, Dahua Lin, Xingcheng Zhang, Yun Liang
2024	—	`conf`	PIM-DL: Expanding the Applicability of Commodity DRAM-PIMs for Deep Learning via Algorithm-System Co-Optimization. ASPLOS (2) Cong Li, Zhe Zhou, Yang Wang, Fan Yang, Ting Cao, Mao Yang, Yun Liang, Guangyu Sun
2024	A	`conf`	POPA: Expressing High and Portable Performance across Spatial and Vector Architectures for Tensor Computations. FPGA Xiaochen Hao, Hongbo Rong, Mingzhe Zhang, Ce Sun, Hong H. Jiang, Yun Liang
2024	J	`jnl`	Proteus: Simulating the Performance of Distributed DNN Training. IEEE Trans. Parallel Distributed Syst. Jiangfei Duan, Xiuhong Li, Ping Xu, Xingcheng Zhang, Shengen Yan, Yun Liang, Dahua Lin
2024	—	`conf`	QuFEM: Fast and Accurate Quantum Readout Calibration Using the Finite Element Method. ASPLOS (2) Siwei Tan, Liqiang Lu, Hanyu Zhang, Jia Yu, Congliang Lang, Yongheng Shang, Xinkui Zhao, Mingshuai Chen, Yun Liang, Jianwei Yin
2024	J	`jnl`	Rubick: A Unified Infrastructure for Analyzing, Exploring, and Implementing Spatial Architectures via Dataflow Decomposition. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Liqiang Lu, Zizhang Luo, Size Zheng, Jieming Yin, Jason Cong, Yun Liang, Jianwei Yin
2024	—	`conf`	SpecPIM: Accelerating Speculative Inference on PIM-Enabled System via Architecture-Dataflow Co-Exploration. ASPLOS (3) Cong Li, Zhe Zhou, Size Zheng, Jiaxi Zhang, Yun Liang, Guangyu Sun
2024	J	`jnl`	The Dawn of AI-Native EDA: Promises and Challenges of Large Circuit Models. CoRR Lei Chen, Yiqi Chen, Zhufei Chu, Wenji Fang, Tsung-Yi Ho, Yu Huang, Sadaf Khan, Min Li, Xingquan Li, Yun Liang, Yibo Lin, Jinwei Liu, Yi Liu, Guojie Luo, Zhengyuan Shi, Guangyu Sun, Dimitrios Tsaras, Runsheng Wang, Ziyi Wang, Xinming Wei, Zhiyao Xie, Qiang Xu, Chenhao Xue, Evangeline F. Y. Young, Bei Yu, Mingxuan Yuan, Haoyi Zhang, Zuodong Zhang, Yuxiang Zhao, Hui-Ling Zhen, Ziyang Zheng, Binwu Zhu, Keren Zhu, Sunan Zou
2024	A*	`conf`	Trend-Aware Supervision: On Learning Invariance for Semi-supervised Facial Action Unit Intensity Estimation. AAAI Yingjie Chen, Jiarui Zhang, Tao Wang, Yun Liang
2024	—	`conf`	vMCU: Coordinated Memory Management and Kernel Optimization for DNN Inference on MCUs. MLSys Size Zheng, Renze Chen, Meng Li, Zihao Ye, Luis Ceze, Yun Liang
2024	J	`jnl`	vMCU: Coordinated Memory Management and Kernel Optimization for DNN Inference on MCUs. CoRR Size Zheng, Renze Chen, Meng Li, Zihao Ye, Luis Ceze, Yun Liang
2023	A*	`conf`	A Model-Specific End-to-End Design Methodology for Resource-Constrained TinyML Hardware. DAC Yanchi Dong, Tianyu Jia, Kaixuan Du, Yiqi Jing, Qijun Wang, Pixian Zhan, Yadong Zhang, Fengyun Yan, Yufei Ma, Yun Liang, Le Ye, Ru Huang
2023	J	`jnl`	ALEGO: Towards Cost-Aware Architecture and Integration Co-Design for Chiplet-based Spatial Accelerators. CoRR Xiaochen Hao, Zijian Ding, Jieming Yin, Yuan Wang, Yun Liang
2023	A	`conf`	ARES: A Mapping Framework of DNNs Towards Diverse PIMs with General Abstractions. ICCAD Xiuping Cui, Size Zheng, Tianyu Jia, Le Ye, Yun Liang
2023	J	`jnl`	Automatic Generation of Spatial Accelerator for Tensor Algebra. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Liancheng Jia, Zizhang Luo, Liqiang Lu, Yun Liang
2023	B	`conf`	Calabash: Accelerating Attention Using a Systolic Array Chain on FPGAs. FPL Zizhang Luo, Liqiang Lu, Yicheng Jin, Liancheng Jia, Yun Liang
2023	A*	`conf`	Chimera: An Analytical Optimizing Framework for Effective Compute-intensive Operators Fusion. HPCA Size Zheng, Siyuan Chen, Peidi Song, Renze Chen, Xiuhong Li, Shengen Yan, Dahua Lin, Jingwen Leng, Yun Liang
2023	A	`conf`	EventFormer: AU Event Transformer for Facial Action Unit Event Detection. BMVC Yingjie Chen, Jiarui Zhang, Tao Wang, Yun Liang
2023	A*	`conf`	Khronos: Fusing Memory Access for Improved Hardware RTL Simulation. MICRO Kexing Zhou, Yun Liang, Yibo Lin, Runsheng Wang, Ru Huang
2023	Misc	`conf`	Lasa: Abstraction and Specialization for Productive and Performant Linear Algebra on FPGAs. FCCM Xiaochen Hao, Mingzhe Zhang, Ce Sun, Zhuofu Tao, Hongbo Rong, Yu Zhang, Lei He, Eric Petit, Wenguang Chen, Yun Liang
2023	A*	`conf`	Memory and Computation Coordinated Mapping of DNNs onto Complex Heterogeneous SoC. DAC Size Zheng, Siyuan Chen, Yun Liang
2023	A	`conf`	Memory-aware Scheduling for Complex Wired Networks with Iterative Graph Optimization. ICCAD Shuzhang Zhong, Meng Li, Yun Liang, Runsheng Wang, Ru Huang
2023	J	`jnl`	Memory-aware Scheduling for Complex Wired Networks with Iterative Graph Optimization. CoRR Shuzhang Zhong, Meng Li, Yun Liang, Runsheng Wang, Ru Huang
2023	A	`conf`	Monad: Towards Cost-Effective Specialization for Chiplet-Based Spatial Accelerators. ICCAD Xiaochen Hao, Zijian Ding, Jieming Yin, Yuan Wang, Yun Liang
2023	—	`conf`	OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit. ASICON Jing Mai, Jiarui Wang, Zhixiong Di, Guojie Luo, Yun Liang, Yibo Lin
2023	J	`jnl`	OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit. CoRR Jing Mai, Jiarui Wang, Zhixiong Di, Guojie Luo, Yun Liang, Yibo Lin
2023	J	`jnl`	Proteus: Simulating the Performance of Distributed DNN Training. CoRR Jiangfei Duan, Xiuhong Li, Ping Xu, Xingcheng Zhang, Shengen Yan, Yun Liang, Dahua Lin
2023	A*	`conf`	Rubick: A Synthesis Framework for Spatial Architectures via Dataflow Decomposition. DAC Zizhang Luo, Liqiang Lu, Size Zheng, Jieming Yin, Jason Cong, Jianwei Yin, Yun Liang
2023	J	`jnl`	Special Issue: "AI Acceleration on FPGAs". ACM Trans. Embed. Comput. Syst. Yun Liang, Wei Zhang, Stephen Neuendorffer, Wayne Luk
2023	A	`conf`	Stronger Mixed-Size Placement Backbone Considering Second-Order Information. ICCAD Yifan Chen, Zaiwen Wen, Yun Liang, Yibo Lin
2023	A*	`conf`	TileFlow: A Framework for Modeling Fusion Dataflow via Tree-based Analysis. MICRO Size Zheng, Siyuan Chen, Siyuan Gao, Liancheng Jia, Guangyu Sun, Runsheng Wang, Yun Liang
2022	—	`conf`	A Mapping Model of SNNs to Neuromorphic Hardware. AICAS Xiuping Cui, Xiaochen Hao, Yun Liang, Guangyu Sun, Xiaoxin Cui, Yuan Wang, Ru Huang
2022	A*	`conf`	AMOS: enabling automatic mapping for tensor computations on spatial accelerators with hardware abstraction. ISCA Size Zheng, Renze Chen, Anjiang Wei, Yicheng Jin, Qin Han, Liqiang Lu, Bingyang Wu, Xiuhong Li, Shengen Yan, Yun Liang
2022	J	`jnl`	An Efficient Hardware Design for Accelerating Sparse CNNs With NAS-Based Models. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yun Liang, Liqiang Lu, Yicheng Jin, Jiaming Xie, Ruirui Huang, Jiansong Zhang, Wei Lin
2022	A*	`conf`	Causal Intervention for Subject-Deconfounded Facial Action Unit Recognition. AAAI Yingjie Chen, Diqi Chen, Tao Wang, Yizhou Wang, Yun Liang
2022	J	`jnl`	Causal Intervention for Subject-Deconfounded Facial Action Unit Recognition. CoRR Yingjie Chen, Diqi Chen, Tao Wang, Yizhou Wang, Yun Liang
2022	J	`jnl`	Critique of "MemXCT: Memory-Centric X-Ray CT Reconstruction With Massive Parallelization" by SCC Team From Peking University. IEEE Trans. Parallel Distributed Syst. Zejia Fan, Yuchen Gu, Zhewen Hao, Yueyang Pan, Pengcheng Xu, Yuxuan Yan, Fangyuan Yang, Zhenxin Fu, Yun Liang
2022	—	`conf`	Downscaling and Overflow-aware Model Compression for Efficient Vision Processors. ICDCS Workshops Haokun Li, Jing Liu, Liancheng Jia, Yun Liang, Yaowei Wang, Mingkui Tan
2022	A*	`conf`	EMS: efficient memory subsystem synthesis for spatial accelerators. DAC Liancheng Jia, Yuyue Wang, Jingwen Leng, Yun Liang
2022	J	`jnl`	EventFormer: AU Event Transformer for Facial Action Unit Event Detection. CoRR Yingjie Chen, Jiarui Zhang, Diqi Chen, Tao Wang, Yizhou Wang, Yun Liang
2022	J	`jnl`	FCNNLib: A Flexible Convolution Algorithm Library for Deep Learning on FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yun Liang, Qingcheng Xiao, Liqiang Lu, Jiaming Xie
2022	A	`conf`	HECTOR: A Multi-Level Intermediate Representation for Hardware Synthesis Methodologies. ICCAD Ruifan Xu, Youwei Xiao, Jin Luo, Yun Liang
2022	—	`conf`	Message from the General Chair and Program Co-Chairs. FPT Wei Zhang, Ray C. C. Cheung, Yun Liang, Hiroki Nakahara
2022	J	`jnl`	Morphling: A Reconfigurable Architecture for Tensor Computation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Liqiang Lu, Yun Liang
2022	J	`jnl`	NeoFlow: A Flexible Framework for Enabling Efficient Compilation for High Performance DNN Training. IEEE Trans. Parallel Distributed Syst. Size Zheng, Renze Chen, Yicheng Jin, Anjiang Wei, Bingyang Wu, Xiuhong Li, Shengen Yan, Yun Liang
2022	—	`conf`	On Mitigating Hard Clusters for Face Clustering. ECCV (12) Yingjie Chen, Huasong Zhong, Chong Chen, Chen Shen, Jianqiang Huang, Tao Wang, Yun Liang, Qianru Sun
2022	J	`jnl`	On Mitigating Hard Clusters for Face Clustering. CoRR Yingjie Chen, Huasong Zhong, Chong Chen, Chen Shen, Jianqiang Huang, Tao Wang, Yun Liang, Qianru Sun
2022	J	`jnl`	Optimized separable convolution: Yet another efficient convolution operator. AI Open Tao Wei, Yonghong Tian, Yaowei Wang, Yun Liang, Chang Wen Chen
2022	—	`conf`	Preface. FPT Yun Liang, Hiroki Nakahara, Wei Zhang, Fubing Mao, Ray C. C. Cheung
2022	A*	`conf`	Pursuing Knowledge Consistency: Supervised Hierarchical Contrastive Learning for Facial Action Unit Recognition. ACM Multimedia Yingjie Chen, Chong Chen, Xiao Luo, Jianqiang Huang, Xian-Sheng Hua, Tao Wang, Yun Liang
2022	A	`conf`	Towards Agile DNN Accelerator Design Using Incremental Synthesis on FPGAs. FPGA Qingcheng Xiao, Yun Liang
2021	—	`conf`	AUPro: Multi-label Facial Action Unit Proposal Generation for Sequence-Level Analysis. ICONIP (3) Yingjie Chen, Jiarui Zhang, Diqi Chen, Tao Wang, Yizhou Wang, Yun Liang
2021	—	`conf`	Analyzing the Design Space of Spatial Tensor Accelerators on FPGAs. ISVLSI Liancheng Jia, Zizhang Luo, Liqiang Lu, Yun Liang
2021	J	`jnl`	BISWSRBS: A Winograd-based CNN Accelerator with a Fine-grained Regular Sparsity Pattern and Mixed Precision Quantization. ACM Trans. Reconfigurable Technol. Syst. Tao Yang, Zhezhi He, Tengchuan Kou, Qingzheng Li, Qi Han, Haibao Yu, Fangxin Liu, Yun Liang, Li Jiang
2021	A*	`conf`	CaFGraph: Context-aware Facial Multi-graph Representation for Facial Action Unit Recognition. ACM Multimedia Yingjie Chen, Diqi Chen, Yizhou Wang, Tao Wang, Yun Liang
2021	—	`conf`	Characterizing and Demystifying the Implicit Convolution Algorithm on Commercial Matrix-Multiplication Accelerators. IISWC Yangjie Zhou, Mengtian Yang, Cong Guo, Jingwen Leng, Yun Liang, Quan Chen, Minyi Guo, Yuhao Zhu
2021	J	`jnl`	Characterizing and Demystifying the Implicit Convolution Algorithm on Commercial Matrix-Multiplication Accelerators. CoRR Yangjie Zhou, Mengtian Yang, Cong Guo, Jingwen Leng, Yun Liang, Quan Chen, Minyi Guo, Yuhao Zhu
2021	J	`jnl`	Critique of "Planetary Normal Mode Computation: Parallel Algorithms, Performance, and Reproducibility" by SCC Team From Peking University. IEEE Trans. Parallel Distributed Syst. Yihua Cheng, Zejia Fan, Jing Mai, Yifan Wu, Pengcheng Xu, Yuxuan Yan, Zhenxin Fu, Yun Liang
2021	J	`jnl`	Cross-Modal Representation Learning for Lightweight and Accurate Facial Action Unit Detection. IEEE Robotics Autom. Lett. Yingjie Chen, Han Wu, Tao Wang, Yizhou Wang, Yun Liang
2021	A*	`conf`	HASCO: Towards Agile HArdware and Software CO-design for Tensor Computation. ISCA Qingcheng Xiao, Size Zheng, Bingzhe Wu, Pengcheng Xu, Xuehai Qian, Yun Liang
2021	J	`jnl`	HASCO: Towards Agile HArdware and Software CO-design for Tensor Computation. CoRR Qingcheng Xiao, Size Zheng, Bingzhe Wu, Pengcheng Xu, Xuehai Qian, Yun Liang
2021	J	`jnl`	OMNI: A Framework for Integrating Hardware and Software Optimizations for Sparse CNNs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yun Liang, Liqiang Lu, Jiaming Xie
2021	J	`jnl`	Preface. J. Comput. Sci. Technol. Chao Li, Yun Liang
2021	A*	`conf`	Sanger: A Co-Design Framework for Enabling Sparse Attention using Reconfigurable Architecture. MICRO Liqiang Lu, Yicheng Jin, Hangrui Bi, Zizhang Luo, Peng Li, Tao Wang, Yun Liang
2021	A*	`conf`	TENET: A Framework for Modeling Tensor Dataflow Based on Relation-centric Notation. ISCA Liqiang Lu, Naiqing Guan, Yuyue Wang, Liancheng Jia, Zizhang Luo, Jieming Yin, Jason Cong, Yun Liang
2021	J	`jnl`	TENET: A Framework for Modeling Tensor Dataflow Based on Relation-centric Notation. CoRR Liqiang Lu, Naiqing Guan, Yuyue Wang, Liancheng Jia, Zizhang Luo, Jieming Yin, Jason Cong, Yun Liang
2021	A*	`conf`	TensorLib: A Spatial Accelerator Generation Framework for Tensor Algebra. DAC Liancheng Jia, Zizhang Luo, Liqiang Lu, Yun Liang
2021	J	`jnl`	TensorLib: A Spatial Accelerator Generation Framework for Tensor Algebra. CoRR Liancheng Jia, Zizhang Luo, Liqiang Lu, Yun Liang
2020	B	`conf`	A Winograd-Based CNN Accelerator with a Fine-Grained Regular Sparsity Pattern. FPL Tao Yang, Yunkun Liao, Jianping Shi, Yun Liang, Naifeng Jing, Li Jiang
2020	J	`jnl`	Enabling Efficient Fast Convolution Algorithms on GPUs via MegaKernels. IEEE Trans. Computers Liancheng Jia, Yun Liang, Xiuhong Li, Liqiang Lu, Shengen Yan
2020	J	`jnl`	Evaluating Fast Algorithms for Convolutional Neural Networks on FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yun Liang, Liqiang Lu, Qingcheng Xiao, Shengen Yan
2020	A*	`conf`	FCNNLib: An Efficient and Flexible Convolution Algorithm Library on FPGAs. DAC Qingcheng Xiao, Liqiang Lu, Jiaming Xie, Yun Liang
2020	A*	`conf`	FlexTensor: An Automatic Schedule Exploration and Optimization Framework for Tensor Computation on Heterogeneous System. ASPLOS Size Zheng, Yun Liang, Shuo Wang, Renze Chen, Kaiwen Sheng
2020	J	`jnl`	Fork Path: Batching ORAM Requests to Remove Redundant Memory Accesses. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jingchen Zhu, Guangyu Sun, Xian Zhang, Chao Zhang, Weiqi Zhang, Yun Liang, Tao Wang, Yiran Chen, Jia Di
2020	J	`jnl`	Fune: An FPGA Tuning Framework for CNN Acceleration. IEEE Des. Test Qingcheng Xiao, Yun Liang
2020	J	`jnl`	Generating Systolic Array Accelerators With Reusable Blocks. IEEE Micro Liancheng Jia, Liqiang Lu, Xuechao Wei, Yun Liang
2020	J	`jnl`	Performance Modeling and Directives Optimization for High-Level Synthesis on FPGA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jieru Zhao, Liang Feng, Sharad Sinha, Wei Zhang, Yun Liang, Bingsheng He
2020	A	`conf`	SuSy: A Programming Model for Productive Construction of High-Performance Systolic Arrays on FPGAs. ICCAD Yi-Hsiang Lai, Hongbo Rong, Size Zheng, Weihao Zhang, Xiuping Cui, Yunshan Jia, Jie Wang, Brendan Sullivan, Zhiru Zhang, Yun Liang, Youhui Zhang, Jason Cong, Nithin George, Jose Alvarez, Christopher J. Hughes, Pradeep Dubey
2020	J	`jnl`	Systolic Computing on GPUs for Productive Performance. CoRR Hongbo Rong, Xiaochen Hao, Yun Liang, Lidong Xu, Hong H. Jiang, Pradeep Dubey
2019	B	`conf`	A Survey on 5G Network Slicing Enabling the Smart Grid. ICPADS Xu Xia, Lei Zhang, Chengli Mei, Jinyan Li, Xuetian Zhu, Yun Liang, Jeffrey Song
2019	B	`conf`	A coordinated tiling and batching framework for efficient GEMM on GPUs. PPoPP Xiuhong Li, Yun Liang, Shengen Yan, Liancheng Jia, Yinghan Li
2019	Misc	`conf`	An Efficient Hardware Accelerator for Sparse Convolutional Neural Networks on FPGAs. FCCM Liqiang Lu, Jiaming Xie, Ruirui Huang, Jiansong Zhang, Wei Lin, Yun Liang
2019	A	`conf`	CuLDA: Solving Large-scale LDA Problems on GPUs. HPDC Xiaolong Xie, Yun Liang, Xiuhong Li, Wei Tan
2019	B	`conf`	CuLDA_CGS: solving large-scale LDA problems on GPUs. PPoPP Xiaolong Xie, Yun Liang, Xiuhong Li, Wei Tan
2019	A*	`conf`	E-LSTM: Efficient Inference of Sparse LSTM on Embedded Heterogeneous System. DAC Runbin Shi, Junjie Liu, Hayden Kwok-Hay So, Shuo Wang, Yun Liang
2019	C	`conf`	Frequency Improvement of Systolic Array-Based CNNs on FPGAs. ISCAS Jiaxi Zhang, Wentai Zhang, Guojie Luo, Xuechao Wei, Yun Liang, Jason Cong
2019	—	`conf`	LexicalAT: Lexical-Based Adversarial Reinforcement Training for Robust Sentiment Classification. EMNLP/IJCNLP (1) Jingjing Xu, Liang Zhao, Hanqi Yan, Qi Zeng, Yun Liang, Xu Sun
2019	A	`conf`	Overcoming Data Transfer Bottlenecks in DNN Accelerators via Layer-Conscious Memory Managment. FPGA Xuechao Wei, Yun Liang, Peng Zhang, Cody Hao Yu, Jason Cong
2019	A*	`conf`	Overcoming Data Transfer Bottlenecks in FPGA-based DNN Accelerators via Layer Conscious Memory Management. DAC Xuechao Wei, Yun Liang, Jason Cong
2019	A*	`conf`	Poly: Efficient Heterogeneous System and Application Management for Interactive Applications. HPCA Shuo Wang, Yun Liang, Wei Zhang
2019	A	`conf`	REQ-YOLO: A Resource-Aware, Efficient Quantization Framework for Object Detection on FPGAs. FPGA Caiwen Ding, Shuo Wang, Ning Liu, Kaidi Xu, Yanzhi Wang, Yun Liang
2019	J	`jnl`	REQ-YOLO: A Resource-Aware, Efficient Quantization Framework for Object Detection on FPGAs. CoRR Caiwen Ding, Shuo Wang, Ning Liu, Kaidi Xu, Yanzhi Wang, Yun Liang
2019	—	`conf`	SPART: Optimizing CNNs by Utilizing Both Sparsity of Weights and Feature Maps. APPT Jiaming Xie, Yun Liang
2019	A	`conf`	Speedy: An Accelerator for Sparse Convolutional Neural Networks on FPGAs. FPGA Liqiang Lu, Yun Liang, Ruirui Huang, Wei Lin, Xiaoyuan Cui, Jiansong Zhang
2019	A	`conf`	Zac: Towards Automatic Optimization and Deployment of Quantized Deep Neural Networks on Embedded Devices. ICCAD Qingcheng Xiao, Yun Liang
2018	J	`jnl`	A Unified Framework of DNN Weight Pruning and Weight Clustering/Quantization Using ADMM. CoRR Shaokai Ye, Tianyun Zhang, Kaiqi Zhang, Jiayu Li, Jiaming Xie, Yun Liang, Sijia Liu, Xue Lin, Yanzhi Wang
2018	—	`conf`	Analytical Two-Level Near Threshold Cache Exploration for Low Power Biomedical Applications. ACA Yun Liang, Shuo Wang, Tulika Mitra, Yajun Ha
2018	A	`conf`	C-LSTM: Enabling Efficient LSTM using Structured Compression Techniques on FPGAs. FPGA Shuo Wang, Zhe Li, Caiwen Ding, Bo Yuan, Qinru Qiu, Yanzhi Wang, Yun Liang
2018	J	`jnl`	C-LSTM: Enabling Efficient LSTM using Structured Compression Techniques on FPGAs. CoRR Shuo Wang, Zhe Li, Caiwen Ding, Bo Yuan, Yanzhi Wang, Qinru Qiu, Yun Liang
2018	Misc	`conf`	CAMAS: Static and Dynamic Hybrid Cache Management for CPU-FPGA Platforms. FCCM Liang Feng, Sharad Sinha, Wei Zhang, Yun Liang
2018	J	`jnl`	CRAT: Enabling Coordinated Register Allocation and Thread-Level Parallelism Optimization for GPUs. IEEE Trans. Computers Xiaolong Xie, Yun Liang, Xiuhong Li, Yudong Wu, Guangyu Sun, Tao Wang, Dongrui Fan
2018	J	`jnl`	CuLDA_CGS: Solving Large-scale LDA Problems on GPUs. CoRR Xiaolong Xie, Yun Liang, Xiuhong Li, Wei Tan
2018	—	`conf`	Efficient Recurrent Neural Networks using Structured Matrices in FPGAs. ICLR (Workshop) Zhe Li, Shuo Wang, Caiwen Ding, Qinru Qiu, Yanzhi Wang, Yun Liang
2018	J	`jnl`	Efficient Recurrent Neural Networks using Structured Matrices in FPGAs. CoRR Zhe Li, Shuo Wang, Caiwen Ding, Qinru Qiu, Yanzhi Wang, Yun Liang
2018	J	`jnl`	Exploiting Sparsity to Accelerate Fully Connected Layers of CNN-Based Applications on Mobile SoCs. ACM Trans. Embed. Comput. Syst. Xinfeng Xie, Dayou Du, Qian Li, Yun Liang, Wai Teng Tang, Zhongliang Ong, Mian Lu, Huynh Phung Huynh, Rick Siow Mong Goh
2018	J	`jnl`	FlexCL: A Model of Performance and Power for OpenCL Workloads on FPGAs. IEEE Trans. Computers Yun Liang, Shuo Wang, Wei Zhang
2018	J	`jnl`	Optimizing Cache Bypassing and Warp Scheduling for GPUs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yun Liang, Xiaolong Xie, Yu Wang, Guangyu Sun, Tao Wang
2018	A*	`conf`	SpWA: an efficient sparse winograd convolutional neural networks accelerator on FPGAs. DAC Liqiang Lu, Yun Liang
2018	J	`jnl`	Student Cluster Competition 2017, Team Peking University: Reproducing vectorization of the Tersoff multi-body potential on the Intel Broadwell architecture. Parallel Comput. Zhenxin Fu, Lei Yang, Wenbin Hou, Zhuohan Li, Yifan Wu, Yihua Cheng, Xiaolin Wang, Yun Liang
2018	A	`conf`	TGPA: tile-grained pipeline architecture for low latency CNN inference. ICCAD Xuechao Wei, Yun Liang, Xiuhong Li, Cody Hao Yu, Peng Zhang, Jason Cong
2018	A	`conf`	cuMBIR: An Efficient Framework for Low-dose X-ray CT Image Reconstruction on GPUs. ICS Xiuhong Li, Yun Liang, Wentai Zhang, Taide Liu, Haochen Li, Guojie Luo, Ming Jiang
2017	A*	`conf`	A Comprehensive Framework for Synthesizing Stencil Algorithms on FPGAs using OpenCL Model. DAC Shuo Wang, Yun Liang
2017	A	`conf`	A Framework for Iterative Stencil Algorithm Synthesis on FPGAs from OpenCL Programming Model (Abstract Only). FPGA Shuo Wang, Yun Liang
2017	A	`conf`	A hybrid approach to cache management in heterogeneous CPU-FPGA platforms. ICCAD Liang Feng, Sharad Sinha, Wei Zhang, Yun Liang
2017	A*	`conf`	Automated Systolic Array Architecture Synthesis for High Throughput CNN Inference on FPGAs. DAC Xuechao Wei, Cody Hao Yu, Peng Zhang, Youxiang Chen, Yuxin Wang, Han Hu, Yun Liang, Jason Cong
2017	A	`conf`	COMBA: A comprehensive model-based analysis framework for high level synthesis of real applications. ICCAD Jieru Zhao, Liang Feng, Sharad Sinha, Wei Zhang, Yun Liang, Bingsheng He
2017	A	`conf`	CuMF_SGD: Parallelized Stochastic Gradient Descent for Matrix Factorization on GPUs. HPDC Xiaolong Xie, Wei Tan, Liana L. Fong, Yun Liang
2017	A	`conf`	Design Space exploration of FPGA-based accelerators with multi-level parallelism. DATE Guanwen Zhong, Alok Prakash, Siqi Wang, Yun Liang, Tulika Mitra, Smaïl Niar
2017	J	`jnl`	Efficient Kernel Management on GPUs. ACM Trans. Embed. Comput. Syst. Yun Liang, Xiuhong Li
2017	C	`conf`	Enabling high performance deep learning networks on embedded systems. IECON Qian Li, Qingcheng Xiao, Yun Liang
2017	Misc	`conf`	Evaluating Fast Algorithms for Convolutional Neural Networks on FPGAs. FCCM Liqiang Lu, Yun Liang, Qingcheng Xiao, Shengen Yan
2017	A*	`conf`	Exploring Heterogeneous Algorithms for Accelerating Deep Convolutional Neural Networks on FPGAs. DAC Qingcheng Xiao, Yun Liang, Liqiang Lu, Shengen Yan, Yu-Wing Tai
2017	A	`conf`	Exploring cache bypassing and partitioning for multi-tasking on GPUs. ICCAD Yun Liang, Xiuhong Li, Xiaolong Xie
2017	A*	`conf`	FlexCL: An Analytical Performance Model for OpenCL Workloads on Flexible FPGAs. DAC Shuo Wang, Yun Liang, Wei Zhang
2017	J	`jnl`	ParConnect reproducibility report. Parallel Comput. Lei Yang, Yilong Li, Zhenxin Fu, Zhuohan Li, Wenbin Hou, Haoze Wu, Xiaolin Wang, Yun Liang
2017	—	`conf`	Programming FPGAs Using OpenCL from Performance Model to Application Study. ETCD@ASPLOS Yun Liang
2017	J	`jnl`	Scale-Free Sparse Matrix-Vector Multiplication on Many-Core Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yun Liang, Wai Teng Tang, Ruizhe Zhao, Mian Lu, Huynh Phung Huynh, Rick Siow Mong Goh
2017	—	`conf`	Throughput optimization for streaming applications on CPU-FPGA heterogeneous systems. ASP-DAC Xuechao Wei, Yun Liang, Tao Wang, Songwu Lu, Jason Cong
2016	J	`jnl`	An Accurate GPU Performance Model for Effective Control Flow Divergence Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yun Liang, Muhammad Teguh Satria, Kyle Rupnow, Deming Chen
2016	J	`jnl`	CuMF_SGD: Fast and Scalable Matrix Factorization. CoRR Xiaolong Xie, Wei Tan, Liana L. Fong, Yun Liang
2016	A	`conf`	Efficient kernel management on GPUs. DATE Xiuhong Li, Yun Liang
2016	J	`jnl`	FCUDA-HB: Hierarchical and Scalable Bus Architecture Generation on FPGAs With the FCUDA Flow. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ying Chen, Tan Nguyen, Yao Chen, Swathi T. Gurumani, Yun Liang, Kyle Rupnow, Jason Cong, Wen-mei W. Hwu, Deming Chen
2016	J	`jnl`	FCUDA-NoC: A Scalable and Efficient Network-on-Chip Implementation for the CUDA-to-FPGA Flow. IEEE Trans. Very Large Scale Integr. Syst. Yao Chen, Swathi T. Gurumani, Yun Liang, Guofeng Li, Donghui Guo, Kyle Rupnow, Deming Chen
2016	A*	`conf`	Lin-analyzer: a high-level performance analysis tool for FPGA-based accelerators. DAC Guanwen Zhong, Alok Prakash, Yun Liang, Tulika Mitra, Smaïl Niar
2016	J	`jnl`	Performance-Centric Optimization for Racetrack Memory Based Register File on GPUs. J. Comput. Sci. Technol. Yun Liang, Shuo Wang
2016	—	`conf`	Performance-centric register file design for GPUs using racetrack memory. ASP-DAC Shuo Wang, Yun Liang, Chao Zhang, Xiaolong Xie, Guangyu Sun, Yongpan Liu, Yu Wang, Xiuhong Li
2015	J	`jnl`	An Efficient Compiler Framework for Cache Bypassing on GPUs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yun Liang, Xiaolong Xie, Guangyu Sun, Deming Chen
2015	A*	`conf`	Coordinated static and dynamic cache bypassing for GPUs. HPCA Xiaolong Xie, Yun Liang, Yu Wang, Guangyu Sun, Tao Wang
2015	J	`jnl`	Efficient GPU Spatial-Temporal Multitasking. IEEE Trans. Parallel Distributed Syst. Yun Liang, Huynh Phung Huynh, Kyle Rupnow, Rick Siow Mong Goh, Deming Chen
2015	A*	`conf`	Enabling coordinated register allocation and thread-level parallelism optimization for GPUs. MICRO Xiaolong Xie, Yun Liang, Xiuhong Li, Yudong Wu, Guangyu Sun, Tao Wang, Dongrui Fan
2015	A*	`conf`	Fork path: improving efficiency of ORAM by removing redundant memory accesses. MICRO Xian Zhang, Guangyu Sun, Chao Zhang, Weiqi Zhang, Yun Liang, Tao Wang, Yiran Chen, Jia Di
2015	A*	`conf`	Hi-fi playback: tolerating position errors in shift operations of racetrack memory. ISCA Chao Zhang, Guangyu Sun, Xian Zhang, Weiqi Zhang, Weisheng Zhao, Tao Wang, Yun Liang, Yongpan Liu, Yu Wang, Jiwu Shu
2015	J	`jnl`	Instruction Cache Locking Using Temporal Reuse Profile. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yun Liang, Tulika Mitra, Lei Ju
2015	J	`jnl`	MrPhi: An Optimized MapReduce Framework on Intel Xeon Phi Coprocessors. IEEE Trans. Parallel Distributed Syst. Mian Lu, Yun Liang, Huynh Phung Huynh, Zhongliang Ong, Bingsheng He, Rick Siow Mong Goh
2015	A	`conf`	Optimizing and auto-tuning scale-free sparse matrix-vector multiplication on Intel Xeon Phi. CGO Wai Teng Tang, Ruizhe Zhao, Mian Lu, Yun Liang, Huynh Phung Huyng, Xibai Li, Rick Siow Mong Goh
2015	—	`conf`	Quantitative performance and power analysis of LTE using high level synthesis. ASICON Yun Liang, Shuo Wang
2014	C	`conf`	Design space exploration of multiple loops on FPGAs using high level synthesis. ICCD Guanwen Zhong, Vanchinathan Venkataramani, Yun Liang, Tulika Mitra, Smaïl Niar
2014	C	`conf`	GPU Accelerated Counterexample Generation in LTL Model Checking. ICFEM Zhimin Wu, Yang Liu, Yun Liang, Jun Sun
2014	Misc	`conf`	Integrated CUDA-to-FPGA Synthesis with Network-on-Chip. FCCM Swathi T. Gurumani, Jacob Tolar, Yao Chen, Yun Liang, Kyle Rupnow, Deming Chen
2014	C	`conf`	Rapid design space exploration of two-level unified caches. ISCAS Jingyu Deng, Yun Liang, Guojie Luo, Guangyu Sun
2014	A*	`conf`	Run-Time Technique for Simultaneous Aging and Power Optimization in GPGPUs. DAC Xiaoming Chen, Yu Wang, Yun Liang, Yuan Xie, Huazhong Yang
2014	A	`conf`	WCET-Centric dynamic instruction cache locking. DATE Huping Ding, Yun Liang, Tulika Mitra
2013	J	`jnl`	An analytical approach for fast and accurate design space exploration of instruction caches. ACM Trans. Embed. Comput. Syst. Yun Liang, Tulika Mitra
2013	A	`conf`	An efficient compiler framework for cache bypassing on GPUs. ICCAD Xiaolong Xie, Yun Liang, Guangyu Sun, Deming Chen
2013	—	`conf`	High-level synthesis of multiple dependent CUDA kernels on FPGA. ASP-DAC Swathi T. Gurumani, Hisham Cholakkal, Yun Liang, Kyle Rupnow, Deming Chen
2013	A	`conf`	Improving high level synthesis optimization opportunity through polyhedral transformations. FPGA Wei Zuo, Yun Liang, Peng Li, Kyle Rupnow, Deming Chen, Jason Cong
2013	A*	`conf`	Integrated instruction cache analysis and locking in multitasking real-time systems. DAC Huping Ding, Yun Liang, Tulika Mitra
2013	J	`jnl`	Optimizing the MapReduce Framework on Intel Xeon Phi Coprocessor. CoRR Mian Lu, Lei Zhang, Huynh Phung Huynh, Zhongliang Ong, Yun Liang, Bingsheng He, Rick Siow Mong Goh, Richard Huynh
2013	—	`conf`	Optimizing the MapReduce framework on Intel Xeon Phi coprocessor. IEEE BigData Mian Lu, Lei Zhang, Huynh Phung Huynh, Zhongliang Ong, Yun Liang, Bingsheng He, Rick Siow Mong Goh, Richard Huynh
2013	—	`conf`	Register and thread structure optimization for GPUs. ASP-DAC Yun Liang, Zheng Cui, Kyle Rupnow, Deming Chen
2013	—	`conf`	Shared cache aware task mapping for WCRT minimization. ASP-DAC Huping Ding, Yun Liang, Tulika Mitra
2013	A*	`conf`	Throughput-oriented kernel porting onto FPGAs. DAC Alexandros Papakonstantinou, Deming Chen, Wen-mei W. Hwu, Jason Cong, Yun Liang
2012	A	`conf`	An Accurate GPU Performance Model for Effective Control Flow Divergence Optimization. IPDPS Zheng Cui, Yun Liang, Kyle Rupnow, Deming Chen
2012	J	`jnl`	High-Level Synthesis: Productivity, Performance, and Software Constraints. J. Electr. Comput. Eng. Yun Liang, Kyle Rupnow, Yinan Li, Dongbo Min, Minh N. Do, Deming Chen
2012	A	`conf`	Real-time implementation and performance optimization of 3D sound localization on GPUs. DATE Yun Liang, Zheng Cui, Shengkui Zhao, Kyle Rupnow, Yihao Zhang, Douglas L. Jones, Deming Chen
2012	J	`jnl`	Timing analysis of concurrent programs running on shared cache multi-cores. Real Time Syst. Yun Liang, Huping Ding, Tulika Mitra, Abhik Roychoudhury, Yan Li, Vivy Suhendra
2012	A*	`conf`	WCET-centric partial instruction cache locking. DAC Huping Ding, Yun Liang, Tulika Mitra
2011	—	`conf`	A study of high-level synthesis: Promises and challenges. ASICON Kyle Rupnow, Yun Liang, Yinan Li, Deming Chen
2011	—	`conf`	High level synthesis of stereo matching: Productivity, performance, and software constraints. FPT Kyle Rupnow, Yun Liang, Yinan Li, Dongbo Min, Minh N. Do, Deming Chen
2011	Misc	`conf`	Multilevel Granularity Parallelism Synthesis on FPGAs. FCCM Alexandros Papakonstantinou, Yun Liang, John A. Stratton, Karthik Gururaj, Deming Chen, Wen-mei W. Hwu, Jason Cong
2010	—	`conf`	An Efficient Algorithm to Estimate Real-time Traffic Information based on Multiple Data Sources. ICAART (1) Bowen Du, Yun Liang, Dianfu Ma, Weifeng Lv, Tongyu Zhu
2010	—	`conf`	Efficient custom instructions generation for system-level design. FPT Huynh Phung Huynh, Yun Liang, Tulika Mitra
2010	Misc	`conf`	Improved procedure placement for set associative caches. CASES Yun Liang, Tulika Mitra
2010	A*	`conf`	Instruction cache locking using temporal reuse profile. DAC Yun Liang, Tulika Mitra
2009	J	`jnl`	Cache-aware optimization of BAN applications. Des. Autom. Embed. Syst. Lei Ju, Yun Liang, Samarjit Chakraborty, Tulika Mitra, Abhik Roychoudhury
2009	A	`conf`	Timing Analysis of Concurrent Programs Running on Shared Cache Multi-Cores. RTSS Yan Li, Vivy Suhendra, Yun Liang, Tulika Mitra, Abhik Roychoudhury
2008	A*	`conf`	Cache modeling in probabilistic execution time analysis. DAC Yun Liang, Tulika Mitra
2008	Misc	`conf`	Cache-aware optimization of BAN applications. CODES+ISSS Yun Liang, Lei Ju, Samarjit Chakraborty, Tulika Mitra, Abhik Roychoudhury
2008	Misc	`conf`	Static analysis for fast and accurate design space exploration of caches. CODES+ISSS Yun Liang, Tulika Mitra