| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2025 | J | jnl |
Neuromorph. Comput. Eng.
|
| 2025 | J | jnl |
IEICE Trans. Electron.
|
| 2024 | J | jnl |
IEEE Access
|
| 2022 | J | jnl |
IEICE Trans. Electron.
|
| 2021 | J | jnl |
IEICE Trans. Electron.
|
| 2018 | J | jnl |
IEICE Trans. Electron.
|
| 2016 | J | jnl |
IEICE Trans. Electron.
|
| 2016 | J | jnl |
High-speed demonstration of low-power 1 k-bit shift-register memories using LR-biasing SFQ circuits.
IEICE Electron. Express
|
| 2016 | J | jnl |
IEICE Trans. Electron.
|
| 2015 | J | jnl |
IEICE Trans. Electron.
|
| 2014 | J | jnl |
IEICE Trans. Electron.
|
| 2014 | J | jnl |
IEICE Trans. Electron.
|
| 2014 | J | jnl |
IEICE Trans. Electron.
|
| 2014 | A | conf |
IROS
|
| 2014 | C | conf |
RC
|
| 2010 | J | jnl |
IEICE Trans. Electron.
|
| 2010 | J | jnl |
Access time measurement of 64-kb Josephson-CMOS hybrid memories using SFQ time-to-digital converter.
IEICE Electron. Express
|
| 2010 | J | jnl |
IEICE Trans. Electron.
|
| 2010 | J | jnl |
IEICE Trans. Electron.
|
| 2009 | J | jnl |
IEICE Electron. Express
|
| 2008 | J | jnl |
IEICE Trans. Electron.
|