Yuji Kukimoto

18 papers A* 5A 7B 2C 1Unranked 3
YearRankTypeTitle / Venue / Authors
2024 — conf
Calibration-Based Differentiable Timing Optimization in Non-linear Global Placement.
ISPD
Wuxi Li, Yuji Kukimoto, Grégory Servel, Ismail Bustany, Mehrdad E. Dehkordi
2002 — conf
On convergence of switching windows computation in presence of crosstalk noise.
ISPD
Pinhong Chen, Yuji Kukimoto, Chin-Chi Teng, Kurt Keutzer
2002 A conf
Refining switching window by time slots for crosstalk noise calculation.
ICCAD
Pinhong Chen, Yuji Kukimoto, Kurt Keutzer
1999 A conf
Timing-safe false path removal for combinational modules.
ICCAD
Yuji Kukimoto, Robert K. Brayton
1998 A conf
Combinational Verification based on High-Level Functional Specifications.
DATE
Evguenii I. Goldberg, Yuji Kukimoto, Robert K. Brayton
1998 A* conf
Delay-Optimal Technology Mapping by DAG Covering.
DAC
Yuji Kukimoto, Robert K. Brayton, Prashant Sawkar
1998 A* conf
Hierarchical Functional Timing Analysis.
DAC
Yuji Kukimoto, Robert K. Brayton
1997 A conf
Approximate timing analysis of combinational circuits under the XBD0 model.
ICCAD
Yuji Kukimoto, Wilsin Gosti, Alexander Saldanha, Robert K. Brayton
1997 A* conf
Exact Required Time Analysis via False Path Detection.
DAC
Yuji Kukimoto, Robert K. Brayton
1996 B conf
VIS.
FMCAD
Robert K. Brayton, Gary D. Hachtel, Alberto L. Sangiovanni-Vincentelli, Fabio Somenzi, Adnan Aziz, Szu-Tsung Cheng, Stephen A. Edwards, Sunil P. Khatri, Yuji Kukimoto, Abelardo Pardo, Shaz Qadeer, Rajeev K. Ranjan, Shaker Sarwary, Thomas R. Shiple, Gitanjali Swamy, Tiziano Villa
1996 A* conf
VIS: A System for Verification and Synthesis.
CAV
Robert K. Brayton, Gary D. Hachtel, Alberto L. Sangiovanni-Vincentelli, Fabio Somenzi, Adnan Aziz, Szu-Tsung Cheng, Stephen A. Edwards, Sunil P. Khatri, Yuji Kukimoto, Abelardo Pardo, Shaz Qadeer, Rajeev K. Ranjan, Shaker Sarwary, Thomas R. Shiple, Gitanjali Swamy, Tiziano Villa
1994 A conf
A redesign technique for combinational circuits based on gate reconnections.
ICCAD
Yuji Kukimoto, Masahiro Fujita, Robert K. Brayton
1992 B conf
Patching Method for Lookup-Table Type FPLs.
FPL
Masahiro Fujita, Yuji Kukimoto
1992 A conf
Rectification method for lookup-table type FPGA's.
ICCAD
Yuji Kukimoto, Masahiro Fujita
1991 A conf
Application of Boolean Unification to Combinational Logic Synthesis.
ICCAD
Masahiro Fujita, Yutaka Tamiya, Yuji Kukimoto, Kuang-Chien Chen
1990 A* conf
A Data Path Verifier for Register Transfer Level Using Temporal Logic Language Tokio.
CAV
Hiroshi Nakamura, Yuji Kukimoto, Masahiro Fujita, Hidehiko Tanaka
1990 — conf
A Data Path Verifier for Register Transfer Level Using Temporal Logic Language Tokio.
CAV (DIMACS/AMS volume)
Hiroshi Nakamura, Yuji Kukimoto, Masahiro Fujita, Hidehiko Tanaka
1990 C conf
Practical design assistance at register transfer level using a data path verifier.
ICCD
Hiroshi Nakamura, Yuji Kukimoto, Masahiro Fujita, Hidehiko Tanaka