Yuejun Zhang

85 papers B 2C 3Journal 48Unranked 32
YearRankTypeTitle / Venue / Authors
2026 J jnl
A High-Precision Third-Order Sigma-Delta Modulator Circuit Design.
J. Circuits Syst. Comput.
Chuanbo Xie, Xinpeng Di, Yan Li, Yuejun Zhang, Pengjun Wang
2026 — conf
A Low-Power 12-lead Arrhythmia Detection SoC Featuring a Reconfigurable CNN and Mixed-Precision Computing.
ASP-DAC
Yuejun Zhang, Hanyu Shi, Qikang Li, Huihong Zhang, Xinyu Li, Qingxin Xie, Zhenkai Zhou, Pengjun Wang
2026 J jnl
Feistel-PUF: Sequential Obfuscation-Based Machine Learning Attack-Resistant Physical Unclonable Function for IoT Device Security Authentication.
IEEE Internet Things J.
Gang Li, Liangxiao Zhao, Ziyu Zhou, Pengjun Wang, Xuejiao Ma, Yuejun Zhang, Zhenghe Wang
2025 J jnl
A 578-TOPS/W RRAM-Based Binary Convolutional Neural Network Macro for Tiny AI Edge Devices.
IEEE Trans. Very Large Scale Integr. Syst.
Lixun Wang, Yuejun Zhang, Pengjun Wang, Jianguo Yang, Huihong Zhang, Gang Li, Qikang Li
2025 J jnl
A Hierarchical Cooperative Authentication Protocol for Attack-Resilient UAV Swarms With Ultra-Low Overhead.
IEEE Trans. Inf. Forensics Secur.
Shuang Hu, Ziyu Zhou, Pengjun Wang, Yuejun Zhang
2025 J jnl
A Novel Porcelain Fingerprinting Technique.
IEEE Trans. Emerg. Top. Comput.
Chengjie Wang, Yuejun Zhang, Ziyu Zhou
2025 J jnl
A Pay-Per-ISE RISC-V Processor With Hardware-Assisted Orthogonal Obfuscation.
IEEE Trans. Very Large Scale Integr. Syst.
Yuejun Zhang, Lixun Wang, Jiawei Wang, Yongzhong Wen, Huihong Zhang, Gang Li, Pengjun Wang
2025 J jnl
A Strong PUF-Based Security Protocol to Protect AI Model Parameters Against Privacy Information Leakage.
IEEE Internet Things J.
Ziyu Zhou, Gang Li, Yuejun Zhang, Ziyang Zheng, Tengfei Yuan, Pengjun Wang
2025 J jnl
ATSS-PUF with hardware sharing for secure in-situ memory circuit.
Integr.
Shutong Zhang, Pengjun Wang, Mengfan Xv, Bo Chen, Yuejun Zhang
2025 J jnl
An overclocking clock software PUF circuit with no additional hardware resource overhead based on video coding circuit.
Integr.
Tengfei Yuan, Pengjun Wang, Yuejun Zhang, Ziyu Zhou
2025 J jnl
Attention mechanism based IP design for dynamic channel selection in EEG epilepsy detect.
Microelectron. J.
Ying Wang, Lixun Wang, Yuejun Zhang, Yi Gong, Hanyu Shi, Huihong Zhang, Pengjun Wang
2025 J jnl
Improving the Stability of APUF to 100% Without Extra Hardware Overhead for Enhancing the Performance of Security Authentication Protocols.
IEEE Internet Things J.
Ziyu Zhou, Pengjun Wang, Gang Li, Shuang Hu, Yuejun Zhang
2024 — conf
A Lightweight Folded Keccak-Based SHA-3 for Resource-Constrained Embedded Security.
MCSoC
Siqi Xiong, Dongsheng Liu, Jiahao Lu, Aobo Li, Tianze Huang, Chenjun Yang, Ang Hu, Yuejun Zhang
2024 — conf
A Physical Unclonable Function Feature Extraction Technique for Oil Paintings Copyright Protection.
ITC-Asia
Chengjie Wang, Yuejun Zhang, Shengjie Fu, Lixun Wang
2024 J jnl
An efficient ANN SoC for detecting Alzheimer's disease based on recurrent computing.
Comput. Biol. Medicine
Zhikang Chen, Yuejun Zhang, Ziyu Zhou, Lixun Wang, Huihong Zhang, Pengjun Wang, Jinyan Xu
2024 J jnl
Distance optimization KNN and EMD based lightweight hardware IP core design for EEG epilepsy detection.
Microelectron. J.
Xuanxu Chen, Yuejun Zhang, Guangpeng Ai, Lixun Wang, Huihong Zhang, Xiangyu Li, Pengjun Wang
2024 J jnl
High-performance and low-power decoder circuits for SRAMs using mixed-logic scheme.
Integr.
Donghao Xia, Yuejun Zhang, Yuanxin Tian, Mengfan Xu, Liang Wen
2024 J jnl
Lightweight skin cancer detection IP hardware implementation using cycle expansion and optimal computation arrays methods.
Comput. Biol. Medicine
Qikang Li, Yuejun Zhang, Lixun Wang, Huihong Zhang, Penjun Wang, Minghong Gu, Suling Xu
2024 J jnl
Novel crosstalk circuit design for high density logic applications.
Microelectron. J.
Huihong Zhang, Zhiwei Zhao, Hongshuai Wei, Yuejun Zhang, Pengjun Wang
2024 J jnl
SI PUF: An SRAM and Inverter-Based PUF With a Bit Error Rate of 0.0053% and 0.073/0.042 pJ/bit.
IEEE Trans. Circuits Syst. II Express Briefs
Li Ni, Pengjun Wang, Yuejun Zhang, Xiangyu Li, Gang Li, Lin Ding, Jiliang Zhang
2023 J jnl
A 7-nm-Based 5R4W High-Timing Reliability Regfile Circuit.
IET Circuits Devices Syst.
Wanlong Zhao, Yuejun Zhang, Liang Wen, Pengjun Wang
2023 — conf
A 7nm-Based Decodable Self-Resetting Regfile Circuit.
ASICON
Wanlong Zhao, Yuejun Zhang, Mingze Ren, Liang Wen, Pengjun Wang
2023 J jnl
A lightweight convolutional neural network hardware implementation for wearable heart rate anomaly detection.
Comput. Biol. Medicine
Minghong Gu, Yuejun Zhang, Yongzhong Wen, Guangpeng Ai, Huihong Zhang, Pengjun Wang, Guoqing Wang
2023 — conf
An Architecture of a Single-Event Tolerant D Flip-flop Using Full-Custom Design in 28nm Process.
ASICON
Yuanxin Tian, Yuejun Zhang, Huihong Zhang, Liang Wen, Pengjun Wang, Zhiyi Li
2023 — conf
An Efficient Hash Computing Unit for Kyber Algorithm.
ASICON
Hongshuai Wei, Yuejun Zhang, Huihong Zhang, Yang Wang, Tengfei Yuan, Chengjie Wang, Pengjun Wang
2023 J jnl
Convolutional neural network-based lightweight hardware IP core design for EEG epilepsy prediction.
Microelectron. J.
Guangpeng Ai, Yuejun Zhang, Yongzhong Wen, Minghong Gu, Huihong Zhang, Pengjun Wang
2023 J jnl
Design of a Novel Self-Test-on-Chip Interface ASIC for Capacitive Accelerometers.
IEEE Trans. Circuits Syst. I Regul. Pap.
Xiangyu Li, Pengjun Wang, Gang Li, Yuejun Zhang
2023 — conf
Full-custom Design of Improved Carry Adder Circuit for CLBs.
ASICON
Mengfan Xu, Yuejun Zhang, Huihong Zhang, Liang Wen, Tengfei Yuan, Pengjun Wang, Zhiyi Li
2023 — conf
High-Performance Rejection Sampling Hardware Circuit Design for Kyber.
ASICON
Yang Wang, Huihong Zhang, Yuejun Zhang, Hongshuai Wei, Pengjun Wang, Tengfei Yuan, Chengjie Wang
2023 — conf
Highly Reliable Physical Unclonable Function Based on ZnO-SnO2 Gas Sensor.
ASICON
Haonan He, Pengjun Wang, Xiangyu Li, Li Ni, Yuejun Zhang
2023 J jnl
PI PUF: A Processor-Intrinsic PUF for IoT.
Comput. Electr. Eng.
Li Ni, Pengjun Wang, Yuejun Zhang, Gang Li, Lin Ding, Jiliang Zhang
2023 J jnl
Profiling side-channel attacks based on CNN model fusion.
Microelectron. J.
Lei Ni, Pengjun Wang, Yuejun Zhang, Huihong Zhang, Xiangyu Li, Li Ni, Jie Lv, Weifang Zheng
2023 — conf
Ternary Multiply-Accumulate Circuit Based on Domino Structure.
ASICON
Hanyu Shi, Yuejun Zhang, Huihong Zhang, Qikang Li, Pengjun Wang
2022 J jnl
A 28 nm 512 Kb adjacent 2T2R RRAM PUF with interleaved cell mirroring and self-adaptive splitting for high density and low BER cryptographic key in IoT devices.
Microelectron. J.
Jianguo Yang, Ruijun Lin, Keji Zhou, Yuejun Zhang, Xiaoyong Xue, Hangbing Lv
2022 J jnl
A 65nm/0.448 mW EEG processor with parallel architecture SVM and lifting wavelet transform for high-performance and low-power epilepsy detection.
Comput. Biol. Medicine
Yongzhong Wen, Yuejun Zhang, Liang Wen, Haojie Cao, Guangpeng Ai, Minghong Gu, Pengjun Wang, Huiling Chen
2022 J jnl
A configurable detection chip with ±0.6% Inaccuracy for liquid conductivity using dual-frequency sinusoidal signal technique in 65 nm CMOS.
Microelectron. J.
Ye Lin, Yuejun Zhang, Shengjie Fu, Huihong Zhang, Pengjun Wang
2022 J jnl
A stable voltage island-driven floorplanning with fixed-outline constraint for low power SoC.
Microelectron. J.
Shimin Du, Runping Yang, Yuejun Zhang, Yu Shenglu
2022 J jnl
An ACF.
Microelectron. J.
Li Ni, Pengjun Wang, Yuejun Zhang, Jia Chen, Huihong Zhang, Youyi Zhuang
2022 J jnl
TVD-PB logic circuit based on camouflaging circuit for IoT security.
IET Circuits Devices Syst.
Yuejun Zhang, Qiufeng Wu, Pengjun Wang, Liang Wen, Zhicun Luan, Chongyan Gu
2021 J jnl
A 0.004% resolution & SAT.
Integr.
Yuejun Zhang, Haiming Zhang, Pengjun Wang, Qiufeng Wu, Gang Li
2021 — conf
A 65nm Reliable Near-Subthreshold Standard Cells Design Using Schmitt Trigger.
ASICON
Jinliang Han, Yongzhong Wen, Yuejun Zhang, Pengjun Wang, Huihong Zhang
2021 — conf
A HfO2 Ferroelectric Capacitor based 10T2C High Reliability Non-Volatile SRAM for Low Power IoT Applications.
ASICON
Jing Li, Yulin Zhao, Bo Peng, Xuanzhi Liu, Qiao Hu, Sheng Dai, Jianguo Yang, Yuejun Zhang
2021 — conf
A Multi-conductance States Memristor-based CNN Circuit Using Quantization Method for Digital Recognition.
ASICON
Zhecheng Guo, Yuejun Zhang, Suling Xu, Zhixin Wu, Wanlong Zhao
2021 J jnl
A Multimode Configurable Physically Unclonable Function With Bit-Instability-Screening and Power-Gating Strategies.
IEEE Trans. Very Large Scale Integr. Syst.
Gang Li, Pengjun Wang, Xuejiao Ma, Yijian Shi, Bo Chen, Yuejun Zhang
2021 — conf
A ReRAM-based 10T2R SRAM Using Power-off Recovery Function for Reducing Power.
ASICON
Sheng Dai, Yuejun Zhang, Huihong Zhang, Jing Li, Ye Lin
2021 — conf
A Reliable Multi-information Entropy Glitch PUF Using Schmitt Trigger Sampling Method for IoT Security.
ASICON
Li Ni, Pengjun Wang, Yuejun Zhang, Jia Chen, Liwei Li, Huihong Zhang
2021 — conf
A String-in-string-out 256 Bits eFuse Using Full-custom Design in 55nm Process.
ASICON
Yang Li, Yuejun Zhang, Steve Yang, Shimin Du, Ye Lin
2021 — conf
A Three-valued Adder Circuit Implemented in ZnO Memristor with Multi-resistance States.
ASICON
Zhixin Wu, Yuejun Zhang, Shimin Du, Zhecheng Guo, Wanlong Zhao
2021 J jnl
Orthogonal obfuscation based key management for multiple IP protection.
Integr.
Yuejun Zhang, Jiawei Wang, Pengjun Wang, Xiaoyong Xue, Xiaoyang Zeng
2021 J jnl
SPUF design based on Camellia encryption algorithm.
Microelectron. J.
Jia Chen, Pengjun Wang, Yuejun Zhang, Huihong Zhang
2020 J jnl
65 nm sub-threshold logic standard cell library using quasi-Schmitt-trigger design scheme and inverse narrow width effect aware sizing.
IET Circuits Devices Syst.
Liang Wen, Longmei Nan, Jing Zhang, Chunning Meng, Yan Lu, Shiqian Qi, Jianping Lv, Yuejun Zhang
2020 J jnl
A 215-F² Bistable Physically Unclonable Function With an ACF of <0.005 and a Native Bit Instability of 2.05% in 65-nm CMOS Process.
IEEE Trans. Very Large Scale Integr. Syst.
Gang Li, Pengjun Wang, Xuejiao Ma, Jiana Lian, Junpeng Shu, Yuejun Zhang
2020 J jnl
A Low Cost MST-FSM Obfuscation Method for Hardware IP Protection.
J. Circuits Syst. Comput.
Yuejun Zhang, Zhao Pan, Pengjun Wang, Xiaowei Zhang
2020 J jnl
Radiation-Hardened, Read-Disturbance-Free New-Quatro-10T Memory Cell for Aerospace Applications.
IEEE Trans. Very Large Scale Integr. Syst.
Liang Wen, Yuejun Zhang, Pengjun Wang
2019 J jnl
A 0.1-pJ/b and ACF <0.04 Multiple-Valued PUF for Chip Identification Using Bit-Line Sharing Strategy in 65-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst.
Yuejun Zhang, Zhao Pan, Pengjun Wang, Dailu Ding, Qiaoyan Yu
2019 — conf
A 28nm 512Kb adjacent 2T2R RRAM PUF with interleaved cell mirroring and self-adaptive splitting for extremely low bit error rate of cryptographic key.
A-SSCC
Xiaoyong Xue, Jianguo Yang, Yuejun Zhang, Mingyu Wang, Hangbing Lv, Xiaoyang Zeng, Ming Liu
2019 — conf
A 96kb, 0.36V, Energy-Efficient 8T-SRAM with Column-Selection and Shared Buffer-Foot Techniques for EEG Processor.
ASICON
Liang Wen, Yu Liu, Wei Mo, Jing Zhang, Shiqian Qi, Jianping Lv, Yuejun Zhang
2019 — conf
A High-speed Dynamic Domino Full Adder Based on DICG Positive Feedback.
ASICON
Xiaotian Zhang, Pengjun Wang, Yunfei Yu, Yuejun Zhang, Shunxin Ye
2019 — conf
An Orthogonal Algorithm for Key Management in Hardware Obfuscation.
AsianHOST
Jiawei Wang, Yuejun Zhang, Pengjun Wang, Zhicun Luan, Xiaoyong Xue, Xiaoyang Zeng, Qiaoyan Yu
2019 J jnl
Column-Selection-Enabled 10T SRAM Utilizing Shared Diff-VDD Write and Dropped-VDD Read for Power Reduction.
IEEE Trans. Very Large Scale Integr. Syst.
Liang Wen, Yuejun Zhang, Xiaoyang Zeng
2019 — conf
Design of Aging Detection Sensor Based on Voltage Comparison.
ASICON
Haiming Zhang, Pengjun Wang, Yuejun Zhang, Yunfei Yu
2019 — conf
Design of Crosstalk NAND Gate Circuit Based on Interconnect Coupling Capacitance.
ASICON
Zhiwei Zhao, Yuejun Zhang, Pengjun Wang, Huihong Zhang, Zhang Weishan
2019 J jnl
Design of anti-key leakage camouflage gate circuit for reverse engineering based on dummy vias.
Microelectron. J.
Liwei Li, Pengjun Wang, Yuejun Zhang
2018 J jnl
An ultra-low power multiplier using multi-valued adiabatic logic in 65 nm CMOS process.
Microelectron. J.
Yuejun Zhang, Dailu Ding, Zhao Pan, Pengjun Wang, Qiaoyan Yu
2018 C conf
Design of Delayed Ternary PUF Circuit Based on CNFET.
APCC
Zhengyang He, Kai Ren, Jiayan Chen, Xinyi Dai, Zhao Pan, Yuejun Zhang
2017 — conf
A highly reliable lightweight PUF circuit with temperature and voltage compensated for secure chip identification.
ASICON
Gang Li, Pengjun Wang, Yuejun Zhang
2017 J jnl
A multi-port low-power current mode PUF using MOSFET current-division deviation in 65 nm technology.
Microelectron. J.
Gang Li, Pengjun Wang, Yuejun Zhang, Huihong Zhang
2017 — conf
Design of ternary pulsed reversible counter based on CNFET.
ASICON
Yaopeng Kang, Pengjun Wang, Yuejun Zhang, Gang Li
2016 — conf
DSD: A Dynamic State-Deflection Method for Gate-Level Netlist Obfuscation.
ISVLSI
Jaya Dofe, Yuejun Zhang, Qiaoyan Yu
2015 J jnl
Design and Analysis of Highly Energy/Area-Efficient Multiported Register Files With Read Word-Line Sharing Strategy in 65-nm CMOS Process.
IEEE Trans. Very Large Scale Integr. Syst.
Xiaoyang Zeng, Yi Li, Yuejun Zhang, Shujie Tan, Jun Han, Xingxing Zhang, Zhang Zhang, Xu Cheng, Zhiyi Yu
2015 — conf
Design of power-up and arbiter hybrid physical unclonable functions in 65nm CMOS.
ASICON
Yuejun Zhang, Pengjun Wang, Gang Li, Haoyu Qian, Xiaomin Zheng
2015 J jnl
Operating load based real-time rolling grey forecasting for machine health prognosis in dynamic maintenance schedule.
J. Intell. Manuf.
Tangbin Xia, Xiaoning Jin, Lifeng Xi, Yuejun Zhang, Jun Ni
2014 J jnl
An area-efficient dual replica-bitline delay technique for process-variation-tolerant low voltage SRAM sense amplifier timing.
IEICE Electron. Express
Yi Li, Liang Wen, Yuejun Zhang, Xu Cheng, Jun Han, Zhiyi Yu, Xiaoyang Zeng
2014 — conf
Design of threshold dominant delay Physical Unclonable Functions in 65nm CMOS.
ISIC
Yuejun Zhang, Pengjun Wang, Jianrui Li, Gang Li
2013 J jnl
Architecture and Physical Implementation of Reconfigurable Multi-Port Physical Unclonable Functions in 65 nm CMOS.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Pengjun Wang, Yuejun Zhang, Jun Han, Zhiyi Yu, Yibo Fan, Zhang Zhang
2013 — conf
Highly stable data SRAM-PUF in 65nm CMOS process.
ASICON
Xuelong Zhang, Pengjun Wang, Yuejun Zhang
2012 J jnl
A 64×32bit 4-read 2-write low power and area efficient register file in 65nm CMOS.
IEICE Electron. Express
Jun Han, Xingxing Zhang, Yi Li, Baoyu Xiong, Yuejun Zhang, Zhang Zhang, Zhiyi Yu, Xu Cheng, Xiaoyang Zeng
2012 J jnl
Design of a high information-density multiple valued 2-read 1-write register file.
IEICE Electron. Express
Yuejun Zhang, Pengjun Wang, Baoyu Xiong, Zhiyi Yu
2011 — conf
Design of resistant DPA three-valued counter based on SABL.
ASICON
Yuejun Zhang, Pengjun Wang, Lipeng Hao
2008 B conf
An Implementation of the Agency Architecture in Educational Robotics.
ICALT
Yuejun Zhang, Kinshuk, Ilkka Jormanainen, Erkki Sutinen
2007 — conf
Pedagogical Agents for Teacher Intervention in Educational Robotics Classes: Implementation Issues.
DIGITEL
Ilkka Jormanainen, Yuejun Zhang, Kinshuk, Erkki Sutinen
2006 B conf
Agency Architecture for Teacher Intervention in Robotics Classes.
ICALT
Ilkka Jormanainen, Yuejun Zhang, Erkki Sutinen, Kinshuk
2006 — conf
Implementation of Intelligent Agents with Mobility in Educational Robotics Settings.
WMTE
Ilkka Jormanainen, Chiara Moroni, Yuejun Zhang, Kinshuk, Erkki Sutinen
2006 C conf
Using Agents for Enhancing Learning Effects in an Advanced Discussion Forum.
ICCE
Yuejun Zhang, Kinshuk, Øyvind Smestad, Jingyu Yang, Lynn Jeffrey
2005 C conf
An Open-ended Framework for Learning Object Metadata Interchange.
ICCE
Yuejun Zhang, Kinshuk, Taiyu Lin