Yue-Tsang Chen

12 papers A 4Misc 2Journal 3Unranked 3
YearRankTypeTitle / Venue / Authors
2001 J jnl
Intrinsic response for analog module testing using an analog testability bus.
ACM Trans. Design Autom. Electr. Syst.
Chauchin Su, Yue-Tsang Chen, Shyh-Jye Jou
2001 Misc conf
Test Waveform Shaping in Mixed Signal Test Bus by Pre-Equalization.
VTS
Yue-Tsang Chen, Chauchin Su
2000 A conf
All Digital Built-in Delay and Crosstalk Measurement for On-Chip Buses.
DATE
Chauchin Su, Yue-Tsang Chen, Mu-Jeng Huang, Gen-Nan Chen, Chung-Len Lee
2000 Misc conf
Crosstalk Effect Removal for Analog Measurement in Analog Test Bus.
VTS
Chauchin Su, Yue-Tsang Chen
2000 J jnl
Impulse Response Fault Model and Fault Extraction for Functional Level Analog Circuit Diagnosis.
J. Inf. Sci. Eng.
Chauchin Su, Yue-Tsang Chen, Shenshung Chiang
2000 J jnl
Intrinsic response extraction for the removal of the parasiticeffects in analog test buses.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chauchin Su, Yue-Tsang Chen
1999 — conf
Analog Metrology and Stimulus Selection in a Noisy Environment.
Asian Test Symposium
Chauchin Su, Yue-Tsang Chen, Chung-Len Lee
1998 — conf
Analog Module Metrology Using MNABST-1 P1149.4 Test Chip.
Asian Test Symposium
Yue-Tsang Chen, Chauchin Su
1998 A conf
Boundary scan BIST methodology for reconfigurable systems.
ITC
Chauchin Su, Shung-Won Jeng, Yue-Tsang Chen
1997 — conf
Analog signal metrology for mixed signal ICs.
Asian Test Symposium
Chauchin Su, Yi-Ren Cheng, Yue-Tsang Chen, Shing Tenchen
1997 A conf
Parasitic Effect Removal for Analog Measurement in P1149.4 Environment.
ITC
Chauchin Su, Yue-Tsang Chen, Shyh-Jye Jou
1996 A conf
Metrology for analog module testing using analog testability bus.
ICCAD
Chauchin Su, Yue-Tsang Chen, Shyh-Jye Jou, Yuan-Tzu Ting