Yuchao Liao

11 papers A 1Journal 8Unranked 2

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Accelerating Post-Quantum Cryptography via LLM-Driven Hardware-Software Co-Design. CoRR Yuchao Liao, Tosiron Adegbija, Roman Lysecky
2025	J	`jnl`	System-Level Design Space Exploration for High-Level Synthesis Under End-to-End Latency Constraints. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yuchao Liao, Tosiron Adegbija, Roman Lysecky
2024	J	`jnl`	A high-level synthesis approach for precisely-timed, energy-efficient embedded systems. CoRR Yuchao Liao, Tosiron Adegbija, Roman Lysecky
2024	A	`conf`	Are LLMs Any Good for High-Level Synthesis? ICCAD Yuchao Liao, Tosiron Adegbija, Roman Lysecky
2024	J	`jnl`	Are LLMs Any Good for High-Level Synthesis? CoRR Yuchao Liao, Tosiron Adegbija, Roman Lysecky
2024	J	`jnl`	Deep Inverse Design for High-Level Synthesis. CoRR Ping Chang, Tosiron Adegbija, Yuchao Liao, Claudio Talarico, Ao Li, Janet Roveda
2024	—	`conf`	Skip the Benchmark: Generating System-Level High-Level Synthesis Data using Generative Machine Learning. ACM Great Lakes Symposium on VLSI Yuchao Liao, Tosiron Adegbija, Roman Lysecky, Ravi Tandon
2024	J	`jnl`	Skip the Benchmark: Generating System-Level High-Level Synthesis Data using Generative Machine Learning. CoRR Yuchao Liao, Tosiron Adegbija, Roman Lysecky, Ravi Tandon
2024	J	`jnl`	System-Level Design Space Exploration for High-Level Synthesis under End-to-End Latency Constraints. CoRR Yuchao Liao, Tosiron Adegbija, Roman Lysecky
2023	—	`conf`	Efficient System-Level Design Space Exploration for High-Level Synthesis Using Pareto-Optimal Subspace Pruning. ASP-DAC Yuchao Liao, Tosiron Adegbija, Roman Lysecky
2022	J	`jnl`	A high-level synthesis approach for precisely-timed, energy-efficient embedded systems. Sustain. Comput. Informatics Syst. Yuchao Liao, Tosiron Adegbija, Roman Lysecky