Yuanwu Lei - RankMe

39 papers A 1B 2C 3Misc 1Journal 20Unranked 12

Year	Rank	Type	Title / Venue / Authors
2022	J	`jnl`	MT-3000: a heterogeneous multi-zone processor for HPC. CCF Trans. High Perform. Comput. Kai Lu, Yaohua Wang, Yang Guo, Chun Huang, Sheng Liu, Ruibo Wang, Jianbin Fang, Tao Tang, Zhaoyun Chen, Biwei Liu, Zhong Liu, Yuanwu Lei, Haiyan Sun
2021	J	`jnl`	Advancing DSP into HPC, AI, and beyond: challenges, mechanisms, and future directions. CCF Trans. High Perform. Comput. Yaohua Wang, Chen Li, Chang Liu, Sheng Liu, Yuanwu Lei, Jian Zhang, Yang Zhang, Yang Guo
2019	C	`conf`	An Efficient Direct Memory Access (DMA) Controller for Scientific Computing Accelerators. ISCAS Sheng Ma, Libo Huang, Yuanwu Lei, Yang Guo, Zhiying Wang
2019	—	`conf`	Efficient Large-Scale 1D FFT Vectorization on Multi-Core Vector Accelerator. HPCC/SmartCity/DSS Zhong Liu, Xi Tian, Xiaowen Chen, Yuanwu Lei, Man Liao
2019	J	`jnl`	MT-DMA: A DMA Controller Supporting Efficient Matrix Transposition for Digital Signal Processing. IEEE Access Sheng Ma, Yuanwu Lei, Libo Huang, Zhiying Wang
2019	J	`jnl`	Pair-HMM accelerator based on non-cooperative structure. IEICE Electron. Express Pengfei Wang, Yuanwu Lei, Yong Dou
2018	J	`jnl`	A Variable-Size FFT Hardware Accelerator Based on Matrix Transposition. IEEE Trans. Very Large Scale Integr. Syst. Xiaowen Chen, Yuanwu Lei, Zhonghai Lu, Shuming Chen
2017	J	`jnl`	Low Latency and Low Error Floating-Point Sine/Cosine Function Based TCORDIC Algorithm. IEEE Trans. Circuits Syst. I Regul. Pap. Baozhou Zhu, Yuanwu Lei, Yuanxi Peng, Tingting He
2017	—	`conf`	Platform-Adaptive High-Throughput Surveillance Video Condensation on Heterogeneous Processor Clusters. APPT Peng Qiao, Teng Li, Yong Dou, Yuanwu Lei, Hongbing Luo, Chi Jin
2016	J	`jnl`	An efficient and effective convolutional auto-encoder extreme learning machine network for 3d feature learning. Neurocomputing Yueqing Wang, Zhige Xie, Kai Xu, Yong Dou, Yuanwu Lei
2016	J	`jnl`	Classification of Hyperspectral Remote Sensing Image Using Hierarchical Local-Receptive-Field-Based Extreme Learning Machine. IEEE Geosci. Remote. Sens. Lett. Qi Lv, Xin Niu, Yong Dou, Jiaqing Xu, Yuanwu Lei
2016	—	`conf`	Multi-bit transient fault control for NoC links using 2D fault coding method. NOCS Xiaowen Chen, Zhonghai Lu, Yuanwu Lei, Yaohua Wang, Shenggang Chen
2016	J	`jnl`	PR-ELM: Parallel regularized extreme learning machine based on cluster. Neurocomputing Yueqing Wang, Yong Dou, Xinwang Liu, Yuanwu Lei
2016	—	`conf`	Single/Double Precision Floating-Point Division and Square Root Unit Based on SRT-8 Algorithm. NCCET Yuanxi Peng, Tingting He, Yuanwu Lei, Baozhou Zhu
2015	J	`jnl`	A deeply-pipelined FPGA-based SpMV accelerator with a hardware-friendly storage scheme. IEICE Electron. Express Song Guo, Yong Dou, Yuanwu Lei, Guiming Wu
2015	—	`conf`	Accelerating Molecular Dynamics Simulations on Heterogeneous Architecture. NCCET Yueqing Wang, Yong Dou, Song Guo, Yuanwu Lei, Baofeng Li, Qiang Wang
2015	J	`jnl`	An efficient multi-standard QC-LDPC decoder based on the row-layered decoding algorithm. IEICE Electron. Express Song Guo, Yong Dou, Yuanwu Lei, Rongchun Li, Yu Li
2015	—	`conf`	Designing Parallel Sparse Matrix Transposition Algorithm Using ELLPACK-R for GPUs. NCCET Song Guo, Yong Dou, Yuanwu Lei, Qiang Wang, Fei Xia, Jianning Chen
2014	J	`jnl`	CPU-GPU hybrid parallel strategy for cosmological simulations. Concurr. Comput. Pract. Exp. Yueqing Wang, Yong Dou, Song Guo, Yuanwu Lei, Dan Zou
2014	J	`jnl`	FPGA Implementation of a Special-Purpose VLIW Structure for Double-Precision Elementary Function. ACM Trans. Reconfigurable Technol. Syst. Yuanwu Lei, Lei Guo, Yong Dou, Sheng Ma, Jinbo Xu
2014	J	`jnl`	Transpose-free variable-size FFT accelerator based on-chip SRAM. IEICE Electron. Express Lei Guo, Yuhua Tang, Yuanwu Lei, Yong Dou, Jie Zhou
2013	J	`jnl`	FPGA implementation of an exact dot product and its application in variable-precision floating-point arithmetic. J. Supercomput. Yuanwu Lei, Yong Dou, Yazhuo Dong, Jie Zhou, Fei Xia
2013	J	`jnl`	VLIW coprocessor for IEEE-754 quadruple-precision elementary functions. ACM Trans. Archit. Code Optim. Yuanwu Lei, Yong Dou, Lei Guo, Jinbo Xu, Jie Zhou, Yazhuo Dong, Hongjian Li
2013	J	`jnl`	Window Memory Layout Scheme for Alternate Row-Wise/Column-Wise Matrix Access. IEICE Trans. Inf. Syst. Lei Guo, Yuhua Tang, Yong Dou, Yuanwu Lei, Meng Ma, Jie Zhou
2012	J	`jnl`	Design and Implementation of the Parameterized Multi-Standard High-Throughput Radix-4 Viterbi Decoder on FPGA. IEICE Trans. Commun. Rongchun Li, Yong Dou, Yuanwu Lei, Shi-Ce Ni, Song Guo
2011	—	`conf`	FPGA Implementation of Variable-Precision Floating-Point Arithmetic. APPT Yuanwu Lei, Yong Dou, Song Guo, Jie Zhou
2011	J	`jnl`	FPGA-Specific Custom VLIW Architecture for Arbitrary Precision Floating-Point Arithmetic. IEICE Trans. Inf. Syst. Yuanwu Lei, Yong Dou, Jie Zhou
2011	C	`conf`	Special-purposed VLIW architecture for IEEE-754 quadruple precision elementary functions on FPGA. ICCD Yuanwu Lei, Yong Dou, Li Shen, Jie Zhou, Song Guo
2011	B	`conf`	VPFPAP: A Special-Purpose VLIW Processor for Variable-Precision Floating-Point Arithmetic. FPL Yuanwu Lei, Yong Dou, Jie Zhou, Sufeng Wang
2010	J	`jnl`	A Unified Co-Processor Architecture for Matrix Decomposition. J. Comput. Sci. Technol. Yong Dou, Jie Zhou, Guiming Wu, Jingfei Jiang, Yuanwu Lei, Shi-Ce Ni
2010	A	`conf`	FPGA accelerating double/quad-double high precision floating-point applications for ExaScale computing. ICS Yong Dou, Yuanwu Lei, Guiming Wu, Song Guo, Jie Zhou, Li Shen
2009	—	`conf`	A Fine-Grained Pipelined Implementation for Large-Scale Matrix Inversion on FPGA. APPT Jie Zhou, Yong Dou, Jianxun Zhao, Fei Xia, Yuanwu Lei, Yuxing Tang
2009	Misc	`conf`	A Fine-grained Pipelined Implementation of the LINPACK Benchmark on FPGAs. FCCM Guiming Wu, Yong Dou, Yuanwu Lei, Jie Zhou, Miao Wang, Jingfei Jiang
2009	B	`conf`	FPGA accelerating three QR decomposition algorithms in the unified pipelined framework. FPL Yong Dou, Jie Zhou, Xiaoyang Chen, Yuanwu Lei, Jinbo Xu
2008	—	`conf`	Area and throughput trade-offs in design of arithmetic encoder for JPEG2000. APCCAS Baofeng Li, Yong Dou, Yuanwu Lei
2008	C	`conf`	Double Precision Hybrid-Mode Floating-Point FPGA CORDIC Co-processor. HPCC Jie Zhou, Yong Dou, Yuanwu Lei, Jinbo Xu, Yazhuo Dong
2008	—	`conf`	Dynamic Configurable Floating-Point FFT Pipelines and Hybrid-Mode CORDIC on FPGA. ICESS Jie Zhou, Yazhuo Dong, Yong Dou, Yuanwu Lei
2008	—	`conf`	Hybrid-Mode Floating-Point FPGA CORDIC Co-processor. ARC Jie Zhou, Yong Dou, Yuanwu Lei, Yazhuo Dong
2007	—	`conf`	FPGA SAR Processor with Window Memory Accesses. ASAP Yong Dou, Jie Zhou, Yuanwu Lei, Xingming Zhou