Yuan Zhou

13 papers Journal 7Unranked 6
YearRankTypeTitle / Venue / Authors
2020 J jnl
A Compact Calibration Model for Linearizing CMOS Sample-and-Hold Circuits.
IEEE Trans. Circuits Syst.
Yanqing Li, Yuan Zhou, Yun Chiu
2019 J jnl
A 12-b 1-GS/s 31.5-mW Time-Interleaved SAR ADC With Analog HPF-Assisted Skew Calibration and Randomly Sampling Reference ADC.
IEEE J. Solid State Circuits
Yuan Zhou, Benwei Xu, Yun Chiu
2019 J jnl
A 78.5-dB SNDR Radiation- and Metastability-Tolerant Two-Step Split SAR ADC Operating Up to 75 MS/s With 24.9-mW Power Consumption in 65-nm CMOS.
IEEE J. Solid State Circuits
Hongda Xu, Hai Huang, Yongda Cai, Ling Du, Yuan Zhou, Benwei Xu, Datao Gong, Jingbo Ye, Yun Chiu
2018 J jnl
A 9-bit 215 MS/s Folding-Flash Time-to-Digital Converter Based on Redundant Remainder Number System in 45-nm CMOS.
IEEE J. Solid State Circuits
Bo Wu, Shuang Zhu, Yuan Zhou, Yun Chiu
2017 — conf
28.6 A 78.5dB-SNDR radiation- and metastability-tolerant two-step split SAR ADC operating up to 75MS/s with 24.9mW power consumption in 65nm CMOS.
ISSCC
Hongda Xu, Yongda Cai, Ling Du, Yuan Zhou, Benwei Xu, Datao Gong, Jingbo Ye, Yun Chiu
2017 J jnl
A 23-mW 24-GS/s 6-bit Voltage-Time Hybrid Time-Interleaved ADC in 28-nm CMOS.
IEEE J. Solid State Circuits
Benwei Xu, Yuan Zhou, Yun Chiu
2016 — conf
A 23mW 24GS/s 6b Time-interleaved hybrid two-step ADC in 28nm CMOS.
VLSI Circuits
Benwei Xu, Yuan Zhou, Yun Chiu
2015 J jnl
A 12 bit 160 MS/s Two-Step SAR ADC With Background Bit-Weight Calibration Using a Time-Domain Proximity Detector.
IEEE J. Solid State Circuits
Yuan Zhou, Benwei Xu, Yun Chiu
2015 J jnl
PN-Assisted Deterministic Digital Background Calibration of Multistage Split-Pipelined ADC.
IEEE Trans. Circuits Syst. I Regul. Pap.
Sudipta Sarkar, Yuan Zhou, Brian Elies, Yun Chiu
2014 — conf
A 12b 160MS/s synchronous two-step SAR ADC achieving 20.7fJ/step FoM with opportunistic digital background calibration.
VLSIC
Yuan Zhou, Benwei Xu, Yun Chiu
2014 — conf
A 9-bit 215-MS/s folding-flash time-to-digital converter based on redundant remainder number system.
CICC
Bo Wu, Shuang Zhu, Yuan Zhou, Yun Chiu
2014 — conf
PN-assisted deterministic digital calibration of split two-step ADC to over 14-bit accuracy.
MWSCAS
Sudipta Sarkar, Yuan Zhou, Yun Chiu
2013 — conf
Digital calibration of inter-stage nonlinear errors in pipelined SAR ADC.
MWSCAS
Yuan Zhou, Yun Chiu