Yuan Taur

12 papers Journal 11Unranked 1
YearRankTypeTitle / Venue / Authors
2014 J jnl
Determination of energy and spatial distribution of oxide border traps in In
Microelectron. Reliab.
Chunmeng Dou, Dennis Lin, Abhitosh Vais, Tsvetan Ivanov, Han-Ping Chen, Koen Martens, Kuniyuki Kakushima, Hiroshi Iwai, Yuan Taur, Aaron Thean, Guido Groeseneken
2010 J jnl
Compact modeling of quantum effects in symmetric double-gate MOSFETs.
Microelectron. J.
Wei Wang, Huaxin Lu, Jooyoung Song, Shih-Hsien Lo, Yuan Taur
2009 J jnl
A Review on Compact Modeling of Multiple-Gate MOSFETs.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jooyoung Song, Bo Yu, Yu Yuan, Yuan Taur
2008 — conf
Compact modeling of multiple-gate MOSFETs.
CICC
Yuan Taur, Jooyoung Song, Bo Yu
2001 J jnl
Device scaling limits of Si MOSFETs and their application dependencies.
Proc. IEEE
David J. Frank, Robert H. Dennard, Edward J. Nowak, Paul M. Solomon, Yuan Taur, Hon-Sum Philip Wong
2001 J jnl
Transistors and IC design.
Adv. Comput.
Yuan Taur
1999 J jnl
Modeling and characterization of quantization, polysilicon depletion, and direct tunneling effects in MOSFETs with ultrathin oxides.
IBM J. Res. Dev.
Shih-Hsien Lo, Douglas A. Buchanan, Yuan Taur
1998 J jnl
4- and 13-GHz tuned amplifiers implemented in a 0.1-μm CMOS technology on SOI, SOS, and bulk substrates.
IEEE J. Solid State Circuits
Yo-Chuol Ho, Kihong Kim, Brian A. Floyd, Clement Wann, Yuan Taur, Isaac Lagnado, Kenneth K. O
1997 J jnl
CMOS scaling into the nanometer regime.
Proc. IEEE
Yuan Taur, Douglas A. Buchanan, Wei Chen, David J. Frank, Khalid E. Ismail, Shih-Hsien Lo, George A. Sai-Halasz, Raman G. Viswanathan, Hsing-Jen C. Wann, Shalom J. Wind, Hon-Sum Philip Wong
1995 J jnl
A half-micron CMOS logic generation.
IBM J. Res. Dev.
Charles W. Koburger III, William F. Clark, James W. Adkisson, Eric Adler, Paul E. Bakeman, Albert S. Bergendahl, Alan B. Botula, W. Chang, Bijan Davari, John H. Givens, Howard H. Hansen, Steven J. Holmes, David V. Horak, Chung Hon Lam, Jerome B. Lasky, Stephen E. Luce, Randy W. Mann, Glen L. Miles, James S. Nakos, Edward J. Nowak, Ghavam G. Shahidi, Yuan Taur, Francis R. White, Matthew R. Wordeman
1995 J jnl
CMOS scaling into the 21st century: 0.1 µm and beyond.
IBM J. Res. Dev.
Yuan Taur, Yuh-Jier Mii, David J. Frank, H.-S. Philip Wong, Douglas A. Buchanan, Shalom J. Wind, Stephen A. Rishton, Watson A. Sai-Halasz, Edward J. Nowak
1991 J jnl
A 4-Mb low-temperature DRAM.
IEEE J. Solid State Circuits
Walter H. Henkels, Duen-Shun Wen, Rick L. Mohler, Robert L. Franch, Thomas J. Bucelot, Christopher W. Long, John A. Bracchitta, W. J. Cote, Gary B. Bronner, Yuan Taur, Robert H. Dennard