Yu Yang

22 papers A 2B 1C 3Misc 1Journal 8Unranked 7
YearRankTypeTitle / Venue / Authors
2025 C conf
Modeling and Scheduling of Composable Instruction Set.
DSD
Yu Yang, Paul Delestrac, Ahmed Hemani
2025 J jnl
Scalable Multi-FPGA HPC Architecture for Associative Memory System.
IEEE Trans. Biomed. Circuits Syst.
Deyu Wang, Xiaoze Yan, Yu Yang, Dimitrios Stathis, Ahmed Hemani, Anders Lansner, Jiawei Xu, Li-Rong Zheng, Zhuo Zou
2024 J jnl
Application Level Synthesis: Creating Matrix-Matrix Multiplication Library: A Case Study.
IEEE Access
Pudi Dhilleswararao, Yu Yang, Dimitrios Stathis, Sunil Kumar Prajapati, Srinivas Boppu, Ahmed Hemani, Linga Reddy Cenkeramaddi
2024 J jnl
Automating functional unit and register binding for synchoros CGRA platform.
Des. Autom. Embed. Syst.
Pudi Dhilleswararao, Utsav Tiwari, Srinivas Boppu, Yu Yang, Ahmed Hemani
2024 J jnl
CIS: Composable Instruction Set for Streaming Applications: Design, Modeling, and Scheduling.
CoRR
Yu Yang, Jordi Altayó González, Ahmed Hemani
2024 C conf
Exploration of Custom Floating-Point Formats: A Systematic Approach.
DSD
Saba Yousefzadeh, Yu Yang, Astile Peter, Dimitrios Stathis, Ahmed Hemani
2024 B conf
FPGA-Based HPC for Associative Memory System.
ASPDAC
Deyu Wang, Yuning Wang, Yu Yang, Dimitrios Stathis, Ahmed Hemani, Anders Lansner, Jiawei Xu, Li-Rong Zheng, Zhuo Zou
2024 J jnl
Integer Linear Programming-Based Simultaneous Scheduling and Binding for SiLago Framework.
IEEE Access
Pudi Dhilleswararao, Shivam Malviya, Srinivas Boppu, Yu Yang, Ahmed Hemani, Linga Reddy Cenkeramaddi
2023 — conf
Efficient Implementation of 2-D Convolution on DRRA and DiMArch Architectures.
HEART
Pudi Dhilleswararao, Rajeev Ryansh, Srinivas Boppu, Yu Yang, Ahmed Hemani
2022 A conf
Reducing the Configuration Overhead of the Distributed Two-level Control System.
DATE
Yu Yang, Dimitrios Stathis, Ahmed Hemani
2022 J jnl
Vesyla-II: An Algorithm Library Development Tool for Synchoros VLSI Design Style.
CoRR
Yu Yang, Ahmed Hemani
2021 — conf
A Memristor Model with Concise Window Function for Spiking Brain-Inspired Computation.
AICAS
Jiawei Xu, Deyu Wang, Feng Li, Lianhao Zhang, Dimitrios Stathis, Yu Yang, Yi Jin, Anders Lansner, Ahmed Hemani, Zhuo Zou, Li-Rong Zheng
2021 A conf
Approximate computation of post-synaptic spikes reduces bandwidth to synaptic storage in a model of cortex.
DATE
Dimitrios Stathis, Yu Yang, Ahmed Hemani, Anders Lansner
2021 — conf
Design and Implementation of Optimized Register File for Streaming Applications.
VDAT
Ayazulla Khan Patan, Dimitrios Stathis, Pudi Dhilleswararao, Yu Yang, Srinivas Boppu, Ahmed Hemani
2021 C conf
Scheduling Persistent and Fully Cooperative Instructions.
DSD
Yu Yang, Ahmed Hemani, Kolin Paul
2021 Misc conf
Scheduling Persistent and Fully Cooperative Instructions.
FCCM
Yu Yang, Ahmed Hemani, Kolin Paul
2020 — conf
A FPGA-based Hardware Accelerator for Bayesian Confidence Propagation Neural Network.
NorCAS
Lizheng Liu, Deyu Wang, Yuning Wang, Anders Lansner, Ahmed Hemani, Yu Yang, Xiaoming Hu, Zhuo Zou, Lirong Zheng
2020 J jnl
eBrainII: a 3 kW Realtime Custom 3D DRAM Integrated ASIC Implementation of a Biologically Plausible Model of a Human Scale Cortex.
J. Signal Process. Syst.
Dimitrios Stathis, Chirag Sudarshan, Yu Yang, Matthias Jung, Christian Weis, Ahmed Hemani, Anders Lansner, Norbert Wehn
2019 — conf
Approximate Computing Applied to Bacterial Genome Identification using Self-Organizing Maps.
ISVLSI
Dimitrios Stathis, Yu Yang, Saurabh Tewari, Ahmed Hemani, Kolin Paul, Manfred G. Grabherr, Rafi Ahmad
2019 J jnl
eBrainII: A 3 kW Realtime Custom 3D DRAM integrated ASIC implementation of a Biologically Plausible Model of a Human Scale Cortex.
CoRR
Dimitrios Stathis, Chirag Sudarshan, Yu Yang, Matthias Jung, Syed Mohammad Asad Hassan Jafri, Christian Weis, Ahmed Hemani, Anders Lansner, Norbert Wehn
2018 — conf
RiBoSOM: rapid bacterial genome identification using self-organizing map implemented on the synchoros SiLago platform.
SAMOS
Yu Yang, Dimitrios Stathis, Prashant Sharma, Kolin Paul, Ahmed Hemani, Manfred G. Grabherr, Rafi Ahmad
2017 — conf
MTP-Caffe: Memory, Timing, and Power aware tool for mapping CNNs to GPUs.
PARMA-DITAM@HiPEAC
Yu Yang, Syed M. A. H. Jafri, Ahmed Hemani, Dimitrios Stathis