Yu Liu

21 papers A* 2A 1C 2Journal 10Unranked 5
YearRankTypeTitle / Venue / Authors
2026 — conf
31.1 A 14.08-to-135.69Token/s ReRAM-on-Logic Stacked Outlier-Free Large-Language-Model Accelerator with Block-Clustered Weight-Compression and Adaptive Parallel-Speculative-Decoding.
ISSCC
Pingcheng Dong, Yonghao Tan, Xuejiao Liu, Peng Luo, Yu Liu, Di Pang, Songchen Ma, Xijie Huang, Shih-Yang Liu, Dong Zhang, Zhichao Lu, Luhong Liang, Chi-Ying Tsui, Fengbin Tu, Liang Zhao, Kwang-Ting Cheng
2026 J jnl
Expert Streaming: Accelerating Low-Batch MoE Inference via Multi-chiplet Architecture and Dynamic Expert Trajectory Scheduling.
CoRR
Songchen Ma, Hongyi Li, Weihao Zhang, Yonghao Tan, Pingcheng Dong, Yu Liu, Lan Liu, Yuzhong Jiao, Xuejiao Liu, Luhong Liang, Kwang-Ting Cheng
2025 — conf
A 10.60 μW 150 GOPS Mixed-Bit-Width Sparse CNN Accelerator for Life-Threatening Ventricular Arrhythmia Detection.
ASP-DAC
Yifan Qin, Zhenge Jia, Zheyu Yan, Jay Mok, Manto Yung, Yu Liu, Xuejiao Liu, Wujie Wen, Luhong Liang, Kwang-Ting (Tim) Cheng, Xiaobo Sharon Hu, Yiyu Shi
2025 — conf
A 28nm 0.22μJ/Token Memory-Compute-Intensity-Aware CNN-Transformer Accelerator with Hybrid-Attention-Based Layer-Fusion and Cascaded Pruning for Semantic-Segmentation.
ISSCC
Pingcheng Dong, Yonghao Tan, Xuejiao Liu, Peng Luo, Yu Liu, Luhong Liang, Yitong Zhou, Di Pang, Manto Yung, Dong Zhang, Xijie Huang, Shih-Yang Liu, Yongkun Wu, Fengshi Tian, Chi-Ying Tsui, Fengbin Tu, Kwang-Ting Cheng
2025 A* conf
APSQ: Additive Partial Sum Quantization with Algorithm-Hardware Co-Design.
DAC
Yonghao Tan, Pingcheng Dong, Yongkun Wu, Yu Liu, Xuejiao Liu, Peng Luo, Shih-Yang Liu, Xijie Huang, Dong Zhang, Luhong Liang, Kwang-Ting Cheng
2025 J jnl
APSQ: Additive Partial Sum Quantization with Algorithm-Hardware Co-Design.
CoRR
Yonghao Tan, Pingcheng Dong, Yongkun Wu, Yu Liu, Xuejiao Liu, Peng Luo, Shih-Yang Liu, Xijie Huang, Dong Zhang, Luhong Liang, Kwang-Ting Cheng
2025 A conf
CoXplorer: Multi-Staged Co-Exploration Framework for AI Model Compression and Accelerator Design.
ICCAD
Songchen Ma, Junyi Wu, Yonghao Tan, Pingcheng Dong, Peng Luo, Di Pang, Yu Liu, Xuejiao Liu, Luhong Liang, Kwang-Ting Cheng, Fengbin Tu
2025 J jnl
SwinSAM: Fine-grained polyp segmentation in colonoscopy images via segment anything model integrated with a Swin Transformer decoder.
Biomed. Signal Process. Control.
Zhoushan Feng, Yuliang Zhang, Yanhong Chen, Yiyu Shi, Yu Liu, Wen Sun, Lili Du, Dunjin Chen
2024 J jnl
A 10.60 μW 150 GOPS Mixed-Bit-Width Sparse CNN Accelerator for Life-Threatening Ventricular Arrhythmia Detection.
CoRR
Yifan Qin, Zhenge Jia, Zheyu Yan, Jay Mok, Manto Yung, Yu Liu, Xuejiao Liu, Wujie Wen, Luhong Liang, Kwang-Ting (Tim) Cheng, X. Sharon Hu, Yiyu Shi
2024 A* conf
Genetic Quantization-Aware Approximation for Non-Linear Operations in Transformers.
DAC
Pingcheng Dong, Yonghao Tan, Dong Zhang, Tianwei Ni, Xuejiao Liu, Yu Liu, Peng Luo, Luhong Liang, Shih-Yang Liu, Xijie Huang, Huaiyu Zhu, Yun Pan, Fengwei An, Kwang-Ting Cheng
2024 J jnl
Genetic Quantization-Aware Approximation for Non-Linear Operations in Transformers.
CoRR
Pingcheng Dong, Yonghao Tan, Dong Zhang, Tianwei Ni, Xuejiao Liu, Yu Liu, Peng Luo, Luhong Liang, Shih-Yang Liu, Xijie Huang, Huaiyu Zhu, Yun Pan, Fengwei An, Kwang-Ting Cheng
2023 J jnl
A Tiny Accelerator for Mixed-Bit Sparse CNN Based on Efficient Fetch Method of SIMO SPad.
IEEE Trans. Circuits Syst. II Express Briefs
Xianghong Hu, Xuejiao Liu, Yu Liu, Haowei Zhang, Xijie Huang, Xihao Guan, Luhong Liang, Chi-Ying Tsui, Xiaoming Xiong, Kwang-Ting Cheng
2022 J jnl
ReAAP: A Reconfigurable and Algorithm-Oriented Array Processor With Compiler-Architecture Co-Design.
IEEE Trans. Computers
Jianwei Zheng, Yu Liu, Xuejiao Liu, Luhong Liang, Deming Chen, Kwang-Ting Cheng
2022 — conf
TAC-RAM: A 65nm 4Kb SRAM Computing-in-Memory Design with 57.55 TOPS/W supporting Multibit Matrix-Vector Multiplication for Binarized Neural Network.
AICAS
Xiaomeng Wang, Xuejiao Liu, Xianghong Hu, Xiaopeng Zhong, Xizi Chen, Yu Liu, Patrick Kong, Fengshi Tian, Chi-Ying Tsui
2020 C conf
Optimize FPGA-Based Neural Network Accelerator with Bit-Shift Quantization.
ISCAS
Yu Liu, Xuejiao Liu, Luhong Liang
2018 — book
Software Fault Detection and Correction: Modeling and Applications
Rui Peng, Yan-Fu Li, Yu Liu
2017 J jnl
A Dynamic-Bayesian-Network-Based Fault Diagnosis Methodology Considering Transient and Intermittent Faults.
IEEE Trans Autom. Sci. Eng.
Baoping Cai, Yu Liu, Min Xie
2016 J jnl
A multiphase dynamic Bayesian networks methodology for the determination of safety integrity levels.
Reliab. Eng. Syst. Saf.
Baoping Cai, Yu Liu, Qian Fan
2016 J jnl
Modeling and analysis of reliability of multi-release open source software incorporating both fault detection and correction processes.
J. Syst. Softw.
Jianfeng Yang, Yu Liu, Min Xie, Ming Zhao
2015 C conf
A New Framework and Application of Software Reliability Estimation Based on Fault Detection and Correction Processes.
QRS
Yu Liu, Min Xie, Jianfeng Yang, Ming Zhao
2015 — conf
A reliability analysis framework based on time-varying Dynamic Bayesian Network.
IEEM
Yu Liu, Baoping Cai