Youngjae Cho

13 papers Journal 4Unranked 9
YearRankTypeTitle / Venue / Authors
2026 J jnl
A 12-Bit 600-MS/s Pipelined ADC With Two-Stage High-Gain Dynamic Amplifier in 28-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Bo Gao, Raymond Mabilangan, Chang-Un Park, Kent Edrian Lozada, Ho-Jin Kim, Youngjae Cho, Michael Choi, Seung-Tak Ryu
2025 J jnl
A 0.38-mW 200-kHz-BW Digital-Intensive Single-Opamp Fourth-Order Continuous-Time Delta-Sigma Modulator With Third-Order Digital Noise Coupling in 28-nm CMOS.
IEEE J. Solid State Circuits
Kent Edrian Lozada, Ye-Dam Kim, Ho-Jin Kim, Youngjae Cho, Michael Choi, Seung-Tak Ryu
2024 — conf
3.9 A 1.2V High-Voltage-Tolerant Bootstrapped Analog Sampler in 12-bit SAR ADC Using 3nm GAA's 0.7V Thin-Gate-Oxide Transistor.
ISSCC
Sangheon Lee, Jinwoo Park, Junsang Park, Sangkyu Lee, Jungho Lee, Youngjae Cho, Michael Choi, Jongshin Shin
2024 — conf
A 0.38mW 200kHz-BW 92.1dB-DR Single-Opamp 4th-Order Continuous-Time Delta-Sigma Modulator with 3
VLSI Technology and Circuits
Kent Edrian Lozada, Ye-Dam Kim, Ho-Jin Kim, Youngjae Cho, Michael Choi, Seung-Tak Ryu
2024 — conf
A 12-bit 10GS/s Time-Interleaved SAR ADC with Even/Odd Channel-Correlated Absolute Error-Based Over-Nyquist Timing-Skew Calibration in 5nm FinFET.
VLSI Technology and Circuits
Junsang Park, Jinwoo Park, Jaemin Hong, Sun-Jae Park, Dongsuk Lee, Sungno Lee, Hyochul Shin, Kyung-Hoon Lee, Byeongwoo Koo, Youngjae Cho, Michael Choi, Jongshin Shin
2024 — conf
A 12-bit 16GS/s Single-Channel RF-DAC with Hybrid Segmentation for Digital Back-Off and Code-Dependent Free Switch Driver Achieving -85dBc IMD3 in 5nm FinFET.
VLSI Technology and Circuits
Byeongwoo Koo, SungHan Do, Sangkyu Lee, Sang-Pil Nam, Heewook Shin, Saemin Im, Hyochul Shin, Sungno Lee, Junsang Park, Jungho Lee, Youngjae Cho, Michael Choi, Jongshin Shin
2024 J jnl
A 25-kHz-BW 97.4-dB-SNDR SAR-Assisted Continuous-Time 1-0 MASH Delta-Sigma Modulator With Digital Noise Coupling.
IEEE J. Solid State Circuits
Dong-Hun Lee, Kent Edrian Lozada, Ye-Dam Kim, Ho-Jin Kim, Youngjae Cho, Michael Choi, Seung-Tak Ryu
2024 — conf
A 28nm CMOS 12-bit-600-MS/s 15.6mW Pipelined ADC with Two-Stage Gainboosting FIA-based RA.
A-SSCC
Bo Gao, Lizhen Zhang, Raymond Mabilangan, Chang-Un Park, Kent Edrian Lozada, Ho-Jin Kim, Youngjae Cho, Michael Choi, Seung-Tak Ryu
2024 J jnl
High-Precision Built-In Phase Noise Measurement Circuit With a Hybrid ΔΣ Time-to-Digital Converter for SoC Clocking Applications.
IEEE Trans. Circuits Syst. II Express Briefs
Jihun Choi, Sangwook Na, Hojin Kim, Hyungdong Roh, Youngjae Cho, Michael Choi, Min-Seong Choo, Jeongjin Roh
2023 — conf
A 25kHz-BW 97.4dB-SNDR 100.2dB-DR 3
A-SSCC
Kent Edrian Lozada, Dong-Hun Lee, Ye-Dam Kim, Ho-Jin Kim, Youngjae Cho, Michael Choi, Seung-Tak Ryu
2022 — conf
A 12-bit 8GS/s RF Sampling DAC with Code-Dependent Nonlinearity Compensation and Intersegmental Current-Mismatch Calibration in 5nm FinFET.
VLSI Technology and Circuits
Byeongwoo Koo, SungHan Do, Sang-Pil Nam, Heewook Shin, Sungno Lee, Eunhye Oh, Jaemin Hong, Jung-Ho Lee, Youngjae Cho, Michael Choi, Jongshin Shin
2022 — conf
An Automotive ASIL-D Safety Mechanism in ADC and DAC for Communication Application.
VLSI Technology and Circuits
Kyung-Hoon Lee, Jinwoo Park, Younghyo Park, Byeongwoo Koo, SungHan Do, Woongtaek Lim, Sungno Lee, Hyochul Shin, Eunhye Oh, Youngjae Cho, Michael Choi, Jongshin Shin
2021 — conf
A 12b 600MS/s Pipelined SAR and 2x-Interleaved Incremental Delta-Sigma ADC with Source-Follower-Based Residue-Transfer Scheme in 7nm FinFET.
ISSCC
Seung-Yeob Baek, Il-Hoon Jang, Michael Choi, Hyungdong Roh, Woongtaek Lim, Youngjae Cho, Jongshin Shin