Young Hoon Son

17 papers A* 7A 2Journal 5Unranked 3
YearRankTypeTitle / Venue / Authors
2021 A* conf
GreenDIMM: OS-assisted DRAM Power Management for DRAM with a Sub-array Granularity Power-Down State.
MICRO
Seunghak Lee, Ki-Dong Kang, Hwanjun Lee, Hyungwon Park, Young Hoon Son, Nam Sung Kim, Daehoon Kim
2020 J jnl
A 7.5 Gb/s/pin 8-Gb LPDDR5 SDRAM With Various High-Speed and Low-Power Techniques.
IEEE J. Solid State Circuits
Kyung-Soo Ha, SeungSeob Lee, Youn-Sik Park, Hyuck-Joon Kwon, Tae-Young Oh, Young-Soo Sohn, Seung-Jun Bae, Kwang-Il Park, Jung-Bae Lee, Chang-Kyo Lee, Dongkeon Lee, Daesik Moon, Hyong-Ryol Hwang, Dukha Park, Young-Hwa Kim, Young Hoon Son, Byongwook Na
2018 J jnl
Leveraging Power-Performance Relationship of Energy-Efficient Modern DRAM Devices.
IEEE Access
Sukhan Lee, Hyunyoon Cho, Young Hoon Son, Yuhwan Ro, Nam Sung Kim, Jung Ho Ahn
2017 A* conf
Defect Analysis and Cost-Effective Resilience Architecture for Future DRAM Devices.
HPCA
Sang-uhn Cha, Seongil O, Hyunsung Shin, Sangjoon Hwang, Kwang-Il Park, Seong-Jin Jang, Joo-Sun Choi, Gyo-Young Jin, Young Hoon Son, Hyunyoon Cho, Jung Ho Ahn, Nam Sung Kim
2017 — conf
Dual-loop 2-step ZQ calibration for dedicated power supply voltage in LPDDR4 SDRAM.
A-SSCC
Chang-Kyo Lee, Junha Lee, Kiho Kim, Jin-Seok Heo, Gil-Hoon Cha, Jin-Hyeok Baek, Daesik Moon, Yoon-Joo Eom, Tae-sung Kim, Hyunyoon Cho, Young Hoon Son, Seonghwan Kim, Jong-Wook Park, Sewon Eom, Si-Hyeong Cho, Young-Ryeol Choi, SeungSeob Lee, Kyoung-Soo Ha, Youngseok Kim, Bo-Tak Lim, Dae-Hee Jung, Eungsung Seo, Kyoung-Ho Kim, Yoon-Gyu Song, Youn-Sik Park, Tae-Young Oh, Seung-Jun Bae, Indal Song, Seok-Hun Hyun, Joon-Young Park, Hyuck-Joon Kwon, Young-Soo Sohn, Jung-Hwan Choi, Kwang-Il Park, Seong-Jin Jang
2017 J jnl
SALAD: Achieving Symmetric Access Latency with Asymmetric DRAM Architecture.
IEEE Comput. Archit. Lett.
Young Hoon Son, Hyunyoon Cho, Yuhwan Ro, Jae W. Lee, Jung Ho Ahn
2017 A* conf
SOUP-N-SALAD: Allocation-Oblivious Access Latency Reduction with Asymmetric DRAM Microarchitectures.
HPCA
Yuhwan Ro, Hyunyoon Cho, Eojin Lee, Daejin Jung, Young Hoon Son, Jung Ho Ahn, Jae W. Lee
2017 — conf
Understanding power-performance relationship of energy-efficient modern DRAM devices.
IISWC
Sukhan Lee, Yuhwan Ro, Young Hoon Son, Hyunyoon Cho, Nam Sung Kim, Jung Ho Ahn
2016 A* conf
Chameleon: Versatile and practical near-DRAM acceleration architecture for large memory systems.
MICRO
Hadi Asghari Moghaddam, Young Hoon Son, Jung Ho Ahn, Nam Sung Kim
2015 J jnl
CIDR: A Cache Inspired Area-Efficient DRAM Resilience Architecture against Permanent Faults.
IEEE Comput. Archit. Lett.
Seongil O, Sanghyuk Kwon, Young Hoon Son, Yujin Park, Jung Ho Ahn
2015 A* conf
CiDRA: A cache-inspired DRAM resilience architecture.
HPCA
Young Hoon Son, Sukhan Lee, Seongil O, Sanghyuk Kwon, Nam Sung Kim, Jung Ho Ahn
2014 A conf
Microbank: Architecting Through-Silicon Interposer-Based Main Memory Systems.
SC
Young Hoon Son, Seongil O, Hyunggyun Yang, Daejin Jung, Jung Ho Ahn, John Kim, Jangwoo Kim, Jae W. Lee
2014 A* conf
Row-buffer decoupling: A case for low-latency DRAM microarchitecture.
ISCA
Seongil O, Young Hoon Son, Nam Sung Kim, Jung Ho Ahn
2013 A conf
Dynamic bandwidth scaling for embedded DSPs with 3D-stacked DRAM and wide I/Os.
ICCAD
Daniel W. Chang, Young Hoon Son, Jung Ho Ahn, Hoyoung Kim, Minwook Ahn, Michael J. Schulte, Nam Sung Kim
2013 A* conf
Reducing memory access latency with asymmetric DRAM bank organizations.
ISCA
Young Hoon Son, Seongil O, Yuhwan Ro, Jae W. Lee, Jung Ho Ahn
2013 J jnl
Scalable high-radix router microarchitecture using a network switch organization.
ACM Trans. Archit. Code Optim.
Jung Ho Ahn, Young Hoon Son, John Kim
2012 — conf
A 1.2V 30nm 1.6Gb/s/pin 4Gb LPDDR3 SDRAM with input skew calibration and enhanced control scheme.
ISSCC
Yong-Cheol Bae, Joon-Young Park, Sang Jae Rhee, Seung-Bum Ko, Yonggwon Jeong, Kwang-Sook Noh, Young Hoon Son, Jaeyoun Youn, Yonggyu Chu, Hyunyoon Cho, Mijo Kim, Daesik Yim, Hyo-Chang Kim, Sang-Hoon Jung, Hye-In Choi, Sungmin Yim, Jung-Bae Lee, Joo-Sun Choi, Kyungseok Oh