Young-Joon Lee

22 papers A* 2A 5Journal 7Unranked 8
YearRankTypeTitle / Venue / Authors
2021 J jnl
A graph placement methodology for fast chip design.
Nat.
Azalia Mirhoseini, Anna Goldie, Mustafa Yazgan, Joe Wenjie Jiang, Ebrahim M. Songhori, Shen Wang, Young-Joon Lee, Eric Johnson, Omkar Pathak, Azade Nazi, Jiwoo Pak, Andy Tong, Kavya Srinivasa, William Hang, Emre Tuncer, Quoc V. Le, James Laudon, Richard Ho, Roger Carpenter, Jeff Dean
2021 — conf
Delving into Macro Placement with Reinforcement Learning.
MLCAD
Zixuan Jiang, Ebrahim M. Songhori, Shen Wang, Anna Goldie, Azalia Mirhoseini, Joe W. J. Jiang, Young-Joon Lee, David Z. Pan
2021 J jnl
Delving into Macro Placement with Reinforcement Learning.
CoRR
Zixuan Jiang, Ebrahim M. Songhori, Shen Wang, Anna Goldie, Azalia Mirhoseini, Joe W. J. Jiang, Young-Joon Lee, David Z. Pan
2020 J jnl
Chip Placement with Deep Reinforcement Learning.
CoRR
Azalia Mirhoseini, Anna Goldie, Mustafa Yazgan, Joe W. J. Jiang, Ebrahim M. Songhori, Shen Wang, Young-Joon Lee, Eric Johnson, Omkar Pathak, Sungmin Bae, Azade Nazi, Jiwoo Pak, Andy Tong, Kavya Srinivasa, William Hang, Emre Tuncer, Anand Babu, Quoc V. Le, James Laudon, Richard Ho, Roger Carpenter, Jeff Dean
2019 J jnl
The radish genome database (RadishGD): an integrated information resource for radish genomics.
Database J. Biol. Databases Curation
Hee-Ju Yu, Seunghoon Baek, Young-Joon Lee, Ara Cho, Jeong-Hwan Mun
2015 J jnl
Design and Analysis of 3D-MAPS (3D Massively Parallel Processor with Stacked Memory).
IEEE Trans. Computers
Daehyun Kim, Krit Athikulwongse, Michael B. Healy, Mohammad M. Hossain, Moongon Jung, Ilya Khorosh, Gokul Kumar, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Shreepad Panth, Mohit Pathak, Minzhen Ren, Guanhao Shen, Taigon Song, Dong Hyuk Woo, Xin Zhao, Joungho Kim, Ho Choi, Gabriel H. Loh, Hsien-Hsin S. Lee, Sung Kyu Lim
2014 A conf
On GPU bus power reduction with 3D IC technologies.
DATE
Young-Joon Lee, Sung Kyu Lim
2013 — conf
How to reduce power in 3D IC designs: A case study with OpenSPARC T2 core.
CICC
Moongon Jung, Taigon Song, Yang Wan, Young-Joon Lee, Debabrata Mohapatra, Hong Wang, Greg Taylor, Devang Jariwala, Vijay Pitchumani, Patrick Morrow, Clair Webb, Paul Fischer, Sung Kyu Lim
2013 A* conf
Power benefit study for ultra-high density transistor-level monolithic 3D ICs.
DAC
Young-Joon Lee, Daniel B. Limbrick, Sung Kyu Lim
2013 J jnl
Ultrahigh Density Logic Designs Using Monolithic 3-D Integration.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Young-Joon Lee, Sung Kyu Lim
2012 — conf
3D-MAPS: 3D Massively parallel processor with stacked memory.
ISSCC
Dae Hyun Kim, Krit Athikulwongse, Michael B. Healy, Mohammad M. Hossain, Moongon Jung, Ilya Khorosh, Gokul Kumar, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Shreepad Panth, Mohit Pathak, Minzhen Ren, Guanhao Shen, Taigon Song, Dong Hyuk Woo, Xin Zhao, Joungho Kim, Ho Choi, Gabriel H. Loh, Hsien-Hsin S. Lee, Sung Kyu Lim
2012 — conf
A Load Balancing Scheme for Distributed Simulation Based on Multi-agent System.
COMPSAC Workshops
Young-Joon Lee, Geon Yong Park, Ho Kuen Song, Hee Yong Youn
2012 — conf
Fast delay estimation with buffer insertion for through-silicon-via-based 3D interconnects.
ISQED
Young-Joon Lee, Sung Kyu Lim
2012 — conf
Slew-aware buffer insertion for through-silicon-via-based 3D ICs.
CICC
Young-Joon Lee, Inki Hong, Sung Kyu Lim
2012 A conf
Ultra high density logic designs using transistor-level monolithic 3D integration.
ICCAD
Young-Joon Lee, Patrick Morrow, Sung Kyu Lim
2011 J jnl
Co-Optimization and Analysis of Signal, Power, and Thermal Interconnects in 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Young-Joon Lee, Sung Kyu Lim
2010 — conf
Design and analysis of 3D-MAPS: A many-core 3D processor with stacked memory.
CICC
Michael B. Healy, Krit Athikulwongse, Rohan Goel, Mohammad M. Hossain, Dae Hyun Kim, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Moongon Jung, Brian Ouellette, Mohit Pathak, Hemant Sane, Guanhao Shen, Dong Hyuk Woo, Xin Zhao, Gabriel H. Loh, Hsien-Hsin S. Lee, Sung Kyu Lim
2010 A* conf
TSV stress aware timing analysis with applications to 3D-IC layout optimization.
DAC
Jae-Seok Yang, Krit Athikulwongse, Young-Joon Lee, Sung Kyu Lim, David Z. Pan
2010 A conf
Through-silicon-via management during 3D physical design: When to add and how many?
ICCAD
Mohit Pathak, Young-Joon Lee, Thomas Moon, Sung Kyu Lim
2010 — conf
Timing analysis and optimization for 3D stacked multi-core microprocessors.
3DIC
Young-Joon Lee, Sung Kyu Lim
2009 A conf
Co-design of signal, power, and thermal distribution networks for 3D ICs.
DATE
Young-Joon Lee, Yoon Jo Kim, Gang Huang, Muhannad S. Bakir, Yogendra K. Joshi, Andrei G. Fedorov, Sung Kyu Lim
2009 A conf
Multi-functional interconnect co-optimization for fast and reliable 3D stacked ICs.
ICCAD
Young-Joon Lee, Rohan Goel, Sung Kyu Lim