Young-Hyun Jun

77 papers A 1C 9Journal 41Unranked 26

Year	Rank	Type	Title / Venue / Authors
2017	J	`jnl`	A 5.8-Gb/s Adaptive Integrating Duobinary DFE Receiver for Multi-Drop Memory Interface. IEEE J. Solid State Circuits Hyun-Wook Lim, Sung-Won Choi, Jeong-Keun Ahn, Woong-Ki Min, Sang-Kyu Lee, Chang-Hoon Baek, Jae-Youl Lee, Gyoo-Cheol Hwang, Young-Hyun Jun, Bai-Sun Kong
2015	—	`conf`	10.4 A 5.8Gb/s adaptive integrating duobinary-based DFE receiver for multi-drop memory interface. ISSCC Hyun-Wook Lim, Sung-Won Choi, Sang-Kyu Lee, Chang-Hoon Baek, Jae-Youl Lee, Gyoo-Cheol Hwang, Bai-Sun Kong, Young-Hyun Jun
2014	J	`jnl`	A 5-Gbit/s CDR circuit with 1.4 mW multi-PFD phase rotating PLL. IEICE Electron. Express Kyoung-Ho Kim, Jun-Han Bae, Young-Hyun Jun, Kee-Won Kwon
2014	J	`jnl`	CMOS Charge Pump With No Reversion Loss and Enhanced Drivability. IEEE Trans. Very Large Scale Integr. Syst. Joung-Yeal Kim, Su-Jin Park, Kee-Won Kwon, Bai-Sun Kong, Joo-Sun Choi, Young-Hyun Jun
2013	J	`jnl`	A DFE Receiver With Equalized VREF for Multidrop Single-Ended Signaling. IEEE Trans. Circuits Syst. II Express Briefs Won-Hwa Shin, Young-Hyun Jun, Bai-Sun Kong
2013	J	`jnl`	A fully digital clock and data recovery with fast frequency offset acquisition technique for MIPI LLI applications. IEICE Electron. Express June-Hee Lee, Sang-Hoon Kim, Young-Hyun Jun, Kee-Won Kwon, Jung-Hoon Chun
2013	J	`jnl`	Accurate quadruple-gamma-curve correction for line inversion-based mobile TFT-LCD driver ICS. IEEE Trans. Consumer Electron. Jae-Hyuck Woo, Jae-Goo Lee, Young-Hyun Jun, Bai-Sun Kong
2013	J	`jnl`	Adaptive Multi-Pulse Program Scheme Based on Tunneling Speed Classification for Next Generation Multi-Bit/Cell NAND FLASH. IEEE J. Solid State Circuits Yong-Sung Cho, Il-Han Park, Sangyong Yoon, Nam-Hee Lee, Sang-Hyun Joo, Ki-Whan Song, Kihwan Choi, Jin-Man Han, Kyehyun Kyung, Young-Hyun Jun
2013	J	`jnl`	An all-digital PLL with supply insensitive digitally controlled oscillator. IEICE Electron. Express Seong-Young Seo, Jung-Hoon Chun, Young-Hyun Jun, Kee-Won Kwon
2013	J	`jnl`	Blind-oversampling adaptive oversample-level DFE receiver for unsynchronized global on-chip serial links. IEICE Electron. Express Won-Hwa Shin, Young-Hyun Jun, Bai-Sun Kong
2013	J	`jnl`	Fast Output Voltage-Regulated PWM Buck Converter With an Adaptive Ramp Amplitude Control. IEEE Trans. Circuits Syst. II Express Briefs Ji-Soo Chang, Hyoung-Seok Oh, Young-Hyun Jun, Bai-Sun Kong
2012	C	`conf`	0.37mW/Gb/s low power SLVS transmitter for battery powered applications. ISCAS Youngkyun Jeong, Yoon-Chul Choi, Eun-Ji Choi, Seogheon Ham, Kee-Won Kwon, Young-Hyun Jun, Jung-Hoon Chun
2012	J	`jnl`	A 1.2 V 12.8 GB/s 2 Gb Mobile Wide-I/O DRAM With 4 × 128 I/Os Using TSV Based Stacking. IEEE J. Solid State Circuits Jung-Sik Kim, Chi Sung Oh, Hocheol Lee, Donghyuk Lee, Hyong-Ryol Hwang, Sooman Hwang, Byongwook Na, Joungwook Moon, Jin-Guk Kim, Hanna Park, Jang-Woo Ryu, Kiwon Park, Sang-Kyu Kang, So-Young Kim, Hoyoung Kim, Jong-Min Bang, Hyunyoon Cho, Minsoo Jang, Cheolmin Han, Jung-Bae Lee, Joo-Sun Choi, Young-Hyun Jun
2012	J	`jnl`	A 21 nm High Performance 64 Gb MLC NAND Flash Memory With 400 MB/s Asynchronous Toggle DDR Interface. IEEE J. Solid State Circuits Chulbum Kim, Jinho Ryu, Tae-Sung Lee, Hyunggon Kim, Jaewoo Lim, Jaeyong Jeong, Seonghwan Seo, Hongsoo Jeon, Bokeun Kim, Inyoul Lee, Dooseop Lee, Pansuk Kwak, Seongsoon Cho, Yongsik Yim, Changhyun Cho, Woopyo Jeong, Kwang-Il Park, Jin-Man Han, Duheon Song, Kyehyun Kyung, Youngho Lim, Young-Hyun Jun
2012	—	`conf`	A 64Gb 533Mb/s DDR interface MLC NAND Flash in sub-20nm technology. ISSCC Daeyeal Lee, Ik Joon Chang, Sangyong Yoon, Joonsuc Jang, Dong-Su Jang, Wook-Ghee Hahn, Jong-Yeol Park, Doo-Gon Kim, Chiweon Yoon, Bong-Soon Lim, Byungjun Min, Sung-Won Yun, Ji-Sang Lee, Il-Han Park, Kyung-Ryun Kim, Jeong-Yun Yun, Youse Kim, Yong-Sung Cho, Kyung-Min Kang, Sang-Hyun Joo, Jin-Young Chun, Jung-No Im, Seunghyuk Kwon, Seokjun Ham, AnSoo Park, Jae-Duk Yu, Nam-Hee Lee, Tae-Sung Lee, Moosung Kim, HooSung Kim, Ki-Whan Song, Byung-Gil Jeon, Kihwan Choi, Jin-Man Han, Kyehyun Kyung, Youngho Lim, Young-Hyun Jun
2012	C	`conf`	A low-power two-line inversion method for driving LCD panels. ISCAS Sung-Pil Choi, Gyoo-Cheol Hwang, Young-Hyun Jun, Kee-Won Kwon, Jung-Hoon Chun
2012	—	`conf`	A new 3-bit programming algorithm using SLC-to-TLC migration for 8MB/s high performance TLC NAND flash memory. VLSIC Seung-Hwan Shin, Dong-Kyo Shim, Jaeyong Jeong, Ohsuk Kwon, Sangyong Yoon, Myung-Hoon Choi, Tae-Young Kim, Hyun Wook Park, Hyun-Jun Yoon, Youngsun Song, Yoon-Hee Choi, Sang-Won Shim, Yang-Lo Ahn, Ki-Tae Park, Jin-Man Han, Kyehyun Kyung, Young-Hyun Jun
2012	—	`conf`	Adaptive frequency-controlled ultra-fast hysteretic buck converter for portable devices. ISOCC Kwang-Ho Kim, Bai-Sun Kong, Young-Hyun Jun
2012	—	`conf`	Adaptive multi-pulse program scheme based on tunneling speed classification for next generation multi-bit/cell NAND FLASH. VLSIC Yong-Sung Cho, Il-Han Park, Sangyong Yoon, Nam-Hee Lee, Sang-Hyun Joo, Ki-Whan Song, Kihwan Choi, Jin-Man Han, Kyehyun Kyung, Young-Hyun Jun
2012	J	`jnl`	High-Speed Low-Power Boosted Level Converters for Dual Supply Systems. IEICE Trans. Electron. Sang-Keun Han, KeeChan Park, Young-Hyun Jun, Bai-Sun Kong
2011	—	`conf`	A 1.2V 12.8GB/s 2Gb mobile Wide-I/O DRAM with 4×128 I/Os using TSV-based stacking. ISSCC Jung-Sik Kim, Chi Sung Oh, Hocheol Lee, Donghyuk Lee, Hyong-Ryol Hwang, Sooman Hwang, Byongwook Na, Joungwook Moon, Jin-Guk Kim, Hanna Park, Jang-Woo Ryu, Kiwon Park, Sang-Kyu Kang, So-Young Kim, Hoyoung Kim, Jong-Min Bang, Hyunyoon Cho, Minsoo Jang, Cheolmin Han, Jung-Bae Lee, Kyehyun Kyung, Joo-Sun Choi, Young-Hyun Jun
2011	—	`conf`	A 40nm 2Gb 7Gb/s/pin GDDR5 SDRAM with a programmable DQ ordering crosstalk equalizer and adjustable clock-tracking BW. ISSCC Seung-Jun Bae, Young-Soo Sohn, Tae-Young Oh, Si-Hong Kim, Yun-Seok Yang, Dae-Hyun Kim, Sang-Hyup Kwak, Ho-Seok Seol, Chang-Ho Shin, Min-Sang Park, Gong-Heom Han, Byeong-Cheol Kim, Yong-Ki Cho, Hye-Ran Kim, Su-Yeon Doo, Young-Sik Kim, Dong-Seok Kang, Young-Ryeol Choi, Sam-Young Bang, Sun-Young Park, Yong-Jae Shin, Gil-Shin Moon, Cheol-Goo Park, Woo-Seop Kim, Hyang-Ja Yang, Jeong-Don Lim, Kwang-Il Park, Joo-Sun Choi, Young-Hyun Jun
2011	—	`conf`	A 58nm 1.8V 1Gb PRAM with 6.4MB/s program BW. ISSCC Hoeju Chung, Byung-Hoon Jeong, Byungjun Min, Youngdon Choi, Beak-Hyung Cho, Junho Shin, Jinyoung Kim, Jung Sunwoo, Joon-min Park, Qi Wang, Yong-Jun Lee, Sooho Cha, Dukmin Kwon, Sang-Tae Kim, Sunghoon Kim, Yoohwan Rho, Mu-Hui Park, Jaewhan Kim, Ickhyun Song, Sunghyun Jun, Jaewook Lee, Kiseung Kim, Ki-won Lim, Won-ryul Chung, ChangHan Choi, HoGeun Cho, Inchul Shin, Woochul Jun, Seokwon Hwang, Ki-Whan Song, Kwangjin Lee, Sang-whan Chang, Woo-Yeong Cho, Jei-Hwan Yoo, Young-Hyun Jun
2011	J	`jnl`	A 7 Gb/s/pin 1 Gbit GDDR5 SDRAM With 2.5 ns Bank to Bank Active Time and No Bank Group Restriction. IEEE J. Solid State Circuits Tae-Young Oh, Young-Soo Sohn, Seung-Jun Bae, Min-Sang Park, Ji-Hoon Lim, Yong-Ki Cho, Dae-Hyun Kim, Dong-Min Kim, Hye-Ran Kim, Hyun-Joong Kim, Jin-hyun Kim, Jin-Kook Kim, Young-Sik Kim, Byeong-Cheol Kim, Sang-Hyup Kwak, Jae-Hyung Lee, Jae-Young Lee, Chang-Ho Shin, Yun-Seok Yang, Beom-Sig Cho, Sam-Young Bang, Hyang-Ja Yang, Young-Ryeol Choi, Gil-Shin Moon, Cheol-Goo Park, Seokwon Hwang, Jeong-Don Lim, Kwang-Il Park, Joo-Sun Choi, Young-Hyun Jun
2011	J	`jnl`	A Digitally Controlled Oscillator With Wide Frequency Range and Low Supply Sensitivity. IEEE Trans. Circuits Syst. II Express Briefs Seong-Young Seo, Jung-Hoon Chun, Young-Hyun Jun, Seok Kim, Kee-Won Kwon
2011	J	`jnl`	A Novel Body Bias Selection Scheme for Leakage Minimization. IEICE Trans. Electron. Dong-Su Lee, Sung-Chan Kang, Young-Hyun Jun, Bai-Sun Kong
2011	—	`conf`	A study on accelerated built-in self test of multi-Gb/s high speed interfaces. NESEA Seong-Won Kang, Jung-Hoon Chun, Young-Hyun Jun, Kee-Won Kwon
2011	J	`jnl`	An Area-Efficient, Low-VDD, Highly Reliable Multi-Cell Antifuse System Fully Operative in DRAMs. IEICE Trans. Electron. Jong-Pil Son, Jin Ho Kim, Woo Song Ahn, Seung Uk Han, Satoru Yamada, Byung-Sick Moon, Churoo Park, Hong-Sun Hwang, Seong-Jin Jang, Joo-Sun Choi, Young-Hyun Jun, Soo-Won Kim
2011	—	`conf`	CMOS charge pump with separated charge sharing for improved boosting ratio and relaxed timing restriction. ASICON Seung-Jae Choi, Young-Hyun Jun, Bai-Sun Kong
2011	—	`conf`	Line inversion-based mobile TFT-LCD driver IC with accurate quadruple-gamma-curve correction. A-SSCC Jae-Hyuck Woo, Jae-Goo Lee, In-Suk Kim, Young-Hyun Jun, Gyoo-Cheol Hwang, Myung-Hee Lee, Bai-Sun Kong
2011	—	`conf`	Novel Low-Voltage Small-Area I/O Buffer for Mixed-Voltage Application. FGIT-CA/CES3 Young-Wook Kim, Joung-Yeal Kim, Young-Hyun Jun, Bai-Sun Kong
2011	J	`jnl`	Simultaneous Reverse Body and Negative Word-Line Biasing Control Scheme for Leakage Reduction of DRAM. IEEE J. Solid State Circuits Dong-Su Lee, Young-Hyun Jun, Bai-Sun Kong
2010	J	`jnl`	8 Gb 3-D DDR3 DRAM Using Through-Silicon-Via Technology. IEEE J. Solid State Circuits Uksong Kang, Hoeju Chung, Seongmoo Heo, Dukha Park, Hoon Lee, Jin Ho Kim, Soon-Hong Ahn, Sooho Cha, Jaesung Ahn, Dukmin Kwon, Jae-Wook Lee, Han-Sung Joo, Woo-Seop Kim, Dong Hyeon Jang, Nam-Seog Kim, Jung-Hwan Choi, Tae-Gyeong Chung, Jei-Hwan Yoo, Joo-Sun Choi, Changhyun Kim, Young-Hyun Jun
2010	J	`jnl`	A 31 ns Random Cycle VCAT-Based 4F IEEE J. Solid State Circuits Ki-Whan Song, Jinyoung Kim, Jae-Man Yoon, Sua Kim, Huijung Kim, Hyun-Woo Chung, HyunGi Kim, Kanguk Kim, Hwan-Wook Park, Hyun Chul Kang, Nam-Kyun Tak, Dukha Park, Woo-Seop Kim, Yeong-Taek Lee, Yong Chul Oh, Gyo-Young Jin, Jei-Hwan Yoo, Donggun Park, Kyungseok Oh, Changhyun Kim, Young-Hyun Jun
2010	—	`conf`	A 7Gb/s/pin GDDR5 SDRAM with 2.5ns bank-to-bank active time and no bank-group restriction. ISSCC Tae-Young Oh, Young-Soo Sohn, Seung-Jun Bae, Min-Sang Park, Ji-Hoon Lim, Yong-Ki Cho, Dae-Hyun Kim, Dong-Min Kim, Hye-Ran Kim, Hyun-Joong Kim, Jin-hyun Kim, Jin-Kook Kim, Young-Sik Kim, Byeong-Cheol Kim, Sang-Hyup Kwak, Jae-Hyung Lee, Jae-Young Lee, Chang-Ho Shin, Yun-Seok Yang, Beom-Sig Cho, Sam-Young Bang, Hyang-Ja Yang, Young-Ryeol Choi, Gil-Shin Moon, Cheol-Goo Park, Seokwon Hwang, Jeong-Don Lim, Kwang-Il Park, Joo-Sun Choi, Young-Hyun Jun
2010	—	`conf`	A crosstalk-and-ISI equalizing receiver in 2-drop single-ended SSTL memory channel. CICC Jun-Hyun Bae, Young-Soo Sohn, Seung-Jun Bae, Kwang-Il Park, Joo-Sun Choi, Young-Hyun Jun, Jae-Yoon Sim, Hong-June Park
2010	—	`conf`	A highly reliable multi-cell antifuse scheme using DRAM cell capacitors. ESSCIRC Jong-Pil Son, Jin Ho Kim, Woo Song Ahn, Seung Uk Han, Byung-Sick Moon, Churoo Park, Hong-Sun Hwang, Seong-Jin Jang, Joo-Sun Choi, Young-Hyun Jun, Soo-Won Kim
2010	J	`jnl`	A line inversion-based stepwise data driving for low-power mobile TFT-LCDs. IEEE Trans. Consumer Electron. Jae-Hyuck Woo, Jae-Goo Lee, Young-Hyun Jun, Bai-Sun Kong
2010	—	`conf`	A temperature-stabilized voltage reference utilizing MOS body effect. APCCAS Haesick Sul, Young-Hyun Jun, Bai-Sun Kong
2010	J	`jnl`	Correction on "A 5-Gb/s/pin Transceiver for DDR Memory Interface With a Crosstalk Suppression Scheme" [Aug 09 2222-2232]. IEEE J. Solid State Circuits Kwang-Il Oh, Lee-Sup Kim, Kwang-Il Park, Young-Hyun Jun, Joo-Sun Choi, Kinam Kim
2010	—	`conf`	High-speed low-power bootstrapped level converter for dual supply systems. APCCAS Sang-Keun Han, KeeChan Park, Bai-Sun Kong, Young-Hyun Jun
2010	J	`jnl`	Low-Power High-Speed Data Serializer for Mobile TFT-LCD Driver ICs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Jae-Hyuck Woo, Jae-Goo Lee, Young-Hyun Jun, Bai-Sun Kong
2010	J	`jnl`	New Low-Voltage Low-Latency Mixed-Voltage I/O Buffer. IEICE Trans. Electron. Joung-Yeal Kim, Su-Jin Park, Yong-Ki Kim, Sang-Keun Han, Young-Hyun Jun, Chil-Gee Lee, Tae Hee Han, Bai-Sun Kong
2009	—	`conf`	1.2V 1.6Gb/s 56nm 6F ISSCC Yongsam Moon, Yong-Ho Cho, Hyun-Bae Lee, Byung-Hoon Jeong, Seok-Hun Hyun, Byungchul Kim, In-Chul Jeong, Seong-Young Seo, Junho Shin, Seok-Woo Choi, Ho-Sung Song, Jung-Hwan Choi, Kyehyun Kyung, Young-Hyun Jun, Kinam Kim
2009	C	`conf`	45nm Low-power Embedded Pseudo-SRAM with ECC-based Auto-adjusted Self-refresh Scheme. ISCAS Suk-Soo Pyo, Cheol-Ha Lee, Gyun-Hong Kim, Kyu-Myung Choi, Young-Hyun Jun, Bai-Sun Kong
2009	J	`jnl`	A 0.13-µm CMOS 6 Gb/s/pin Memory Transceiver Using Pseudo-Differential Signaling for Removing Common-Mode Noise Due to SSN. IEEE J. Solid State Circuits Kyung-Soo Ha, Lee-Sup Kim, Seung-Jun Bae, Kwang-Il Park, Joo-Sun Choi, Young-Hyun Jun, Kinam Kim
2009	J	`jnl`	A 5-Gb/s/pin Transceiver for DDR Memory Interface With a Crosstalk Suppression Scheme. IEEE J. Solid State Circuits Kwang-Il Oh, Lee-Sup Kim, Kwang-Il Park, Young-Hyun Jun, Joo-Sun Choi, Kinam Kim
2009	—	`conf`	A 6Gb/s/pin pseudo-differential signaling using common-mode noise rejection techniques without reference signal for DRAM interfaces. ISSCC Kyung-Soo Ha, Lee-Sup Kim, Seung-Jun Bae, Kwang-Il Park, Joo-Sun Choi, Young-Hyun Jun, Kinam Kim
2009	J	`jnl`	A DLL With Jitter Reduction Techniques and Quadrature Phase Generation for DRAM Interfaces. IEEE J. Solid State Circuits Byung-Guk Kim, Lee-Sup Kim, Kwang-Il Park, Young-Hyun Jun, Soo-In Cho
2009	J	`jnl`	CMOS Charge Pump With Transfer Blocking Technique for No Reversion Loss and Relaxed Clock Timing Restriction. IEEE Trans. Circuits Syst. II Express Briefs Joung-Yeal Kim, Young-Hyun Jun, Bai-Sun Kong
2009	J	`jnl`	CMOS cross-coupled charge pump with improved latch-up immunity. IEICE Electron. Express Su-Jin Park, Yonggu Kang, Joung-Yeal Kim, Tae Hee Han, Young-Hyun Jun, Chil-Gee Lee, Bai-Sun Kong
2009	J	`jnl`	Low-Power CMOS Synchronous Counter With Clock Gating Embedded Into Carry Propagation. IEEE Trans. Circuits Syst. II Express Briefs Young-Won Kim, Joo-Seong Kim, Jae-Hyuk Oh, Yoon-Suk Park, Jong-Woo Kim, Kwang-Il Park, Bai-Sun Kong, Young-Hyun Jun
2009	J	`jnl`	New low-voltage small-area mixed-voltage I/O buffer. IEICE Electron. Express Joung-Yeal Kim, Yoon-Suk Park, Young-Hyun Jun, Bai-Sun Kong
2008	—	`conf`	A 100nm Double-Stacked 500MHz 72Mb Separate-I/O Synchronous SRAM with Automatic Cell-Bias Scheme and Adaptive Block Redundancy. ISSCC Kyomin Sohn, Young-Ho Suh, Young-Jae Son, Daesik Yim, Kang-Young Kim, Dae-Gi Bae, Ted Kang, Hoon Lim, Soon-Moon Jung, Hyun-Geun Byun, Young-Hyun Jun, Kinam Kim
2008	—	`conf`	A 5-Gb/s/pin transceiver for DDR memory interface with a crosstalk suppression scheme. CICC Kwang-Il Oh, Lee-Sup Kim, Kwang-Il Park, Young-Hyun Jun, Kinam Kim
2008	J	`jnl`	A 512 Mb Two-Channel Mobile DRAM (OneDRAM) With Shared Memory Array. IEEE J. Solid State Circuits Jung-Sik Kim, Kyung-Woo Nam, Chi Sung Oh, Han Gu Sohn, Donghyuk Lee, Sooyoung Kim, Jong-Wook Park, Yongjun Kim, Mi-Jo Kim, Jin-Guk Kim, Hocheol Lee, Jinhyoung Kwon, Dong Il Seo, Young-Hyun Jun, Kinam Kim
2008	—	`conf`	A 60nm 6Gb/s/pin GDDR5 Graphics DRAM with Multifaceted Clocking and ISI/SSN-Reduction Techniques. ISSCC Seung-Jun Bae, Young-Soo Sohn, Kwang-Il Park, Kyoung-Ho Kim, Dae-Hyun Chung, Jingook Kim, Si-Hong Kim, Min-Sang Park, Jae-Hyung Lee, Sam-Young Bang, Ho-Kyung Lee, In-Soo Park, Jae-Sung Kim, Dae-Hyun Kim, Hye-Ran Kim, Yong-Jae Shin, Cheol-Goo Park, Gil-Shin Moon, Ki-Woong Yeom, Kang-Young Kim, Jae-Young Lee, Hyang-Ja Yang, Seong-Jin Jang, Joo-Sun Choi, Young-Hyun Jun, Kinam Kim
2008	J	`jnl`	A pre-emphasis output buffer control scheme for a GDDR3 SDRAM interface. IEICE Electron. Express Sang Joon Hwang, Young-Hyun Jun, Man Young Sung
2008	J	`jnl`	An 80 nm 4 Gb/s/pin 32 bit 512 Mb GDDR4 Graphics DRAM With Low Power and Low Noise Data Bus Inversion. IEEE J. Solid State Circuits Seung-Jun Bae, Kwang-Il Park, Jeong-Don Ihm, Ho-Young Song, Woo-Jin Lee, Hyun-Jin Kim, Kyoung-Ho Kim, Yoon-Sik Park, Min-Sang Park, Hong-Kyong Lee, Sam-Young Bang, Gil-Shin Moon, Seokwon Hwang, Young-Chul Cho, Sang-Jun Hwang, Dae-Hyun Kim, Ji-Hoon Lim, Jae-Sung Kim, Sunghoon Kim, Seong-Jin Jang, Joo-Sun Choi, Young-Hyun Jun, Kinam Kim, Soo-In Cho
2008	C	`conf`	CMOS temperature sensor with ring oscillator for mobile DRAM self-refresh control. ISCAS Chan-Kyung Kim, Bai-Sun Kong, Chil-Gee Lee, Young-Hyun Jun
2008	C	`conf`	PVT-invariant single-to-differential data converter with minimum skew and duty-ratio distortion. ISCAS Youn-Sik Park, Sung-Wook Lee, Bai-Sun Kong, Kwang-Il Park, Jeong-Don Ihm, Joo-Sun Choi, Young-Hyun Jun
2008	C	`conf`	Presetting pulse-based flip-flop. ISCAS Chul Soo Kim, Joo-Seong Kim, Bai-Sun Kong, Yongsam Moon, Young-Hyun Jun
2008	A	`conf`	Wafer-Level Characterization of Probecards using NAC Probing. ITC Gyu-Yeol Kim, Eon-Jo Byunb, Ki-Sang Kang, Young-Hyun Jun, Bai-Sun Kong
2007	—	`conf`	A DLL with Jitter-Reduction Techniques for DRAM Interfaces. ISSCC Byung-Guk Kim, Lee-Sup Kim, Kwang-Il Park, Young-Hyun Jun, Soo-In Cho
2007	—	`conf`	An 80nm 4Gb/s/pin 32b 512Mb GDDR4 Graphics DRAM with Low-Power and Low-Noise Data-Bus Inversion. ISSCC Jeong-Don Ihm, Seung-Jun Bae, Kwang-Il Park, Ho-Young Song, Woo-Jin Lee, Hyun-Jin Kim, Kyoung-Ho Kim, Ho-Kyung Lee, Min-Sang Park, Sam-Young Bang, Mi-Jin Lee, Gil-Shin Moon, Young-Wook Jang, Suk-Won Hwang, Young-Chul Cho, Sang-Jun Hwang, Dae-Hyun Kim, Ji-Hoon Lim, Jae-Sung Kim, Su-Jin Park, Ok-Joo Park, Se-Mi Yang, Jin-Yong Choi, Young-Wook Kim, Hyun-Kyu Lee, Sunghoon Kim, Seong-Jin Jang, Young-Hyun Jun, Soo-In Cho
2007	J	`jnl`	CMOS Level Converter with Balanced Rise and Fall Delays. IEICE Trans. Electron. Min-Su Kim, Young-Hyun Jun, Sung-Bae Park, Bai-Sun Kong
2007	J	`jnl`	CMOS temperature sensor with ring oscillator for mobile DRAM self-refresh control. Microelectron. J. Chan-Kyung Kim, Jae-Goo Lee, Young-Hyun Jun, Chil-Gee Lee, Bai-Sun Kong
2007	J	`jnl`	Slew-Rate-Controlled Output Driver Having Constant Transition Time Over Process, Voltage, Temperature, and Output Load Variations. IEEE Trans. Circuits Syst. II Express Briefs Soon-Kyun Shin, Wang Yu, Young-Hyun Jun, Jae-Whui Kim, Bai-Sun Kong, Chil-Gee Lee
2006	J	`jnl`	Design of an Image Interpolator for Low Computation Complexity. J. Inf. Process. Syst. Young-Hyun Jun, Jong-Ho Yun, Jin-Sung Park, Myung-Ryul Choi
2005	J	`jnl`	A 1.6-Gb/s/pin double data rate SDRAM with wave-pipelined CAS latency control. IEEE J. Solid State Circuits Sang-Bo Lee, Seong-Jin Jang, Jin-Seok Kwak, Sang-Jun Hwang, Young-Hyun Jun, Soo-In Cho, Chil-Gee Lee
2005	—	`conf`	A high current driving charge pump with current regulation method. CICC Soon-Kyun Shin, Bai-Sun Kong, Chil-Gee Lee, Young-Hyun Jun, Jae-Whui Kim
2005	—	`conf`	A slew rate-controlled output driver having a constant transition time over the variations of process, voltage and temperature. CICC Soon-Kyun Shin, Wang Yu, Bai-Sun Kong, Chil-Gee Lee, Young-Hyun Jun, Jae-Whui Kim
2001	J	`jnl`	Conditional-capture flip-flop for statistical power reduction. IEEE J. Solid State Circuits Bai-Sun Kong, Sam-Soo Kim, Young-Hyun Jun
2000	C	`conf`	Data-dependent evaluating latched CMOS differential logic family for statistical power reduction. ISCAS Bai-Sun Kong, Young-Hyun Jun
1993	C	`conf`	A New Colum Redundancy Scheme For Fast Access Time of 64-Mb DRAM. ISCAS Young-Hyun Jun, Weon-Hwa Jeong, Jong-Hoon Park, Tae-Hoon Kim, Seong-Wook Kim, Jae-sik Lee, Seong-Jin Jang, Chang-Man Khang, Hee-Gook Lee
1990	C	`conf`	High speed VLSI logic simulation using bitwise operations and parallel processing. ICCD Young-Hyun Jun, Ibrahim N. Hajj, Sang-Heon Lee, Song-Bai Park
1989	J	`jnl`	An accurate and efficient delay time modeling for MOS logic circuits using polynomial approximation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Young-Hyun Jun, Ki Jun, Song-Bai Park