Young-Deuk Jeon

18 papers C 1Journal 5Unranked 12
YearRankTypeTitle / Venue / Authors
2024 — conf
A 6.4Gb/s/pin HBM3 Digital PHY with Low-Power, Area-Efficient Techniques for Chiplet-Based AI processors in 12-nm CMOS.
A-SSCC
Jaewoong Choi, Yi-Gyeong Kim, Juyeob Kim, Jaehoon Chung, Young-Deuk Jeon, Min-Hyung Cho, Sujin Park, Jinho Han
2023 — conf
2.5D Large-Scale Interposer Bonding Process Verification using Daisy-Chain for PIM Heterogeneous Integration Platform.
ICEIC
Sujin Park, Yi-Gyeong Kim, Young-Deuk Jeon, Min-Hyung Cho, Jinho Han, Youngsu Kwon
2023 — conf
Chiplet Heterogeneous-Integration AI Processor.
ICEIC
Youngsu Kwon, Jinho Han, Yong Cheol Peter Cho, Juyeob Kim, Jaehoon Chung, Jaewoong Choi, Sujin Park, Igyeong Kim, Hyunjeong Kwon, Jinkyu Kim, Hyunmi Kim, Won Jeon, Young-Deuk Jeon, Min-Hyung Cho, Minseok Choi
2023 — conf
DQ and DQS Receiver for HBM3 Memory Interface with DFE Offset Calibration.
ISOCC
Sujin Park, Young-Deuk Jeon, Yi-Gyeong Kim, Min-Hyung Cho, Jinho Han, Jaehoon Chung, Jaewoong Choi, Youngsu Kwon
2019 — conf
Design of Analog and Digital Hybrid MAC Circuit for Artificial Neural Networks.
ICEIC
Ki-Hyuk Park, Min-Hyung Cho, Young-Deuk Jeon, Joo Hyun Lee
2012 J jnl
A Dual-Channel Pipelined ADC With Sub-ADC Based on Flash-SAR Architecture.
IEEE Trans. Circuits Syst. II Express Briefs
Young-Deuk Jeon, Jae-Won Nam, Kwi-Dong Kim, Tae Moon Roh, Jong-Kee Kwon
2011 J jnl
A 10-bit 30-MS/s successive approximation register analog-to-digital converter for low-power sub-sampling applications.
Microelectron. J.
Young-Kyun Cho, Young-Deuk Jeon, Jae-Won Nam, Jong-Kee Kwon
2011 — conf
A 12-bit 100-MS/s pipelined ADC in 45-nm CMOS.
ISOCC
Jae-Won Nam, Young-Deuk Jeon, Seok-Ju Yun, Tae Moon Roh, Jong-Kee Kwon
2011 J jnl
A 12-bit 200-MS/s pipelined A/D converter with sampling skew reduction technique.
Microelectron. J.
Jae-Won Nam, Young-Deuk Jeon, Young-Kyun Cho, Jong-Kee Kwon
2010 J jnl
A 9-bit 80 MS/s Successive Approximation Register Analog-to-Digital Converter With a Capacitor Reduction Technique.
IEEE Trans. Circuits Syst. II Express Briefs
Young-Kyun Cho, Young-Deuk Jeon, Jae-Won Nam, Jong-Kee Kwon
2010 — conf
A 9.15mW 0.22mm
CICC
Young-Deuk Jeon, Young-Kyun Cho, Jae-Won Nam, Kwi-Dong Kim, Woo-Yol Lee, Kuk-Tae Hong, Jong-Kee Kwon
2009 — conf
A 2.85mW 0.12mm2 1.0V 11-bit 20-MS/s algorithmic ADC in 65nm CMOS.
ESSCIRC
Jae-Won Nam, Young-Deuk Jeon, Young-Kyun Cho, Sang-Gug Lee, Jong-Kee Kwon
2007 J jnl
A 10-bit 205-MS/s 1.0-mm
IEEE J. Solid State Circuits
Seung-Chul Lee, Young-Deuk Jeon, Jong-Kee Kwon, Jongdae Kim
2007 — conf
A 10b 205MS/s 1mm2 90nm CMOS Pipeline ADC for Flat-Panel Display Applications.
ISSCC
Seung-Chul Lee, Young-Deuk Jeon, Kwi-Dong Kim, Jong-Kee Kwon, Jongdae Kim, Jeong-Woong Moon, Woo-Yol Lee
2007 — conf
A 4.7mW 0.32mm2 10b 30MS/s Pipelined ADC Without a Front-End S/H in 90nm CMOS.
ISSCC
Young-Deuk Jeon, Seung-Chul Lee, Kwi-Dong Kim, Jong-Kee Kwon, Jongdae Kim
2006 — conf
A 10b 25MS/s 4.8mW 0.13um CMOS ADC for Digital Multimedia Broadcasting Applications.
CICC
Young-Jae Cho, Doo-Hwan Sa, Yong-Woo Kim, Kyung-Hoon Lee, Hee-Cheol Choi, Seung-Hoon Lee, Young-Deuk Jeon, Seung-Chul Lee, Jong-Kee Kwon
2000 — conf
A 12b 50 MHz 3.3V CMOS acquisition time minimized A/D converter.
ASP-DAC
Young-Deuk Jeon, Byeong-Lyeol Jeon, Seung-Chul Lee, Sang-Min Yoo, Seung-Hoon Lee
2000 C conf
Acquisition-time minimization and merged-capacitor switching techniques for sampling-rate and resolution improvement of CMOS ADCs.
ISCAS
Young-Deuk Jeon, Seung-Chul Lee, Sang-Min Yoo, Seung-Hoon Lee