Yosuke Ogasawara

12 papers Journal 4Unranked 8
YearRankTypeTitle / Venue / Authors
2018 — conf
A 15mW -105dBm Image-Sparse-Sliding-IF Receiver with Transformer-Based on-Chip Q-Enhanced RF Matching Network for a 113dB-Link-Budget BLE 5.0 TRX.
ESSCIRC
Tuan Thanh Ta, Yosuke Ogasawara, Tong Wang, Masayoshi Oshiro, Naotaka Koide, Akihide Sai, Takashi Tokairin
2018 — conf
An 113DB-Link-Budget Bluetooth-5 SoC with an 8dBm 22%-Efficiency TX.
VLSI Circuits
Tong Wang, Yosuke Ogasawara, Yuki Tuda, Tuan Thanh Ta, Masayoshi Oshiro, Jun Ihara, Tatsuhiko Maruyama, Toru Hashimoto, Akihide Sai, Takashi Tokairin
2017 J jnl
A 3.2mA-RX 3.5mA-TX Fully Integrated SoC for Bluetooth Low Energy System.
IEICE Trans. Electron.
Masayoshi Oshiro, Tatsuhiko Maruyama, Takashi Tokairin, Yuki Tuda, Tong Wang, Naotaka Koide, Yosuke Ogasawara, Tuan Thanh Ta, Hiroshi Yoshida, Kenichi Sami
2017 J jnl
An 18 µW Spur Cancelled Clock Generator for Recovering Receiver Sensitivity in Wireless SoCs.
IEICE Trans. Electron.
Yosuke Ogasawara, Ryuichi Fujimoto, Tsuneo Suzuki, Kenichi Sami
2016 — conf
A 3.2 mA-RX 3.5 mA-TX fully integrated SoC for Bluetooth Low Energy.
A-SSCC
Masayoshi Oshiro, Tatsuhiko Maruyama, Takashi Tokairin, Yuki Tuda, Tong Wang, Naotaka Koide, Yosuke Ogasawara, Tuan Thanh Ta, Hiroshi Yoshida, Kenichi Sami
2016 — conf
An 18 µW spur canceled clock generator for recovering receiver sensitivity in wireless SoCs.
VLSI Circuits
Yosuke Ogasawara, Hiroki Sakurai, Ryuichi Fujimoto, Kenichi Sami
2012 — conf
A -70dBm-sensitivity 522Mbps 0.19nJ/bit-TX 0.43nJ/bit-RX transceiver for TransferJet™ SoC in 65nm CMOS.
VLSIC
Daisuke Miyashita, Kenichi Agawa, Hirotsugu Kajihara, Kenichi Sami, Masaomi Iwanaga, Yosuke Ogasawara, Tomohiko Ito, Daisuke Kurose, Naotaka Koide, Toru Hashimoto, Hiroki Sakurai, Takafumi Yamaji, Takashi Kurihara, Kazumi Sato, Ichiro Seto, Hiroshi Yoshida, Ryuichi Fujimoto, Yasuo Unekawa
2011 J jnl
A Single-Chip RF Tuner/OFDM Demodulator for Mobile Digital TV Application.
IEICE Trans. Electron.
Yoshimitsu Takamatsu, Ryuichi Fujimoto, Tsuyoshi Sekine, Takaya Yasuda, Mitsumasa Nakamura, Takuya Hirakawa, Masato Ishii, Motohiko Hayashi, Hiroya Ito, Yoko Wada, Teruo Imayama, Tatsuro Oomoto, Yosuke Ogasawara, Masaki Nishikawa, Yoshihiro Yoshida, Kenji Yoshioka, Shigehito Saigusa, Hiroshi Yoshida, Nobuyuki Itoh
2010 J jnl
A Fully Integrated 2 ˟ 1 Dual-Band Direct-Conversion Mobile WiMAX Transceiver With Dual-Mode Fractional Divider and Noise-Shaping Transimpedance Amplifier in 65 nm CMOS.
IEEE J. Solid State Circuits
Jun Deguchi, Daisuke Miyashita, Yosuke Ogasawara, Gaku Takemura, Masaomi Iwanaga, Kenichi Sami, Rui Ito, Junji Wadatsumi, Yuki Tsuda, Shoko Oda, Shunji Kawaguchi, Nobuyuki Itoh, Mototsugu Hamada
2010 — conf
A fully integrated 2×1 dual-band direct-conversion transceiver with dual-mode fractional divider and noise-shaping TIA for mobile WiMAX SoC in 65nm CMOS.
ISSCC
Jun Deguchi, Daisuke Miyashita, Yosuke Ogasawara, Gaku Takemura, Masaomi Iwanaga, Kenichi Sami, Rui Ito, Junji Wadatsumi, Yuki Tsuda, Shoko Oda, Shunji Kawaguchi, Nobuyuki Itoh, Mototsugu Hamada
2009 — conf
A single-chip RF tuner / OFDM demodulator for mobile digital TV application.
ESSCIRC
Tsuyoshi Sekine, Ryuichi Fujimoto, Yoshimitsu Takamatsu, Mitsumasa Nakamura, Takuya Hirakawa, Masato Ishii, Takaya Yasuda, Motohiko Hayashi, H. Itoh, Yoko Wada, Teruo Imayama, Tatsuro Oomoto, Yosuke Ogasawara, Shigehito Saigusa, M. Yano, Masaki Nishikawa, Hiroshi Yoshida, Yoshihiro Yoshida, Kenji Yoshioka, Nobuyuki Itoh
2008 — conf
A single-chip 8-band CMOS transceiver for W-CDMA(HSPA) / GSM(GPRS) / EDGE with digital interface.
ESSCIRC
Hiroshi Yoshida, Takehiko Toyoda, T. Yasuda, Yosuke Ogasawara, M. Ishii, T. Murasaki, Gaku Takemura, Masaomi Iwanaga, T. Takida, Yuta Araki, T. Hashimoto, K. Sami, Teruo Imayama, H. Shimizu, Hideyuki Kokatsu, Y. Tsuda, I. Tamura, H. Masuoka, Masahiro Hosoya, R. Ito, Hidenori Okuni, T. Kato, K. Sato, K. Nonin, K. Osawa, R. Fujimoto, S. Kawaguchi, Hiroshi Tsurumi, Nobuyuki Itoh