Yoshio Kameda

11 papers A 2C 1Misc 1Journal 3Unranked 4

Year	Rank	Type	Title / Venue / Authors
2024	—	`conf`	eAIEDF: Extended AI Error Diagnosis Flowchart for Automatically Identifying Misprediction Causes in Production Models. ICSE Companion Keita Sakuma, Ryuta Matsuno, Yoshio Kameda
2023	—	`conf`	A Method of Identifying Causes of Prediction Errors to Accelerate MLOps. DeepTest Keita Sakuma, Ryuta Matsuno, Yoshio Kameda
2023	A	`conf`	Quantitative Decomposition of Prediction Errors Revealing Multi-Cause Impacts: An Insightful Framework for MLOps. CIKM Keita Sakuma, Ryuta Matsuno, Yoshio Kameda
2018	A	`conf`	A Rare and Critical Condition Search Technique and its Application to Telescope Stray Light Analysis. SDM Keiichi Kisamori, Takashi Washio, Yoshio Kameda, Ryohei Fujimaki
2010	Misc	`conf`	Gate-oxide early-life failure identification using delay shifts. VTS Young Moon Kim, Tze Wee Chen, Yoshio Kameda, Masayuki Mizuno, Subhasish Mitra
2008	J	`jnl`	Design and Demonstration of a 4×4 SFQ Network Switch Prototype System and 10-Gbps Bit-Error-Rate Measurement. IEICE Trans. Electron. Yoshio Kameda, Yoshihito Hashimoto, Shinichi Yorozu
2008	J	`jnl`	Development of Cryopackaging and I/O Technologies for High-Speed Superconductive Digital Systems. IEICE Trans. Electron. Yoshihito Hashimoto, Shinichi Yorozu, Yoshio Kameda
2005	J	`jnl`	Development of Passive Interconnection Technology for SFQ Circuits. IEICE Trans. Electron. Yoshihito Hashimoto, Shinichi Yorozu, Yoshio Kameda, Akira Fujimaki, Hirotaka Terai, Nobuyuki Yoshikawa
1998	—	`conf`	Primitive-Level Pipelining Method on Delay-Insensitive Model for RSFQ Pulse-Driven Logic. ASYNC Yoshio Kameda, Stanislav Polonsky, Masaaki Maezawa, Takashi Nanya
1996	C	`conf`	Pulse-Driven Delay-Insensitive Circuits using Single-Flux-Quantum Devices. ICCD Yoshio Kameda
1996	—	`conf`	Pulse-driven dual-rail logic gate family based on rapid single-flux-quantum (RSFQ) devices for asynchronous circuits. ASYNC Masaaki Maezawa, Itaru Kurosawa, Yoshio Kameda, Takashi Nanya