Yoshiaki Deguchi

12 papers C 2Journal 3Unranked 7
YearRankTypeTitle / Venue / Authors
2019 J jnl
3-D NAND Flash Value-Aware SSD: Error-Tolerant SSD Without ECCs for Image Recognition.
IEEE J. Solid State Circuits
Yoshiaki Deguchi, Toshiki Nakamura, Atsuna Hayakawa, Ken Takeuchi
2019 J jnl
Adaptive Artificial Neural Network-Coupled LDPC ECC as Universal Solution for 3-D and 2-D, Charge-Trap and Floating-Gate NAND Flash Memories.
IEEE J. Solid State Circuits
Toshiki Nakamura, Yoshiaki Deguchi, Ken Takeuchi
2019 — conf
Privacy-Aware Data-Lifetime Control NAND Flash System for Right to be Forgotten with In-3D Vertical Cell Processing.
A-SSCC
Shun Suzuki, Kyoji Mizoguchi, Hikaru Watanabe, Toshiki Nakamura, Yoshiaki Deguchi, Keita Mizushina, Ken Takeuchi
2018 — conf
9.1x Error acceptable adaptive artificial neural network coupled LDPC ECC for charge-trap and floating-gate 3D-NAND flash memories.
CICC
Toshiki Nakamura, Yoshiaki Deguchi, Ken Takeuchi
2018 C conf
Data-Aware Partial ECC with Data Modulation of ReRAM with Non-volatile In-memory Computing for Image Recognition with Deep Neural Network.
ISCAS
Atsuna Hayakawa, Toshiki Nakamura, Yoshiaki Deguchi, Kazuki Maeda, Ken Takeuchi
2018 — conf
Endurance-based Dynamic VTHDistribution Shaping of 3D-TLC NAND Flash Memories to Suppress Both Lateral Charge Migration and Vertical Charge De-trap and Increase Data-retention Time by 2.7x.
ESSDERC
Shun Suzuki, Yoshiaki Deguchi, Toshiki Nakamura, Ken Takeuchi
2018 — conf
Error elimination ECC by horizontal error detection and vertical-LDPC ECC to increase data-retention time by 230% and acceptable bit-error rate by 90% for 3D-NAND flash SSDs.
IRPS
Shun Suzuki, Yoshiaki Deguchi, Toshiki Nakamura, Kyoji Mizoguchi, Ken Takeuchi
2018 C conf
Layer-by-layer Adaptively Optimized ECC of NAND flash-based SSD Storing Convolutional Neural Network Weight for Scene Recognition.
ISCAS
Keita Mizushina, Toshiki Nakamura, Yoshiaki Deguchi, Ken Takeuchi
2018 J jnl
Write and Read Frequency-Based Word-Line Batch V
IEEE J. Solid State Circuits
Yoshiaki Deguchi, Shun Suzuki, Ken Takeuchi
2017 — conf
12× bit-error acceptable, 300× extended data-retention time, value-aware SSD with vertical 3D-TLC NAND flash memories for image recognition.
CICC
Yoshiaki Deguchi, Toshiki Nakamura, Atsuro Kobayashi, Ken Takeuchi
2017 — conf
MLC/3LC NAND flash SSD cache with asymmetric error reduction huffman coding for tiered hierarchical storage.
A-SSCC
Hikaru Watanabe, Yoshiaki Deguchi, Ken Takeuchi
2017 — conf
Word-line batch Vth modulation of TLC NAND flash memories for both write-hot and cold data.
A-SSCC
Yoshiaki Deguchi, Ken Takeuchi