Yongping Fan - RankMe

14 papers Journal 6Unranked 8

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	16 Arrays of 32 All-to-All Coupled CMOS Oscillators for AI Inference and Combinatorial Optimization. CICC Hai Li, James S. Ayers, Anni Lu, You Li, Dmitri E. Nikonov, Yongping Fan, Ian A. Young
2025	J	`jnl`	Compact PNP BJT-Based Temperature Sensor and Sub-1-V Bandgap Reference for SoC Applications in 4-nm FinFET. IEEE J. Solid State Circuits You Li, David E. Duarte, James S. Ayers, Yongping Fan
2022	J	`jnl`	A 224-Gb/s DAC-Based PAM-4 Quarter-Rate Transmitter With 8-Tap FFE in 10-nm FinFET. IEEE J. Solid State Circuits Jihwan Kim, Sandipan Kundu, Ajay Balankutty, Matthew Beach, Bong Chan Kim, Stephen T. Kim, Yutao Liu, Savyasaachi Keshava Murthy, Priya Wali, Kai Yu, Hyung Seok Kim, Chuanchang Liu, Dongseok Shin, Ariel Cohen, Yoav Segal, Yongping Fan, Peng Li, Frank O'Mahony
2022	—	`conf`	A 90.9kS/s, 0.7nJ/conversion Hybrid Temperature Sensor in 4nm-class CMOS. VLSI Technology and Circuits You Li, David E. Duarte, Yongping Fan
2022	J	`jnl`	A Fractional-N Digital LC-PLL Using Coupled Frequency Doubler With Frequency-Tracking Loop for Wireline Applications. IEEE J. Solid State Circuits Dongseok Shin, Hyung Seok Kim, Chuanchang Liu, Priya Wali, Savyasaachi Keshava Murthy, Yongping Fan
2021	—	`conf`	11.5 A 23.9-to-29.4GHz Digital LC-PLL with a Coupled Frequency Doubler for Wireline Applications in 10nm FinFET. ISSCC Dongseok Shin, Hyung Seok Kim, Chuanchang Liu, Priya Wali, Savyasaachi Keshava Murthy, Yongping Fan
2021	—	`conf`	8.1 A 224Gb/s DAC-Based PAM-4 Transmitter with 8-Tap FFE in 10nm CMOS. ISSCC Jihwan Kim, Sandipan Kundu, Ajay Balankutty, Matthew Beach, Bong Chan Kim, Stephen Kim, Yutao Liu, Savyassachi Keshava Murthy, Priya Wali, Kai Yu, Hyung Seok Kim, Chuanchang Liu, Dongseok Shin, Ariel Cohen, Yongping Fan, Frank O'Mahony
2021	J	`jnl`	Auxiliary Feed-Forward Noise Cancellation Techniques for a Generic Type-II Ring Oscillator Phase Locked Loop. IEEE Trans. Circuits Syst. II Express Briefs Shravan S. Nagam, Yongping Fan, Peter R. Kinget
2020	—	`conf`	A 0.5V-to-0.9V 0.2GHz-to-5GHz Ultra-Low-Power Digitally-Assisted Analog Ring PLL with Less Than 200ns Lock Time in 22nm FinFET CMOS Technology. CICC Bo Xiang, Yongping Fan, James S. Ayers, James Shen, Dan Zhang
2019	—	`conf`	Digital Leakage Compensation for a Low-Power and Low-Jitter 0.5-to-5GHz PLL in 10nm FinFET CMOS Technology. ISSCC Yongping Fan, Bo Xiang, Dan Zhang, James S. Ayers, Kuan-Yueh James Shen, Andrey Mezhiba
2018	J	`jnl`	A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. Kuan-Yueh James Shen, Syed Feruz Syed Farooq, Yongping Fan, Khoa Minh Nguyen, Qi Wang, Mark Neidengard, Nasser A. Kurd, Amr Elshazly
2016	—	`conf`	19.4 A 0.17-to-3.5mW 0.15-to-5GHz SoC PLL with 15dB built-in supply noise rejection and self-bandwidth control in 14nm CMOS. ISSCC Kuan-Yueh James Shen, Syed Feruz Syed Farooq, Yongping Fan, Khoa Minh Nguyen, Qi Wang, Amr Elshazly, Nasser A. Kurd
2010	—	`conf`	A 78mW 11.8Gb/s serial link transceiver with adaptive RX equalization and baud-rate CDR in 32nm CMOS. ISSCC Fulvio Spagna, Lidong Chen, Mamatha Deshpande, Yongping Fan, Doug Gambetta, Sujatha Gowder, Sitaraman Iyer, Rohit Kumar, Peter Kwok, Renuka Krishnamurthy, Chien-Chun Lin, Ravindran Mohanavelu, Roan Nicholson, Jeff Ou, Marcus Pasquarella, Kavitha Prasad, Hendra Rustam, Luke Tong, Amanda Tran, John Wu, Xuguang Zhang
2003	J	`jnl`	On-die termination resistors with analog impedance control for standard CMOS technology. IEEE J. Solid State Circuits Yongping Fan, Jeffrey E. Smith