| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2026 | J | jnl |
CoRR
|
| 2025 | J | jnl |
IEEE Trans. Instrum. Meas.
|
| 2025 | J | jnl |
CoRR
|
| 2024 | J | jnl |
IEEE Trans. Aerosp. Electron. Syst.
|
| 2014 | J | jnl |
ACM Trans. Archit. Code Optim.
|
| 2014 | A | conf |
ISLPED
|
| 2014 | J | jnl |
J. Comput. Sci. Technol.
|
| 2014 | B | conf |
ISPASS
|
| 2013 | — | conf |
A Study of Leveraging Memory Level Parallelism for DRAM System on Multi-core/Many-Core Architecture.
TrustCom/ISPA/IUCC
|
| 2013 | J | jnl |
CoRR
|
| 2013 | C | conf |
ICCD
|
| 2012 | B | conf |
ISPASS
|
| 2012 | C | conf |
CLUSTER
|
| 2012 | B | conf |
PACT
|
| 2012 | — | conf |
MSPC
|
| 2011 | A | conf |
ICS
|
| 2010 | C | conf |
CIT
|
| 2010 | J | jnl |
Frontiers Comput. Sci. China
|