Yong Shim - RankMe

27 papers A* 1A 1C 3Journal 19Unranked 2

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	All Stochastic-Spiking Neural Network (AS-SNN): Noise Induced Spike Pulse Generator for Input and Output Neurons With Resistive Synaptic Array. IEEE Trans. Circuits Syst. II Express Briefs Honggu Kim, Yerim An, Minchul Kim, Gyeong-Chan Heo, Yong Shim
2025	J	`jnl`	Dual-Mode 2T1C DRAM Process-In-Memory Architecture for Boolean and MAC Operations. IEEE Access Yerim An, Honggu Kim, Dongjun Son, Hakrae Yu, Yong Shim
2024	J	`jnl`	8T-SRAM Based Process-In-Memory (PIM) System With Current Mirror for Accurate MAC Operation. IEEE Access Keun-Yong Chung, Honggu Kim, Yerim An, Kiho Seong, Dong-Hyun Shin, Kwang-Hyun Baek, Yong Shim
2024	A	`conf`	Coupled 7T 1C SRAM based in-memory computing architecture with gain/offset error auto-compensated SAR ADC. ISLPED Honggu Kim, Yerim An, Yong Shim
2024	J	`jnl`	Union SRAM: PVT Variation Auto-Compensated, Bit Precision Configurable Current Mode 8T SRAM in Memory MAC Macro. IEEE Access Honggu Kim, Yerim An, Ryunyeong Kim, Sunyoung Kim, Yong Shim
2022	J	`jnl`	A 0.5 V 10 b 3 MS/s 2-Then-1b/Cycle SAR ADC With Digital-Based Time-Domain Reference and Dual-Mode Comparator. IEEE Trans. Circuits Syst. II Express Briefs Dong-Kyu Jung, Kiho Seong, Jae-Soub Han, Yong Shim, Kwang-Hyun Baek
2022	J	`jnl`	A 2.5 GS/s 7-Bit 5-Way Time-Interleaved SAR ADC With On-Chip Background Offset and Timing-Skew Calibration. IEEE Trans. Circuits Syst. II Express Briefs Kiho Seong, Jae-Soub Han, Yong Shim, Kwang-Hyun Baek
2022	J	`jnl`	A Highly Efficient Time-Based MPPT Circuit With Extended Power Range and Minimized Tuning Switching Frequency. IEEE Access Van-Thai Dang, Myeong-Gyu Yang, Chung-Hee Jang, Sukho Lee, Yong Shim, Kwang-Hyun Baek
2021	J	`jnl`	A Reference-Sampling Based Calibration-Free Fractional-N PLL with a PI-Linked Sampling Clock Generator. Sensors Jae-Soub Han, Tae-Hyeok Eom, Seong-Wook Choi, Kiho Seong, Dong-Hyun Yoon, Tony Tae-Hyoung Kim, Kwang-Hyun Baek, Yong Shim
2021	J	`jnl`	An Accurate Time-Based MPPT Circuit With Two-Period Tracking Algorithm and Convergence Range Averaging Technique for IoT Applications. IEEE Access Van-Thai Dang, Myeong-Gyu Yang, Yong Shim, Woojoo Lee, Kwang-Hyun Baek
2020	J	`jnl`	Revisiting Stochastic Computing in the Era of Nanoscale Nonvolatile Technologies. IEEE Trans. Very Large Scale Integr. Syst. Amogh Agrawal, Indranil Chakraborty, Deboleena Roy, Utkarsh Saxena, Saima Sharmin, Minsuk Koo, Yong Shim, Gopalakrishnan Srinivasan, Chamika M. Liyanagedera, Abhronil Sengupta, Kaushik Roy
2020	J	`jnl`	sBSNN: Stochastic-Bits Enabled Binary Spiking Neural Network With On-Chip Learning for Energy Efficient Neuromorphic Computing at the Edge. IEEE Trans. Circuits Syst. I Regul. Pap. Minsuk Koo, Gopalakrishnan Srinivasan, Yong Shim, Kaushik Roy
2020	J	`jnl`	sBSNN: Stochastic-Bits Enabled Binary Spiking Neural Network with On-Chip Learning for Energy Efficient Neuromorphic Computing at the Edge. CoRR Minsuk Koo, Gopalakrishnan Srinivasan, Yong Shim, Kaushik Roy
2018	—	`—`	Stochastic Algorithms for Optimization: Devices, Circuits, and Architecture Yong Shim
2017	J	`jnl`	Coupled Spin-Torque Nano-Oscillator-Based Computation: A Simulation Study. ACM J. Emerg. Technol. Comput. Syst. Karthik Yogendra, Chamika M. Liyanagedera, Deliang Fan, Yong Shim, Kaushik Roy
2017	J	`jnl`	Stochastic Spin-Orbit Torque Devices as Elements for Bayesian Inference. CoRR Yong Shim, Shuhan Chen, Abhronil Sengupta, Kaushik Roy
2017	C	`conf`	Stochastic Switching of SHE-MTJ as a Natural Annealer for Efficient Combinatorial Optimization. ICCD Yong Shim, Akhilesh Jaiswal, Kaushik Roy
2016	—	`conf`	Computing with coupled Spin Torque Nano Oscillators. ASP-DAC Karthik Yogendra, Deliang Fan, Yong Shim, Minsuk Koo, Kaushik Roy
2016	J	`jnl`	Ising spin model using Spin-Hall Effect (SHE) induced magnetization reversal in Magnetic-Tunnel-Junction. CoRR Yong Shim, Akhilesh Jaiswal, Kaushik Roy
2016	A*	`conf`	Low-power approximate convolution computing unit with domain-wall motion based "spin-memristor" for image processing applications. DAC Yong Shim, Abhronil Sengupta, Kaushik Roy
2016	J	`jnl`	Proposal for an All-Spin Artificial Neural Network: Emulating Neural and Synaptic Functionalities Through Domain Wall Motion in Ferromagnets. IEEE Trans. Biomed. Circuits Syst. Abhronil Sengupta, Yong Shim, Kaushik Roy
2015	J	`jnl`	Simulation studies of an All-Spin Artificial Neural Network: Emulating neural and synaptic functionalities through domain wall motion in ferromagnets. CoRR Abhronil Sengupta, Yong Shim, Kaushik Roy
2014	J	`jnl`	STT-SNN: A Spin-Transfer-Torque Based Soft-Limiting Non-Linear Neuron for Low-Power Artificial Neural Networks. CoRR Deliang Fan, Yong Shim, Anand Raghunathan, Kaushik Roy
2013	J	`jnl`	A 1.2 V 30 nm 3.2 Gb/s/pin 4 Gb DDR4 SDRAM With Dual-Error Detection and PVT-Tolerant Data-Fetch Scheme. IEEE J. Solid State Circuits Kyomin Sohn, Taesik Na, Indal Song, Yong Shim, Wonil Bae, Sanghee Kang, Dongsu Lee, Hangyun Jung, Seok-Hun Hyun, Hanki Jeoung, Ki Won Lee, Jun-Seok Park, Jongeun Lee, ByungHyun Lee, Inwoo Jun, Juseop Park, Junghwan Park, Hundai Choi, Sanghee Kim, Haeyoung Chung, Young Choi, Dae-Hee Jung, Byungchul Kim, Jung-Hwan Choi, Seong-Jin Jang, Chi-Wook Kim, Jung-Bae Lee, Joo-Sun Choi
2012	—	`conf`	A 1.2V 30nm 3.2Gb/s/pin 4Gb DDR4 SDRAM with dual-error detection and PVT-tolerant data-fetch scheme. ISSCC Kyomin Sohn, Taesik Na, Indal Song, Yong Shim, Wonil Bae, Sanghee Kang, Dongsu Lee, Hangyun Jung, Hanki Jeoung, Ki Won Lee, Junsuk Park, Jongeun Lee, ByungHyun Lee, Inwoo Jun, Juseop Park, Junghwan Park, Hundai Choi, Sanghee Kim, Haeyoung Chung, Young Choi, Dae-Hee Jung, Jang Seok Choi, Byung-Sick Moon, Jung-Hwan Choi, Byungchul Kim, Seong-Jin Jang, Joo-Sun Choi, Kyungseok Oh
2006	C	`conf`	A mixed-structure delay locked-loop with wide range and fast locking. ISCAS Youngkwon Jo, Yong Shim, Soo Hwan Kim, Suki Kim, Kwanjun Cho
2006	C	`conf`	A register controlled delay locked loop using a TDC and a new fine delay line scheme. ISCAS Yong Shim, Youngkwon Jo, Soo Hwan Kim, Suki Kim, Kwanjun Cho