Yngvar Berg - RankMe

113 papers B 2C 25Journal 5Unranked 81

Year	Rank	Type	Title / Venue / Authors
2024	—	`conf`	Evolution of Technological Innovations, User Experiences, and Literacies. CoPDA@AVI Omid Mirmotahari, Anders I. Mørch, Yngvar Berg
2019	—	`conf`	A 4.5 fJ/conversion-step 10-bit 0.6V Asynchronous SAR ADC for Battery-free Miniature Sensor Nodes in 65nm CMOS. MIXDES Ali Dadashi, Yngvar Berg, Omid Mirmotahari
2019	C	`conf`	A Case-Study of Automated Feedback Assessment. EDUCON Omid Mirmotahari, Yngvar Berg, Stein Gjessing, Ester Fremstad, Crina Damsa
2019	—	`conf`	Framework for Pupil-to-Student Transition, Learning Environment and Semester Start for First-Year Students. I3E Workshops Omid Mirmotahari, Gunnar Rye Bergersen, Yngvar Berg, Kristin Bråthen, Kristin Broch Eliassen
2019	C	`conf`	Q-Loading of Colpitts-Based Mass-Sensing Oscillators in Resonator-based MEMS Airborne Particulate Matter (PM) Sensors. ICCE Mehdi Azadmehr, Igor Paprotny, Yngvar Berg
2019	C	`conf`	Student Engagement by Employing Student Peer Reviews with Criteria-Based Assessment. EDUCON Omid Mirmotahari, Yngvar Berg, Ester Fremstad, Crina Damsa
2018	—	`conf`	A Discrete Implementation of a Semi-Floating Gate Amplifier for Resonating Sensor Front-End. MIXDES Luca Marchetti, Yngvar Berg, Mehdi Azadmehr
2018	—	`conf`	A Low Power, High Gain Semi-Floating Gate Amplifier for Resonating Sensors Front-End. ISVLSI Luca Marchetti, Yngvar Berg, Mehdi Azadmehr
2018	—	`conf`	A New Differential Oscillator with T-type Feedback. UEMCON Mehdi Azadmehr, Aaron Schreyer-Miller, Igor Paprotny, Yngvar Berg
2018	C	`conf`	A Self-Actuated Front-End for Resonating Sensors. TENCON Luca Marchetti, Yngvar Berg, Mehdi Azadmehr
2018	—	`conf`	A bidirectional front-end for ultrasonic pulse-echo measurements. ICNSC Luca Marchetti, Yngvar Berg, Mehdi Azadmehr
2018	—	`conf`	Formative feedback for learning. Case studies of automated feedback in undergraduate computer science education. ICLS Omid Mirmotahari, Crina Damsa, Yngvar Berg
2018	J	`jnl`	Lower-Order Compensation Chain Threshold-Reduction Technique for Multi-Stage Voltage Multipliers. Sensors Francesco Dell'Anna, Tao Dong, Ping Li, Yumei Wen, Mehdi Azadmehr, Mario R. Casu, Yngvar Berg
2018	C	`conf`	Structured peer review using a custom assessment program for electrical engineering students. EDUCON Omid Mirmotahari, Yngvar Berg
2018	—	`conf`	Studentaktivisering gjennom bruk av hverandrevurdering for førstesemesters studenter i Canvas LMS: en forsøksstudie. NIK Omid Mirmotahari, Yngvar Berg, Dag Langmyhr, Ester Fremstad, Crina Damsa
2017	—	`conf`	A bidirectional front-end with bandwidth control for actuation and read-out of MEMS resonating sensors. MIXDES Luca Marchetti, Yngvar Berg, Mehdi Azadmehr
2017	—	`conf`	A control system for a low power bidirectional front-end for resonating sensors. ICNSC Luca Marchetti, Yngvar Berg, Omid Mirmotahari, Mehdi Azadmehr
2017	C	`conf`	A low power analog voltage similarity circuit. ISCAS Mehdi Azadmehr, Luca Marchetti, Yngvar Berg
2017	—	`conf`	A virtual Wheatstone bridge front-end for resistive sensors. ICNSC Mehdi Azadmehr, Luca Marchetti, Moataz S. El-Kharashi, Yngvar Berg
2017	—	`conf`	An autozeroing inverter based front-end for resonating sensors. DTIS Luca Marchetti, Yngvar Berg, Mehdi Azadmehr
2017	—	`conf`	Erfaringer fra strukturert peer review ved bruk av et egetutviklet sensureringsprogram. NIK Omid Mirmotahari, Yngvar Berg
2017	J	`jnl`	High-Speed Digital Domino Logic for Ultra-Low Supply Voltages. Circuits Syst. Signal Process. Omid Mirmotahari, Yngvar Berg
2016	—	`conf`	A discrete implementation of a bidirectional circuit for actuation and read-out of resonating sensors. DTIS Luca Marchetti, Amar Romi, Yngvar Berg, Omid Mirmotahari, Mehdi Azadmehr
2016	—	`conf`	Bidirectional front-end for piezoelectric resonator. ICNSC Luca Marchetti, Yngvar Berg, Omid Mirmotahari, Mehdi Azadmehr
2016	—	`conf`	High-speed dynamic dual-rail ultra low voltage static CMOS logic operating at 300 mV. DTIS Omid Mirmotahari, Ali Dadashi, Mehdi Azadmehr, Yngvar Berg
2015	—	`conf`	A new self-sensing approach for actuation and readout of piezoelectric resonating sensor. ICNSC Mehdi Azadmehr, Belal K. Khajeh, Yngvar Berg
2015	—	`conf`	An ultra-low-voltage, semi-floating-gate, domino, dual-rail, NOR gate. ICECS Ali Dadashi, Omid Mirmotahari, Yngvar Berg
2015	—	`conf`	Flexible Ultra-Low-Voltage CMOS Circuit Design Applicable for Digital and Analog Circuits Operating below 300mV. ISVLSI Yngvar Berg, Omid Mirmotahari
2015	—	`conf`	High-Speed, Modified, Bulk stimulated, Ultra-Low-Voltage, Domino Inverter. ISVLSI Ali Dadashi, Yngvar Berg, Omid Mirmotahari
2015	—	`conf`	Low-voltage and high-speed CMOS circuit design with low-power mode. ICECS Yngvar Berg, Omid Mirmotahari
2015	—	`conf`	Novel high-speed dynamic differential ultra low voltage logic for supply-voltage below 300 mV. ICECS Omid Mirmotahari, Ali Dadashi, Mehdi Azadmehr, Yngvar Berg
2014	—	`conf`	An ultra-low voltage tunable dual-Band Pass Filter. SSD Mehdi Azadmehr, Belal K. Khajeh, Yngvar Berg
2011	—	`conf`	Ultra Low-Voltage and High-Speed CMOS Full Adder Using Floating-Gates and Multiple-Valued Logic. ISMVL Yngvar Berg
2010	—	`conf`	Low Voltage Semi Floating-Gate Binary to Multiple-Value and Multiple-Value to Binary Converters. ISMVL Yngvar Berg
2010	—	`conf`	New SRAM design using body bias technique for ultra low power applications. ISQED Farshad Moradi, Dag T. Wisland, Hamid Mahmoodi, Yngvar Berg, Tuan Vu Cao
2010	—	`conf`	Novel high speed and ultra low voltage CMOS flip-flops. ICECS Yngvar Berg
2010	C	`conf`	Novel ultra low voltage transconductance amplifier. ISCAS Yngvar Berg
2010	C	`conf`	Novel ultra low-voltage and high speed domino CMOS logic. VLSI-SoC Yngvar Berg
2010	—	`conf`	Reconfigurable pseudo floating-gate analog circuits. ICECS Yngvar Berg, Mehdi Azadmehr
2010	C	`conf`	Static ultra-low-voltage high-speed CMOS logic and latches. VLSI-SoC Yngvar Berg
2010	C	`conf`	Ultra low voltage and high speed CMOS flip-flop using floating-gates. VLSI-SoC Yngvar Berg
2010	C	`conf`	Ultra low voltage static carry generate circuit. ISCAS Yngvar Berg
2010	C	`conf`	Ultra low-voltage bidirectional current mirror using clocked semi-floating-gate transistors. DDECS Yngvar Berg
2009	—	`conf`	Clocked semi-floating-gate pseudo differential pair for low-voltage analog design. ECCTD Yngvar Berg, Omid Mirmotahari
2009	—	`conf`	Clocked semi-floating-gate ultra low-voltage current multiplier. ECCTD Yngvar Berg, Omid Mirmotahari
2009	—	`conf`	Clocked semi-floating-gate ultra low-voltage inverting current mirror. SoCC Yngvar Berg, Omid Mirmotahari
2009	—	`conf`	Clocked semi-floating-gate ultra low-voltage symmetric and bidirectional current mirror. SoCC Yngvar Berg, Omid Mirmotahari
2009	C	`conf`	Low voltage precharge CMOS logic. DDECS Yngvar Berg, Omid Mirmotahari
2009	—	`conf`	Novel high speed and ultra low voltage CMOS flip-flop. ICECS Yngvar Berg
2009	—	`conf`	Ultra low voltage and high speed CMOS carry generate circuits. ECCTD Yngvar Berg, Omid Mirmotahari
2009	—	`conf`	Ultra low voltage semi-floating-gate transconductance amplifier based on binary inverters. ICECS Yngvar Berg
2009	C	`conf`	Ultra low-voltage switched current mirror. DDECS Yngvar Berg, Omid Mirmotahari
2008	—	`conf`	Bi-directional Current-Starved Pseudo Floating-Gate differentiator / integrator. ICECS Mehdi Azadmehr, Yngvar Berg, Omid Mirmotahari
2008	—	`conf`	Cascade of Current-Starved Pseudo Floating-Gate inverters. ICECS Mehdi Azadmehr, Yngvar Berg
2008	—	`conf`	Clocked semi-floating-gate ultra low-voltage current mirror. ICECS Yngvar Berg, Omid Mirmotahari, Snorre Aunet
2008	—	`conf`	High Speed Ultra Low Voltage CMOS inverter. ISVLSI Yngvar Berg, Omid Mirmotahari, Johannes Goplen Lomsdalen, Snorre Aunet
2008	—	`conf`	High speed and ultra low voltage CMOS latch. ICECS Yngvar Berg, Omid Mirmotahari, Snorre Aunet
2008	—	`conf`	Low Voltage Design against Power Analysis Attacks. DELTA Omid Mirmotahari, Yngvar Berg
2008	—	`conf`	Proposal for a Bidirectional Gate Using Pseudo Floating-Gate. DELTA Omid Mirmotahari, Yngvar Berg
2008	J	`jnl`	Real-Time Reconfigurable Subthreshold CMOS Perceptron. IEEE Trans. Neural Networks Snorre Aunet, Bengt Oelmann, Per Andreas Norseng, Yngvar Berg
2008	—	`conf`	Ultra Low Voltage High Speed Differential CMOS Inverter. PATMOS Omid Mirmotahari, Yngvar Berg
2008	—	`conf`	Ultra low voltage and, nor and XOR CMOS gates. ICECS Yngvar Berg, Omid Mirmotahari, Snorre Aunet
2007	—	`conf`	Band Pass Pseudo Floating-Gate Amplifier. ICECS Yngvar Berg, Mehdi Azadmehr, Omid Mirmotahari, Snorre Aunet
2007	—	`conf`	Dual Data-Rate Cyclic D/A Converter Using Semi Floating-Gate Devices. ISMVL Renè Jensen, Yngvar Berg
2007	—	`conf`	Fast Addition Using Balanced Ternary Counters Designed with CMOS Semi-Floating Gate Devices. ISMVL Henning Gundersen, Yngvar Berg
2007	—	`conf`	Fault Tolerant CMOS Logic Using Ternary Gates. ISMVL Yngvar Berg, Renè Jensen, Johannes Goplen Lomsdalen, Henning Gundersen, Snorre Aunet
2006	—	`conf`	A Novel Balanced Ternary Adder Using Recharged Semi-Floating Gate Devices. ISMVL Henning Gundersen, Yngvar Berg
2006	C	`conf`	A novel ternary more, less and equality circuit using recharged semi-floating gate devices. ISCAS Henning Gundersen, Yngvar Berg
2006	C	`conf`	Multiple Valued Counter. DDECS Johannes Goplen Lomsdalen, Renè Jensen, Yngvar Berg
2006	C	`conf`	Pseudo Floating-Gate Inverter with Feedback Control. VLSI-SoC Yngvar Berg, Omid Mirmotahari, Snorre Aunet
2006	C	`conf`	Self-refreshing Multiple Valued Memory. DDECS Johannes Goplen Lomsdalen, Renè Jensen, Yngvar Berg
2006	C	`conf`	Switched pseudo floating-gate reconfigurable linear threshold elements. ISCAS Øivind Næss, Yngvar Berg
2006	—	`conf`	Ultra low voltage CMOS gates. ICECS Yngvar Berg, Omid Mirmotahari, Per Andreas Norseng, Snorre Aunet
2005	—	`conf`	A Novel Ternary Switching Element Using CMOS Recharge Semi Floating-Gate Devices. ISMVL Henning Gundersen, Renè Jensen, Yngvar Berg
2005	B	`conf`	Low-voltage pseudo floating-gate reconfigurable linear threshold elements. IJCNN Øivind Næss, Snorre Aunet, Yngvar Berg
2004	—	`conf`	A Novel D-Latch in Multiple-Valued Semi-Floating-Gate Recharged Logic. ISMVL Omid Mirmotahari, Yngvar Berg
2004	—	`conf`	A Systolic Parallel Multiplier over GF(3m) Using Neuron-MOS DLC. ISMVL Omid Mirmotahari, Yngvar Berg
2004	—	`conf`	Basic Multiple-Valued Functions Using Recharge CMOS Logic. ISMVL Yngvar Berg, Snorre Aunet, Øivind Næss, Omid Mirmotahari
2004	—	`conf`	Max and min functions using Multiple-Valued Recharged Semi-Floating Gate circuits. ISCAS (2) Henning Gundersen, Yngvar Berg
2004	B	`conf`	Reconfigurable subthreshold CMOS perceptron. IJCNN Snorre Aunet, Bengt Oelmann, Suliman Abdalla, Yngvar Berg
2003	—	`conf`	A Novel Multiple-Input Multiple-Valued Semi-Floating-Gate LATC. ISMVL Omid Mirmotahari, Yngvar Berg
2003	—	`conf`	A low voltage second order biquad using pseudo floating-gate transistors. ISCAS (1) Øivind Næss, Espen A. Olsen, Yngvar Berg, Tor Sverre Lande
2003	J	`jnl`	Erratum to "real-time reconfigurable linear threshold elements implemented in floating-gate CMOS". IEEE Trans. Neural Networks Snorre Aunet, Yngvar Berg, Trond Sæther
2003	—	`conf`	Exploiting hyperbolic functions to increase linearity in low-voltage floating-gate transconductance amplifiers. ISCAS (1) Yngvar Berg, Snorre Aunet, Øivind Næss, Johannes Goplen Lomsdalen, Mats Høvin
2003	—	`conf`	Novel recharge semi-floating-gate CMOS logic for multiple-valued systems. ISCAS (5) Yngvar Berg, Snorre Aunet, Omid Mirmotahari, Mats Høvin
2003	J	`jnl`	Real-time reconfigurable linear threshold elements implemented in floating-gate CMOS. IEEE Trans. Neural Networks Snorre Aunet, Yngvar Berg, Trond Sæther
2003	—	`conf`	UV-programmable Floating-Gate CMOS Linear Threshold Element "P1N3". IWANN (2) Snorre Aunet, Yngvar Berg
2002	—	`conf`	A low-voltage floating-gate CMOS transconductance amplifier, and a spin-off quasi frequency tripler. ISCAS (5) Johannes Goplen Lomsdalen, Yngvar Berg, Renè Jensen
2002	—	`conf`	A low-voltage sinc ISCAS (5) Mats Høvin, Dag T. Wisland, Yngvar Berg, Tor Sverre Lande
2002	—	`conf`	A novel floating-gate binary signal to multiple-valued signal converter for multiple-valued CMOS logic. ICECS Yngvar Berg, Øivind Næss, Snorre Aunet, Johannes Goplen Lomsdalen, Mats Høvin
2002	—	`conf`	A novel floating-gate multiple-valued CMOS full-adder. ISCAS (1) Yngvar Berg, Snorre Aunet, Øivind Næss, O. Hagen, Mats Høvin
2002	—	`conf`	A novel floating-gate multiple-valued signal to binary signal converter. ICECS Yngvar Berg, Øivind Næss, Snorre Aunet, Mats Høvin
2002	—	`conf`	Delta-sigma modulation in single neurons. ISCAS (5) Mats Høvin, Dag T. Wisland, Yngvar Berg, Jan-Tore Marienborg, Tor Sverre Lande
2002	—	`conf`	Novel floating-gate multiple-valued signal to binary signal converters for multiple-valued CMOS logic. ISCAS (5) Yngvar Berg, Øivind Næss, Snorre Aunet, Renè Jensen, Mats Høvin
2002	—	`conf`	Tunable floating-gate low-voltage transconductor. ISCAS (4) Øivind Næss, Yngvar Berg
2001	—	`conf`	A 0.3 V floating-gate differential amplifier input stage with tunable gain. ICECS Yngvar Berg, Snorre Aunet, Øivind Næss, Henning Gundersen, Mats Høvin
2001	—	`conf`	A method for simulation of floating-gate UV-programmable circuits with application to three new 2-MOSFET digital circuits. ICECS Snorre Aunet, Yngvar Berg, Trond Ytterdal, Øivind Næss, Trond Sæther
2001	—	`conf`	A novel low-voltage floating-gate CMOS transconductance amplifier with sinh (tanh) shaped output current. ICECS Yngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin
2001	—	`conf`	Exploiting sinh and tanh shaped ultra low-voltage floating-gate transconductance amplifiers to reduce harmonic distortion. ISCAS (4) Yngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin
2001	—	`conf`	Extreme low-voltage floating-gate CMOS transconductance amplifier. ISCAS (1) Yngvar Berg, Snorre Aunet, Øivind Næss, Henning Gundersen, Mats Høvin
2001	—	`conf`	Floating-gate CMOS differential analog inverter for ultra low-voltage applications. ISCAS (1) Yngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin
2001	—	`conf`	Novel reconfigurable two-MOSFET UV-programmable floating-gate circuits for CARRY, NAND, NOR or INVERT functions. ICECS Snorre Aunet, Yngvar Berg, Øivind Næss, Trond Sæther
2000	C	`conf`	Neuromorphic cochlea implants. ISCAS Tor Sverre Lande, Jan-Tore Marienborg, Yngvar Berg
2000	C	`conf`	Tunable ultralow voltage transconductance amplifier and GmC filter. ISCAS Øivind Næss, Yngvar Berg
2000	C	`conf`	Ultra low-voltage floating-gate transconductance amplifier with tunable gain and linearity. ISCAS Yngvar Berg, Øivind Næss, Mats Høvin
2000	C	`conf`	Ultra low-voltage floating-gate transconductance amplifier. ISCAS Yngvar Berg, Øivind Næss, Mats Høvin
2000	C	`conf`	Ultralow-voltage floating-gate analog multiplier with tunable linearity. ISCAS Yngvar Berg, Øivind Næss, Mats Høvin
1999	—	`conf`	Area efficient circuit tuning with floating-gate techniques. ISCAS (2) Yngvar Berg, Tor Sverre Lande
1999	—	`conf`	Tunable current mirrors for ultra low voltage. ISCAS (2) Yngvar Berg, Tor Sverre Lande
1999	—	`conf`	Ultra low voltage current multiplier/divider. ICECS Yngvar Berg, Tor Sverre Lande
1998	—	`conf`	Ultra low voltage transconductance amplifier. ICECS Tor Sverre Lande, Yngvar Berg
1996	—	`conf`	FLOGIC-Floating-gate logic for low-power operation. ICECS Tor Sverre Lande, Dag T. Wisland, Trond Sæther, Yngvar Berg
1995	C	`conf`	Scalable Mean Rate Signal Encoding Analog Neural Network. ISCAS Yngvar Berg, Jon-Erik Ruth, Tor Sverre Lande