Yizheng Ye

33 papers A 1C 5Misc 2Journal 8Unranked 17
YearRankTypeTitle / Venue / Authors
2012 J jnl
Test Pattern Generation Based on Multi-TRC Scan Architecture for Reducing Test Cost.
J. Low Power Electron.
Bin Zhou, Liyi Xiao, Yizheng Ye, Xin-chun Wu, Bei Cao
2011 J jnl
Optimization of Test Power and Data Volume in BIST Scheme Based on Scan Slice Overlapping.
J. Electron. Test.
Bin Zhou, Liyi Xiao, Yizheng Ye, Xin-chun Wu
2010 J jnl
A test set embedding approach based on twisted-ring counter with few seeds.
Integr.
Bin Zhou, Yizheng Ye, Zhao-lin Li, Jianwei Zhang, Xin-chun Wu, Rui Ke
2010 J jnl
Exact BER Analysis of Differential Chaos Shift Keying Communication System in Fading Channels.
Wirel. Pers. Commun.
Zhibo Zhou, Jinxiang Wang, Yizheng Ye
2009 — conf
A new low power test pattern generator using a variable-length ring counter.
ISQED
Bin Zhou, Yizheng Ye, Zhao-lin Li, Xin-chun Wu, Rui Ke
2009 C conf
Reduction of Test Power and Data Volume in BIST Scheme based on Scan Slice Overlapping.
ISCAS
Bin Zhou, Yizheng Ye, Xin-chun Wu, Zhao-lin Li
2009 C conf
Self-timed Charge Recycling Search-line Drivers in Content-addressable Memories.
ISCAS
Jianwei Zhang, Yizheng Ye, Bin-Da Liu, Feng Guan
2008 J jnl
A Current-Recycling Technique for Shadow-Match-Line Sensing in Content-Addressable Memories.
IEEE Trans. Very Large Scale Integr. Syst.
Jianwei Zhang, Yizheng Ye, Bin-Da Liu
2008 J jnl
A Fully Integrated CMOS Active Bandpass Filter for Multiband RF Front-Ends.
IEEE Trans. Circuits Syst. II Express Briefs
Zhiqiang Gao, Jianguo Ma, Mingyan Yu, Yizheng Ye
2008 Misc conf
Delay and Energy Efficient Design of On-Chip Encoded Bus with Repeaters.
VLSI Design
Qingli Zhang, Jinxiang Wang, Yizheng Ye
2007 — conf
Simultaneous reduction in test data volume and test time for TRC-reseeding.
ACM Great Lakes Symposium on VLSI
Bin Zhou, Yizheng Ye, Yongsheng Wang
2006 C conf
A CMOS bandpass filter with wide-tuning range for wireless applications.
ISCAS
Zhiqiang Gao, Mingyan Yu, Yizheng Ye, Jianguo Ma
2006 — conf
A Low-Power Technique Based on Charge Injection and Current-Saving Methods for Match-Line Sensing in Content-Addressable Memories.
APCCAS
Jianwei Zhang, Yizheng Ye, Bin-Da Liu
2006 Misc conf
A Pipelined Switched-Current Chaotic System for the High-Speed Truly Random Number Generation in Crypto Processor.
VLSI Design
Tong Zhou, Mingyan Yu, Yizheng Ye
2006 A conf
A new mismatch-dependent low power technique with shadow match-line voltage-detecting scheme for CAMs.
ISLPED
Jianwei Zhang, Yizheng Ye, Bin-Da Liu
2006 — conf
An energy-efficient temporal encoding circuit technique for on-chip high performance buses.
ACM Great Lakes Symposium on VLSI
Qingli Zhang, Jinxiang Wang, Yizheng Ye
2006 C conf
Dependency driven partitioning objects generation for hardware/software partitioning.
ISCAS
Shengtian Sang, Xiaoming Li, Yizheng Ye
2006 — conf
Design of A Low Power High Entropy Chaos-Based Truly Random Number Generator.
APCCAS
Tong Zhou, Zhibo Zhou, Mingyan Yu, Yizheng Ye
2006 — conf
Low-Power Crosstalk Avoidance Encoding for On-Chip Data Buses.
APCCAS
Qingli Zhang, Jinxiang Wang, Yizheng Ye
2006 C conf
Post linearization of CMOS LNA using double cascade FETs.
ISCAS
Guochi Huang, Tae-sung Kim, Byung-Sung Kim, Mingyan Yu, Yizheng Ye
2005 — conf
A CMOS RF tuning wide-band bandpass filter for wireless applications.
SoCC
Zhiqiang Gao, Jianguo Ma, Mingyan Yu, Yizheng Ye
2005 — conf
Large tuning band range of high frequency filter for wireless applications.
ISCAS (1)
Zhiqiang Gao, Jianguo Ma, Yizheng Ye, Mingyan Yu
2005 — conf
Optimal Schemes for ADC BIST Based on Histogram.
Asian Test Symposium
Yongsheng Wang, Jinxiang Wang, Fengchang Lai, Yizheng Ye
2005 — conf
The improvement for transaction level verification functional coverage.
ISCAS (6)
Zhonghai Wang, Yizheng Ye
2003 — conf
A Test Architecture for System-on-a-Chip.
Asian Test Symposium
Yongsheng Wang, Liyi Xiao, Mingyan Yu, Jinxiang Wang, Yizheng Ye
2002 J jnl
A New Synchronization Algorithm for VHDL-AMS Simulation.
J. Comput. Sci. Technol.
Liyi Xiao, Yizheng Ye, Bin Li
2002 — conf
Design and Realization of a Low Power Register File Using Energy Model.
PATMOS
Xuemei Zhao, Yizheng Ye
2002 — conf
Design and implementation of concatenated decoder.
DCV
Yuxin You, Jinxiang Wang, Mingyan Yu, Yizheng Ye
2001 — conf
A mixed-signal simulator for VHDL-AMS.
ASP-DAC
Liyi Xiao, Bin Li, Yizheng Ye, Guoyong Huang, Jinjun Guo, Peng Zhang
2001 — conf
CLUGGS and CLUCR-Two Matrix Solution Methods for General Circuit Simulation.
Annual Simulation Symposium
Bin Li, Liyi Xiao, Yizheng Ye, Guoyong Huang
2000 J jnl
Implementation of Java Card Virtual Machine.
J. Comput. Sci. Technol.
Liu Songyan, Zhigang Mao, Yizheng Ye
1999 — conf
A New Algorithm for Retiming-Based Partial Scan.
Asian Test Symposium
Zulan Huang, Yizheng Ye, Zhigang Mao
1998 — conf
Test Pattern Generation for Column Compression Multiplier.
Asian Test Symposium
Pingying Zeng, Zhigang Mao, Yizheng Ye, Yuliang Deng