Yixin Xu

20 papers A* 2A 2Misc 1Journal 10Unranked 5
YearRankTypeTitle / Venue / Authors
2025 Misc conf
A Study on the Impact of Temperature-Dependent Ferroelectric Switching Behavior in 3D Memory Architecture.
VLSID
Varun Darshana Parekh, Yi Xiao, Yixin Xu, Zijian Zhao, Zhouhang Jiang, Rudra Biswas, Sumitha George, Kai Ni, Vijaykrishnan Narayanan
2024 J jnl
A Module-Level Configuration Methodology for Programmable Camouflaged Logic.
ACM Trans. Design Autom. Electr. Syst.
Jianfeng Wang, Zhonghao Chen, Jiahao Zhang, Yixin Xu, Tongguang Yu, Ziheng Zheng, Enze Ye, Sumitha George, Huazhong Yang, Yongpan Liu, Kai Ni, Vijaykrishnan Narayanan, Xueqing Li
2024 — conf
Compact Multiplexer Design with Multi-threshold Ferroelectric FETs.
ISVLSI
Sanwar Ahmed Ovy, Md Ashraful Islam Romel, Yi Xiao, Yixin Xu, Kai Ni, Sumitha George
2024 J jnl
ProtFe: Low-Cost Secure Power Side-Channel Protection for General and Custom FeFET-Based Memories.
ACM Trans. Design Autom. Electr. Syst.
Taixin Li, Boran Sun, Hongtao Zhong, Yixin Xu, Vijaykrishnan Narayanan, Liang Shi, Tianyi Wang, Yao Yu, Thomas Kämpfe, Kai Ni, Huazhong Yang, Xueqing Li
2024 A conf
REMNA: Variation-Resilient and Energy-Efficient MLC FeFET Computing-in-Memory Using NAND Flash-Like Read and Adaptive Control.
ICCAD
Taixin Li, Hongtao Zhong, Yixin Xu, Vijaykrishnan Narayanan, Kai Ni, Huazhong Yang, Thomas Kämpfe, Xueqing Li
2023 — conf
A Compact Ferroelectric 2T-(n+1)C Cell to Implement AND-OR Logic in Memory.
ISVLSI
Yi Xiao, Yixin Xu, Shan Deng, Zijian Zhao, Sumitha George, Kai Ni, Vijaykrishnan Narayanan
2023 A* conf
ASMCap: An Approximate String Matching Accelerator for Genome Sequence Analysis Based on Capacitive Content Addressable Memory.
DAC
Hongtao Zhong, Zhonghao Chen, Wenqin Huangfu, Chen Wang, Yixin Xu, Tianyi Wang, Yao Yu, Yongpan Liu, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li
2023 J jnl
ASMCap: An Approximate String Matching Accelerator for Genome Sequence Analysis Based on Capacitive Content Addressable Memory.
CoRR
Hongtao Zhong, Zhonghao Chen, Wenqin Huangfu, Chen Wang, Yixin Xu, Tianyi Wang, Yao Yu, Yongpan Liu, Vijaykrishnan Narayanan, Huazhong Yang, Xueqing Li
2023 J jnl
Embedding Security into Ferroelectric FET Array via In-Situ Memory Operation.
CoRR
Yixin Xu, Yi Xiao, Zijian Zhao, Franz Müller, Alptekin Vardar, Xiao Gong, Sumitha George, Thomas Kämpfe, Vijaykrishnan Narayanan, Kai Ni
2023 — conf
Fe-GCN: A 3D FeFET Memory Based PIM Accelerator for Graph Convolutional Networks.
ISVLSI
Hongtao Zhong, Yu Zhu, Longfei Luo, Taixin Li, Chen Wang, Yixin Xu, Tianyi Wang, Yao Yu, Vijaykrishnan Narayanan, Yongpan Liu, Liang Shi, Huazhong Yang, Xueqing Li
2023 J jnl
FeFET-Based Logic-in-Memory Supporting SA-Free Write-Back and Fully Dynamic Access With Reduced Bitline Charging Activity and Recycled Bitline Charge.
IEEE Trans. Circuits Syst. I Regul. Pap.
Wenjun Tang, Mingyen Lee, Juejian Wu, Yixin Xu, Yao Yu, Yongpan Liu, Kai Ni, Yu Wang, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li
2023 A conf
Lowering Latency of Embedded Memory by Exploiting In-Cell Victim Cache Hierarchy Based on Emerging Multi-Level Memory Devices.
ICCAD
Juejian Wu, Tianyu Liao, Taixin Li, Yixin Xu, Vijaykrishnan Narayanan, Yongpan Liu, Huazhong Yang, Xueqing Li
2023 J jnl
Powering Disturb-Free Reconfigurable Computing and Tunable Analog Electronics with Dual-Port Ferroelectric FET.
CoRR
Zijian Zhao, Shan Deng, Swetaki Chatterjee, Zhouhang Jiang, Muhammad Shaffatul Islam, Yi Xiao, Yixin Xu, Scott Meninger, Mohamed Mohamed, Rajiv V. Joshi, Yogesh Singh Chauhan, Halid Mulaosmanovic, Stefan Dünkel, Dominik Kleimaier, Sven Beyer, Hussam Amrouch, Vijaykrishnan Narayanan, Kai Ni
2023 A* conf
Victor: A Variation-resilient Approach Using Cell-Clustered Charge-domain computing for High-density High-throughput MLC CiM.
DAC
Mingyen Lee, Wenjun Tang, Yiming Chen, Juejian Wu, Hongtao Zhong, Yixin Xu, Yongpan Liu, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li
2023 — conf
WeightLock: A Mixed-Grained Weight Encryption Approach Using Local Decrypting Units for Ciphertext Computing in DNN Accelerators.
AICAS
Jianfeng Wang, Zhonghao Chen, Yiming Chen, Yixin Xu, Tianyi Wang, Yao Yu, Vijaykrishnan Narayanan, Sumitha George, Huazhong Yang, Xueqing Li
2022 J jnl
ALL-MASK: A Reconfigurable Logic Locking Method for Multicore Architecture with Sequential-Instruction-Oriented Key.
CoRR
Jianfeng Wang, Zhonghao Chen, Jiahao Zhang, Yixin Xu, Tongguang Yu, Enze Ye, Ziheng Zheng, Huazhong Yang, Sumitha George, Yongpan Liu, Vijaykrishnan Narayanan, Xueqing Li
2022 J jnl
CMOS-Compatible Ising Machines built using Bistable Latches Coupled through Ferroelectric Transistor Arrays.
CoRR
Antik Mallick, Zijian Zhao, Mohammad Khairul Bashar, Shamiul Alam, Md. Mazharul Islam, Yi Xiao, Yixin Xu, Ahmedullah Aziz, Vijaykrishnan Narayanan, Kai Ni, Nikhil Shukla
2022 J jnl
Ferroelectric FET based Context-Switching FPGA Enabling Dynamic Reconfiguration for Adaptive Deep Learning Machines.
CoRR
Yixin Xu, Zijian Zhao, Yi Xiao, Tongguang Yu, Halid Mulaosmanovic, Dominik Kleimaier, Stefan Dünkel, Sven Beyer, Xiao Gong, Rajiv V. Joshi, X. Sharon Hu, Shixian Wen, Amanda Sofie Rios, Kiran Lekkala, Laurent Itti, Eric Homan, Sumitha George, Vijaykrishnan Narayanan, Kai Ni
2021 J jnl
Hardware Functional Obfuscation With Ferroelectric Active Interconnects.
CoRR
Tongguang Yu, Yixin Xu, Shan Deng, Zijian Zhao, Nicholas Jao, You Sung Kim, Stefan Dünkel, Sven Beyer, Kai Ni, Sumitha George, Vijaykrishnan Narayanan
2020 — conf
Adaptive Circuit Approaches to Low-Power Multi-Level/Cell FeFET Memory.
ASP-DAC
Juejian Wu, Yixin Xu, Bowen Xue, Yu Wang, Yongpan Liu, Huazhong Yang, Xueqing Li