Yiwen Wang

12 papers A 1C 3Journal 2Unranked 6

Year	Rank	Type	Title / Venue / Authors
2010	A	`conf`	Application Specific Instruction Set Exploration on VLIW Architectures. ESA Chengpin Tseng, Chiuyun Hung, De-Sheng Chen, Kuei-Chung Chang, Yiwen Wang
2008	—	`conf`	Memory Models for an Application-Specific Instruction-set Processor Design Flow. ICESS Jiying Wu, Chijie Lin, Desheng Chen, Yiwen Wang
2008	—	`conf`	Performance Improvement using Application-Specific Instructions under Hardware Constraints. ICESS Chijie Lin, Jiying Wu, Jerung Shiu, Chiuyun Hung, De-Sheng Chen, Yiwen Wang
2007	C	`conf`	Application-Specific Instruction Generation for SOC Processors. ISCAS Shengjyi Yang, Chijie Lin, Chiuyun Hung, Jiying Wu, Yiwen Wang
2007	J	`jnl`	Fixed-outline floorplanning using robust evolutionary search. Eng. Appl. Artif. Intell. De-Sheng Chen, Chang-Tzu Lin, Yiwen Wang, Ching-Hwa Cheng
2007	C	`conf`	Noise-Aware Floorplanning for Fast Power Supply Network Design. ISCAS Chang-Tzu Lin, Tai-Wei Kung, De-Sheng Chen, Yiwen Wang, Ching-Hwa Cheng
2006	J	`jnl`	Modern Floorplanning with Boundary and Fixed-outline Constraints via Genetic Clustering Algorithm. J. Circuits Syst. Comput. Chang-Tzu Lin, De-Sheng Chen, Yiwen Wang
2005	—	`conf`	Modem floorplanning with abutment and fixed-outline constraints. ISCAS (6) Chang-Tzu Lin, De-Sheng Chen, Yiwen Wang, Hsin-Hsien Ho
2004	—	`conf`	Fast multilevel floorplanning for large scale modules. ISCAS (5) Ching-Chung Hu, De-Sheng Chen, Yiwen Wang
2004	—	`conf`	Robust fixed-outline floorplanning through evolutionary search. ASP-DAC Chang-Tzu Lin, De-Sheng Chen, Yiwen Wang
2003	—	`conf`	Non-slicing floorplans with boundary constraints using generalized polish expression. ASP-DAC De-Sheng Chen, Chang-Tzu Lin, Yiwen Wang
2002	C	`conf`	GPE: A New Representation for VLSI Floorplan Problem. ICCD Chang-Tzu Lin, De-Sheng Chen, Yiwen Wang