Yiqun Zhu

20 papers A 1B 1Journal 9Unranked 9
YearRankTypeTitle / Venue / Authors
2025 J jnl
Causal Disentanglement-Based Hidden Markov Model for Cross-Domain Bearing Fault Diagnosis.
IEEE Trans. Neural Networks Learn. Syst.
Rihao Chang, Yongtao Ma, Weizhi Nie, Jie Nie, Yiqun Zhu, An-An Liu
2023 — conf
Algorithmic Protection Study Based on a Virtual Location.
6GN (1)
Zehui Wen, Yiqun Zhu
2022 — conf
A Highly Customizable and Efficient Hardware Implementation for Parallel Matrix Inversion.
FPT
Sultan Alqahtani, Yiqun Zhu, Qizhi Shi, Xiaolin Meng, Xinhua Wang
2022 J jnl
Deep Reinforcement Learning for the Detection of Abnormal Data in Smart Meters.
Sensors
Shuxian Sun, Chunyu Liu, Yiqun Zhu, Haihang He, Shuai Xiao, Jiabao Wen
2022 J jnl
Self-Attention and Convolution Fusion Network for Land Cover Change Detection over a New Data Set in Wenzhou, China.
Remote. Sens.
Yiqun Zhu, Guojian Jin, Tongfei Liu, Hanhong Zheng, Mingyang Zhang, Shuang Liang, Jieyi Liu, Linqi Li
2020 — conf
Hardware Implementations with High Throughput, Low-Latency and Low-Area for Matrix Inversion.
FPT
Sultan Alqahtani, Yiqun Zhu, Qizhi Shi, Xiaolin Meng, Xinhua Wang
2020 J jnl
Unidimensional continuous-variable measurement-device-independent quantum key distribution.
Quantum Inf. Process.
Dongyun Bai, Peng Huang, Yiqun Zhu, Hongxin Ma, Tailong Xiao, Tao Wang, Guihua Zeng
2019 J jnl
An Artificial Noise assisted secrecy-enhancing scheme for Space-Time Shift Keying systems.
Phys. Commun.
Shuai Wang, Xueqin Jiang, Ping Wang, Yiqun Zhu
2019 J jnl
Robust Frame Synchronization Scheme for Continuous-Variable Quantum Key Distribution with Simple Process.
Entropy
Rui Chen, Peng Huang, Dengwen Li, Yiqun Zhu, Guihua Zeng
2013 A conf
A memory-efficient hardware architecture for real-time feature detection of the SIFT algorithm (abstract only).
FPGA
Wenjuan Deng, Yiqun Zhu
2013 J jnl
Laser Doppler Blood Flow Imaging Using a CMOS Imaging Sensor with On-Chip Signal Processing.
Sensors
Diwei He, Nguyen C. Hoang, Barrie Hayes-Gill, Yiqun Zhu, John A. Crowe, Cally Gill, Geraldine F. Clough, Stephen P. Morgan
2012 B conf
An efficient hardware architecture of the optimised SIFT descriptor generation.
FPL
Wenjuan Deng, Yiqun Zhu, Hao Feng, Zhiguo Jiang
2009 — conf
An architecture of optimised SIFT feature detection for an FPGA implementation of an image matcher.
FPT
Lifan Yao, Hao Feng, Yiqun Zhu, Zhiguo Jiang, Danpei Zhao, Wenquan Feng
2009 — conf
Ant Algorithm with Execution Quality Based Prediction in Grid Scheduling.
ChinaGrid
Yiqun Zhu, Minglu Li, Chuliang Weng
2007 — conf
An FPGA Based Travelling-Wave Fault Location System.
FPT
David P. Coggins, David W. P. Thomas, Barrie Hayes-Gill, Yiqun Zhu
2007 J jnl
Reconfigurable Hardware Architectures for Sequential and Hybrid Decoding.
IEEE Trans. Circuits Syst. I Regul. Pap.
Mohammed Benaissa, Yiqun Zhu
2006 — conf
An FPGA based generic prototyping platform employed in a CMOS laser Doppler blood flow camera.
FPT
Yiqun Zhu, Barrie Hayes-Gill, Steve Morgan, Nguyen C. Hoang
2003 J jnl
A Novel High-Speed Configurable Viterbi Decoder for Broadband Access.
EURASIP J. Adv. Signal Process.
Mohammed Benaissa, Yiqun Zhu
2003 — conf
A novel ACS scheme for area-efficient Viterbi decoders.
ISCAS (2)
Yiqun Zhu, Mohammed Benaissa
2003 — conf
Reconfigurable Viterbi Decoding Using a New ACS Pipelining Technique.
ASAP
Yiqun Zhu, Mohammed Benaissa