Yiorgos Makris

239 papers A* 6A 60B 6C 24Misc 35Journal 63Unranked 45

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	A TRAP for SAT: On the Imperviousness of a Transistor-Level Programmable Fabric to Satisfiability-Based Attacks. IACR Trans. Cryptogr. Hardw. Embed. Syst. Aric Fowler, Mohammed Shayan, Mustafa M. Shihab, Thomas Broadfoot, Peter Beerel, Carl Sechen, Yiorgos Makris
2025	A	`conf`	An SMT-Based Method for Identifying State-Holding Elements in Extracted Netlists. ITC Aric Fowler, Carl Sechen, Yiorgos Makris
2025	—	`conf`	Efficient and Secure Cloud-based Split Logic Synthesis. ASP-DAC Chaitali Sathe, Yiorgos Makris, Benjamin Carrión Schäfer
2025	Misc	`conf`	Enhancing Metrology to E-test Correlation Model Accuracy through Process Expertise Integration. VTS Ching-Yi Chang, Matthew Nigh, John M. Carulli, Yiorgos Makris
2025	—	`conf`	Experimental Characterization and Empirical Beam Steering Analysis of a 28 GHz 1-Bit 8x8 RIS Reflectarray via Conductivity Pattern Modulation. WPMC Vasiliki Papapostolou, Alkis A. Hatzopoulos, Yiorgos Makris, Zaharias D. Zaharis
2025	Misc	`conf`	FREEDOM: FPGA-Based Hardware Redaction Emulator. FCCM Chaital G. Sathe, Yiorgos Makris, Benjamin Carrion Schafer
2025	J	`jnl`	Modeling Bidirectional Switches for Enabling Logic Equivalence Checking in a Transistor-Level Programmable Fabric. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Apurva Jain, Thomas Broadfoot, Yiorgos Makris, Carl Sechen
2025	J	`jnl`	Physically Secure Logic Locking With Nanomagnet Logic. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Alexander J. Edwards, Naimul Hassan, Jared Arzate, Alexander N. Chin, Dhritiman Bhattacharya, Mustafa M. Shihab, Peng Zhou, Xuan Hu, Jayasimha Atulasimha, Yiorgos Makris, Joseph S. Friedman
2025	A	`conf`	Teaching Llamas to Test: A Language-Based Approach. ITC Christos Vasileiou, Yiorgos Makris
2025	A	`conf`	Unveiling the Mask: Trusted Semiconductor Manufacturing through Wafer-Level Mask-Set Attestation. ICCAD Suraag Sunil Tellakula, Ching-Yi Chang, Matthew Nigh, Christos Vasileiou, John M. Carulli, Yiorgos Makris
2024	J	`jnl`	Bit-by-Bit: Investigating the Vulnerabilities of Binary Neural Networks to Adversarial Bit Flipping. Trans. Mach. Learn. Res. Shamik Kundu, Sanjay Das, Sayar Karmakar, Arnab Raha, Souvik Kundu, Yiorgos Makris, Kanad Basu
2024	A	`conf`	Generation and Quality Evaluation of Synthetic Process Control Monitoring Data. ITC Matthew Nigh, John M. Carulli, Yiorgos Makris
2024	A*	`conf`	NSPG: Natural language Processing-based Security Property Generator for Hardware Security Assurance. DAC Xingyu Meng, Amisha Srivastava, Ayush Arunachalam, Avik Ray, Pedro Henrique Silva, Rafail Psiakis, Yiorgos Makris, Kanad Basu
2024	Misc	`conf`	On the Sensitivity of Analog Artificial Neural Network Models to Process Variation. VTS N. Afroz, A. Sayem, Georgios Volanis, Dzmitry Maliuk, Haralampos-G. Stratigopoulos, Yiorgos Makris
2024	J	`jnl`	Statistical Methods for Detecting Recycled Electronics: From ICs to PCBs and Beyond. IEEE Des. Test Ke Huang, Yu Liu, Nenad Korolija, John M. Carulli, Yiorgos Makris
2024	Misc	`conf`	Testing a Transistor-Level Programmable Fabric: Challenges and Solutions. VTS Apurva Jain, Thomas Broadfoot, Carl Sechen, Yiorgos Makris
2023	J	`jnl`	Efficient CNN-based Super Resolution Algorithms for mmWave Mobile Radar Imaging. CoRR Christos Vasileiou, Josiah W. Smith, Shiva Thiagarajan, Matthew Nigh, Yiorgos Makris, Murat Torlak
2023	A*	`conf`	FuncTeller: How Well Does eFPGA Hide Functionality? USENIX Security Symposium Zhaokun Han, Mohammed Shayan, Aneesh Dixit, Mustafa M. Shihab, Yiorgos Makris, Jeyavijayan Rajendran
2023	J	`jnl`	FuncTeller: How Well Does eFPGA Hide Functionality? CoRR Zhaokun Han, Mohammed Shayan, Aneesh Dixit, Mustafa M. Shihab, Yiorgos Makris, Jeyavijayan Rajendran
2023	J	`jnl`	Improved Static Hand Gesture Classification on Deep Convolutional Neural Networks using Novel Sterile Training Technique. CoRR Josiah W. Smith, Shiva Thiagarajan, Richard Willis, Yiorgos Makris, Murat Torlak
2023	A	`conf`	MANTIS: Machine Learning-Based Approximate ModeliNg of RedacTed Integrated CircuitS. DATE Chaitali Sathe, Yiorgos Makris, Benjamin Carrion Schafer
2023	Misc	`conf`	Machine Learning-Based Adaptive Outlier Detection for Underkill Reduction in Analog/RF IC Testing. VTS V. A. Niranjan, Deepika Neethirajan, Constantinos Xanthopoulos, D. Webster, Amit Nahar, Yiorgos Makris
2023	A	`conf`	Quo Vadis Signal? Automated Directionality Extraction for Post-Programming Verification of a Transistor-Level Programmable Fabric. DATE Apurva Jain, Thomas Broadfoot, Yiorgos Makris, Carl Sechen
2023	J	`jnl`	Unlocking Hardware Security Assurance: The Potential of LLMs. CoRR Xingyu Meng, Amisha Srivastava, Ayush Arunachalam, Avik Ray, Pedro Henrique Silva, Rafail Psiakis, Yiorgos Makris, Kanad Basu
2022	A*	`conf`	A defect tolerance framework for improving yield. DAC Shiva Shankar Thiagarajan, Suriyaprakash Natarajan, Yiorgos Makris
2022	B	`conf`	Efficient CNN-Based Super Resolution Algorithms for Mmwave Mobile Radar Imaging. ICIP Christos Vasileiou, Josiah W. Smith, Shiva Thiagarajan, Matthew Nigh, Yiorgos Makris, Murat Torlak
2022	Misc	`conf`	Machine Learning-Based Overkill Reduction through Inter-Test Correlation. VTS Deepika Neethirajan, V. A. Niranjan, Richard Willis, Amit Nahar, D. Webster, Yiorgos Makris
2022	A	`conf`	Physically and Algorithmically Secure Logic Locking with Hybrid CMOS/Nanomagnet Logic Circuits. DATE Alexander J. Edwards, Naimul Hassan, Dhritiman Bhattacharya, Mustafa M. Shihab, Peng Zhou, Xuan Hu, Jayasimha Atulasimha, Yiorgos Makris, Joseph S. Friedman
2021	J	`jnl`	Bias Busters: Robustifying DL-Based Lithographic Hotspot Detectors Against Backdooring Attacks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Kang Liu, Benjamin Tan, Gaurav Rajavendra Reddy, Siddharth Garg, Yiorgos Makris, Ramesh Karri
2021	C	`conf`	Functional Locking through Omission: From HLS to Obfuscated Design. ICCD Zi Wang, Shayan Omais Mohammed, Yiorgos Makris, Benjamin Carrión Schäfer
2021	J	`jnl`	Hunting Security Bugs in SoC Designs: Lessons Learned. IEEE Des. Test Mohammad-Mahdi Bidmeshki, Yunjie Zhang, Monir Zaman, Liwei Zhou, Yiorgos Makris
2021	J	`jnl`	Improved Static Hand Gesture Classification on Deep Convolutional Neural Networks Using Novel Sterile Training Technique. IEEE Access Josiah W. Smith, Shiva Thiagarajan, Richard Willis, Yiorgos Makris, Murat Torlak
2021	J	`jnl`	On Improving Hotspot Detection Through Synthetic Pattern-Based Database Enhancement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Gaurav Rajavendra Reddy, Constantinos Xanthopoulos, Yiorgos Makris
2021	J	`jnl`	Proof-Carrying Hardware-Based Information Flow Tracking in Analog/Mixed-Signal Designs. IEEE J. Emerg. Sel. Topics Circuits Syst. Mohammad-Mahdi Bidmeshki, Angelos Antonopoulos, Yiorgos Makris
2021	A*	`conf`	Secure Logic Locking with Strain-Protected Nanomagnet Logic. DAC Naimul Hassan, Alexander J. Edwards, Dhritiman Bhattacharya, Mustafa M. Shihab, Varun Venkat, Peng Zhou, Xuan Hu, Shamik Kundu, Abraham Peedikayil Kuruvila, Kanad Basu, Jayasimha Atulasimha, Yiorgos Makris, Joseph S. Friedman
2021	J	`jnl`	TPE: A Hardware-Based TLB Profiling Expert for Workload Reconstruction. IEEE J. Emerg. Sel. Topics Circuits Syst. Liwei Zhou, Yunjie Zhang, Yiorgos Makris
2021	Misc	`conf`	Trim Time Reduction in Analog/RF ICs Based on Inter-Trim Correlation. VTS V. A. Niranjan, Deepika Neethirajan, Constantinos Xanthopoulos, E. De la Rosa, C. Alleyne, S. Mier, Yiorgos Makris
2020	J	`jnl`	A Hardware-Based Architecture-Neutral Framework for Real-Time IoT Workload Forensics. IEEE Trans. Computers Liwei Zhou, Yang Hu, Yiorgos Makris
2020	Misc	`conf`	ATTEST: Application-Agnostic Testing of a Novel Transistor-Level Programmable Fabric. VTS Mustafa Munawar Shihab, Bharath Ramanidharan, Suraag Sunil Tellakula, Gaurav Rajavendra Reddy, Jingxiang Tian, Carl Sechen, Yiorgos Makris
2020	J	`jnl`	Amplitude-Modulating Analog/RF Hardware Trojans in Wireless Networks: Risks and Remedies. IEEE Trans. Inf. Forensics Secur. Kiruba Sankaran Subramani, Noha M. Helal, Angelos Antonopoulos, Aria Nosratinia, Yiorgos Makris
2020	A	`conf`	An Efficient MILP-Based Aging-Aware Floorplanner for Multi-Context Coarse-Grained Runtime Reconfigurable FPGAs. DATE Bo Hu, Mustafa M. Shihab, Yiorgos Makris, Benjamin Carrión Schäfer, Carl Sechen
2020	J	`jnl`	Bias Busters: Robustifying DL-based Lithographic Hotspot Detectors Against Backdooring Attacks. CoRR Kang Liu, Benjamin Tan, Gaurav Rajavendra Reddy, Siddharth Garg, Yiorgos Makris, Ramesh Karri
2020	C	`conf`	CASPER: CAD Framework for a Novel Transistor-Level Programmable Fabric. ISCAS Mustafa M. Shihab, Bharath Ramanidharan, Gaurav Rajavendra Reddy, Jingxiang Tian, William Swartz, Carl Sechen, Yiorgos Makris
2020	A*	`conf`	DECOY: DEflection-Driven HLS-Based Computation Partitioning for Obfuscating Intellectual PropertY. DAC Jianqi Chen, Monir Zaman, Yiorgos Makris, R. D. Shawn Blanton, Subhasish Mitra, Benjamin Carrión Schäfer
2020	—	`conf`	Hardware-Based Detection of Spectre Attacks: A Machine Learning Approach. AsianHOST Yunjie Zhang, Yiorgos Makris
2020	J	`jnl`	Hardware-Based Real-Time Workload Forensics. IEEE Des. Test Yunjie Zhang, Liwei Zhou, Yiorgos Makris
2020	J	`jnl`	On Improving Hotspot Detection Through Synthetic Pattern-Based Database Enhancement. CoRR Gaurav Rajavendra Reddy, Constantinos Xanthopoulos, Yiorgos Makris
2020	A	`conf`	Range-Controlled Floating-Gate Transistors: A Unified Solution for Unlocking and Calibrating Analog ICs. DATE Sai Govinda Rao Nimmalapudi, Georgios Volanis, Yichuan Lu, Angelos Antonopoulos, Andrew Marshall, Yiorgos Makris
2019	Misc	`conf`	Analog Performance Locking through Neural Network-Based Biasing. VTS Georgios Volanis, Yichuan Lu, Sai Govinda Rao Nimmalapudi, Angelos Antonopoulos, Andrew Marshall, Yiorgos Makris
2019	C	`conf`	Automated Die Inking through On-line Machine Learning. IOLTS Constantinos Xanthopoulos, Arnold Neckermann, Paulus List, Klaus-Peter Tschernay, Peter Sarson, Yiorgos Makris
2019	J	`jnl`	CAPE: A cross-layer framework for accurate microprocessor power estimation. Integr. Monir Zaman, Mustafa M. Shihab, Ayse K. Coskun, Yiorgos Makris
2019	J	`jnl`	Demonstrating and Mitigating the Risk of an FEC-Based Hardware Trojan in Wireless Networks. IEEE Trans. Inf. Forensics Secur. Kiruba Sankaran Subramani, Angelos Antonopoulos, Ahmed Attia Abotabl, Aria Nosratinia, Yiorgos Makris
2019	A	`conf`	Design Obfuscation through Selective Post-Fabrication Transistor-Level Programming. DATE Mustafa M. Shihab, Jingxiang Tian, Gaurav Rajavendra Reddy, Bo Hu, William Swartz, Benjamin Carrión Schäfer, Carl Sechen, Yiorgos Makris
2019	—	`conf`	Design Space Exploration for Hotspot Detection. MTV Gaurav Rajavendra Reddy, Yiorgos Makris
2019	—	`conf`	Extending the Lifetime of Coarse-Grained Runtime Reconfigurable FPGAs by Balancing Processing Element Usage. FPT Bo Hu, Mustafa M. Shihab, Yiorgos Makris, Benjamin Carrión Schäfer, Carl Sechen
2019	—	`conf`	Functional Obfuscation of Hardware Accelerators through Selective Partial Design Extraction onto an Embedded FPGA. ACM Great Lakes Symposium on VLSI Bo Hu, Jingxiang Tian, Mustafa M. Shihab, Gaurav Rajavendra Reddy, William Swartz, Yiorgos Makris, Benjamin Carrión Schäfer, Carl Sechen
2019	Misc	`conf`	Hardware-based Real-time Workload Forensics via Frame-level TLB Profiling. VTS Yunjie Zhang, Liwei Zhou, Yiorgos Makris
2019	A	`conf`	Machine Learning-Based Hotspot Detection: Fallacies, Pitfalls and Marching Orders. ICCAD Gaurav Rajavendra Reddy, Kareem Madkour, Yiorgos Makris
2019	Misc	`conf`	Machine Learning-based Noise Classification and Decomposition in RF Transceivers. VTS Deepika Neethirajan, Constantinos Xanthopoulos, Kiruba S. Subramani, Keith Schaub, Ira Leventhal, Yiorgos Makris
2019	—	`conf`	Post-Production Calibration of Analog/RF ICs: Recent Developments and A Fully Integrated Solution. SMACD Angelos Antonopoulos, Georgios Volanis, Yichuan Lu, Yiorgos Makris
2019	C	`conf`	Revisiting Capacitor-Based Trojan Design. ICCD Mohammad-Mahdi Bidmeshki, Kiruba Sankaran Subramani, Yiorgos Makris
2019	A	`conf`	Subtle Anomaly Detection of Microscopic Probes using Deep learning based Image Completion. ITC Kosuke Ikeda, Keith Schaub, Ira Leventhal, Yiorgos Makris, Constantinos Xanthopoulos, Deepika Neethirajan
2019	C	`conf`	Trusted and Secure Design of Analog/RF ICs: Recent Developments. IOLTS Kiruba S. Subramani, Georgios Volanis, Mohammad-Mahdi Bidmeshki, Angelos Antonopoulos, Yiorgos Makris
2019	A	`conf`	VIPER: A Versatile and Intuitive Pattern GenERator for Early Design Space Exploration. ITC Gaurav Rajavendra Reddy, Mohammad-Mahdi Bidmeshki, Yiorgos Makris
2019	A	`conf`	Wafer-Level Adaptive Vmin Calibration Seed Forecasting. DATE Constantinos Xanthopoulos, Deepika Neethirajan, Sirish Boddikurapati, Amit Nahar, Yiorgos Makris
2018	Misc	`conf`	Enhanced hotspot detection through synthetic pattern generation and design of experiments. VTS Gaurav Rajavendra Reddy, Constantinos Xanthopoulos, Yiorgos Makris
2018	A	`conf`	Hardware Dithering: A Run-Time Method for Trojan Neutralization in Wireless Cryptographic ICs. ITC Christiana Kapatsori, Yu Liu, Angelos Antonopoulos, Yiorgos Makris
2018	A	`conf`	Hardware-assisted rootkit detection via on-line statistical fingerprinting of process execution. DATE Liwei Zhou, Yiorgos Makris
2018	A	`conf`	On the use of Bayesian Networks for Resource-Efficient Self-Calibration of Analog/RF ICs. ITC Martin Andraud, Laura Isabel Galindez Olascoaga, Yichuan Lu, Yiorgos Makris, Marian Verhelst
2018	Misc	`conf`	Special session on machine learning: How will machine learning transform test? VTS Yiorgos Makris, Amit Nahar, Haralampos-G. D. Stratigopoulos, Marc Hutner
2018	—	`conf`	Towards a Cross-Layer Framework for Accurate Power Modeling of Microprocessor Designs. PATMOS Monir Zaman, Mustafa M. Shihab, Ayse K. Coskun, Yiorgos Makris
2018	A	`conf`	Towards provably-secure performance locking. DATE Monir Zaman, Abhrajit Sengupta, Danqing Liu, Ozgur Sinanoglu, Yiorgos Makris, Jeyavijayan (JV) Rajendran
2017	A	`conf`	A field programmable transistor array featuring single-cycle partial/full dynamic reconfiguration. DATE Jingxiang Tian, Gaurav Rajavendra Reddy, Jiajia Wang, William Swartz, Yiorgos Makris, Carl Sechen
2017	A	`conf`	ACE: Adaptive channel estimation for detecting analog/RF trojans in WLAN transceivers. ICCAD Kiruba Sankaran Subramani, Angelos Antonopoulos, Ahmed Attia Abotabl, Aria Nosratinia, Yiorgos Makris
2017	A	`conf`	Automated die inking: A pattern recognition-based approach. ITC Constantinos Xanthopoulos, Peter Sarson, Heinz Reiter, Yiorgos Makris
2017	J	`jnl`	Data Secrecy Protection Through Information Flow Tracking in Proof-Carrying Hardware IP - Part I: Framework Fundamentals. IEEE Trans. Inf. Forensics Secur. Yier Jin, Xiaolong Guo, Raj Gautam Dutta, Mohammad-Mahdi Bidmeshki, Yiorgos Makris
2017	J	`jnl`	Data Secrecy Protection Through Information Flow Tracking in Proof-Carrying Hardware IP - Part II: Framework Automation. IEEE Trans. Inf. Forensics Secur. Mohammad-Mahdi Bidmeshki, Xiaolong Guo, Raj Gautam Dutta, Yier Jin, Yiorgos Makris
2017	Misc	`conf`	Foreword. VTS Yiorgos Makris, Srivaths Ravi, Amit Majumdar
2017	A	`conf`	Hardware-based on-line intrusion detection via system call routine fingerprinting. DATE Liwei Zhou, Yiorgos Makris
2017	—	`conf`	INFECT: INconspicuous FEC-based Trojan: A hardware attack on an 802.11a/g wireless network. HOST Kiruba Sankaran Subramani, Angelos Antonopoulos, Ahmed Attia Abotabl, Aria Nosratinia, Yiorgos Makris
2017	A	`conf`	Information flow tracking in analog/mixed-signal designs through proof-carrying hardware IP. DATE Mohammad-Mahdi Bidmeshki, Angelos Antonopoulos, Yiorgos Makris
2017	Misc	`conf`	Knob non-idealities in learning-based post-production tuning of analog/RF ICs: Impact & remedies. VTS Yichuan Lu, Georgios Volanis, Kiruba S. Subramani, Angelos Antonopoulos, Yiorgos Makris
2017	B	`conf`	Security and trust in the analog/mixed-signal/RF domain: A survey and a perspective. ETS Angelos Antonopoulos, Christiana Kapatsori, Yiorgos Makris
2017	J	`jnl`	Silicon Demonstration of Hardware Trojan Design and Detection in Wireless Cryptographic ICs. IEEE Trans. Very Large Scale Integr. Syst. Yu Liu, Yier Jin, Aria Nosratinia, Yiorgos Makris
2017	J	`jnl`	Trusted Analog/Mixed- Signal/RF ICs: A Survey and a Perspective. IEEE Des. Test Angelos Antonopoulos, Christiana Kapatsori, Yiorgos Makris
2017	C	`conf`	Wafer-level adaptive trim seed forecasting based on E-tests. ISCAS Constantinos Xanthopoulos, Ali Ahmadi, Sirish Boddikurapati, Amit Nahar, Bob Orr, Yiorgos Makris
2017	—	`conf`	What to Lock?: Functional and Parametric Locking. ACM Great Lakes Symposium on VLSI Muhammad Yasin, Abhrajit Sengupta, Benjamin Carrión Schäfer, Yiorgos Makris, Ozgur Sinanoglu, Jeyavijayan Rajendran
2017	J	`jnl`	Yield Forecasting Across Semiconductor Fabrication Plants and Design Generations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ali Ahmadi, Haralampos-G. D. Stratigopoulos, Ke Huang, Amit Nahar, Bob Orr, Michael Pas, John M. Carulli, Yiorgos Makris
2016	—	`conf`	-197dBc/Hz FOM 4.3-GHz VCO Using an addressable array of minimum-sized nmos cross-coupled transistor pairs in 65-nm CMOS. VLSI Circuits Amit Jha, Ali Ahmadi, Sandeep Kshattry, T. Cao, K. Liao, Geoffrey Yeap, Yiorgos Makris, Kenneth K. O
2016	A	`conf`	A machine learning approach to fab-of-origin attestation. ICCAD Ali Ahmadi, Mohammad-Mahdi Bidmeshki, Amit Nahar, Bob Orr, Michael Pas, Yiorgos Makris
2016	—	`conf`	Hardware-Based Workload Forensics and Malware Detection in Microprocessors. MTV Liwei Zhou, Yiorgos Makris
2016	C	`conf`	Hardware-based attacks to compromise the cryptographic security of an election system. ICCD Mohammad-Mahdi Bidmeshki, Gaurav Rajavendra Reddy, Liwei Zhou, Jeyavijayan Rajendran, Yiorgos Makris
2016	—	`conf`	Hardware-based workload forensics: Process reconstruction via TLB monitoring. HOST Liwei Zhou, Yiorgos Makris
2016	C	`conf`	Harnessing fabrication process signature for predicting yield across designs. ISCAS Ali Ahmadi, Haralampos-G. D. Stratigopoulos, Amit Nahar, Bob Orr, Michael Pas, Yiorgos Makris
2016	A	`conf`	Harnessing process variations for optimizing wafer-level probe-test flow. ITC Ali Ahmadi, Constantinos Xanthopoulos, Amit Nahar, Bob Orr, Michael Pas, Yiorgos Makris
2016	Misc	`conf`	On-die learning-based self-calibration of analog/RF ICs. VTS Georgios Volanis, Dzmitry Maliuk, Yichuan Lu, Kiruba S. Subramani, Angelos Antonopoulos, Yiorgos Makris
2016	J	`jnl`	Toward Silicon-Based Cognitive Neuromorphic ICs - A Survey. IEEE Des. Test Georgios Volanis, Angelos Antonopoulos, Alkis A. Hatzopoulos, Yiorgos Makris
2016	Misc	`conf`	Wafer-level process variation-driven probe-test flow selection for test cost reduction in analog/RF ICs. VTS Ali Ahmadi, Amit Nahar, Bob Orr, Michael Pas, Yiorgos Makris
2015	A	`conf`	A comparative study of one-shot statistical calibration methods for analog / RF ICs. ITC Yichuan Lu, Kiruba S. Subramani, He Huang, Nathan Kupp, Ke Huang, Yiorgos Makris
2015	J	`jnl`	An Experimentation Platform for On-Chip Integration of Analog Neural Networks: A Pathway to Trusted and Robust Analog/RF ICs. IEEE Trans. Neural Networks Learn. Syst. Dzmitry Maliuk, Yiorgos Makris
2015	A	`conf`	Concurrent hardware Trojan detection in wireless cryptographic ICs. ITC Yu Liu, Georgios Volanis, Ke Huang, Yiorgos Makris
2015	J	`jnl`	Guest Editorial Special Section on Hardware Security and Trust. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ramesh Karri, Farinaz Koushanfar, Ozgur Sinanoglu, Yiorgos Makris, Ken Mai, Ahmad-Reza Sadeghi, Swarup Bhunia
2015	J	`jnl`	Low-Cost Analog/RF IC Testing Through Combined Intra- and Inter-Die Correlation Models. IEEE Des. Test Ke Huang, Nathan Kupp, Constantinos Xanthopoulos, John M. Carulli Jr., Yiorgos Makris
2015	J	`jnl`	Multiple-Bit Upset Protection in Microprocessor Memory Arrays Using Vulnerability-Based Parity Optimization and Interleaving. IEEE Trans. Very Large Scale Integr. Syst. Michail Maniatakos, Maria K. Michael, Yiorgos Makris
2015	J	`jnl`	Recycled IC Detection Based on Statistical Methods. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ke Huang, Yu Liu, Nenad Korolija, John M. Carulli, Yiorgos Makris
2015	J	`jnl`	Revisiting Vulnerability Analysis in Modern Microprocessors. IEEE Trans. Computers Michail Maniatakos, Maria K. Michael, Chandra Tirumurti, Yiorgos Makris
2015	—	`conf`	Silicon Demonstration of Statistical Post-Production Tuning. ISVLSI Yichuan Lu, Kiruba S. Subramani, He Huang, Nathan Kupp, Yiorgos Makris
2015	—	`conf`	Toward automatic proof generation for information flow policies in third-party hardware IP. HOST Mohammad-Mahdi Bidmeshki, Yiorgos Makris
2015	C	`conf`	VeriCoq: A Verilog-to-Coq converter for proof-carrying hardware automation. ISCAS Mohammad-Mahdi Bidmeshki, Yiorgos Makris
2015	C	`conf`	Workload characterization and prediction: A pathway to reliable multi-core systems. IOLTS Monir Zaman, Ali Ahmadi, Yiorgos Makris
2015	A	`conf`	Yield Forecasting in Fab-to-Fab Production Migration Based on Bayesian Model Fusion. ICCAD Ali Ahmadi, Haralampos-G. D. Stratigopoulos, Amit Nahar, Bob Orr, Michael Pas, Yiorgos Makris
2015	Misc	`conf`	Yield prognosis for fab-to-fab product migration. VTS Ali Ahmadi, Ke Huang, Amit Nahar, Bob Orr, Michael Pas, John M. Carulli, Yiorgos Makris
2014	A	`conf`	An analog non-volatile neural network platform for prototyping RF BIST solutions. DATE Dzmitry Maliuk, Yiorgos Makris
2014	J	`jnl`	Counterfeit Integrated Circuits: A Rising Threat in the Global Semiconductor Supply Chain. Proc. IEEE Ujjwal Guin, Ke Huang, Daniel DiMase, John M. Carulli, Mohammad Tehranipoor, Yiorgos Makris
2014	A*	`conf`	Hardware Trojan Detection through Golden Chip-Free Statistical Side-Channel Fingerprinting. DAC Yu Liu, Ke Huang, Yiorgos Makris
2014	A	`conf`	IC laser trimming speed-up through wafer-level spatial correlation modeling. ITC Constantinos Xanthopoulos, Ke Huang, Abbas Poonawala, Amit Nahar, Bob Orr, John M. Carulli Jr., Yiorgos Makris
2014	—	`conf`	On-chip intelligence: A pathway to self-testable, tunable, and trusted analog/RF ICs. MWSCAS Dzmitry Maliuk, Yiorgos Makris
2014	A	`conf`	Spatio-temporal wafer-level correlation modeling with progressive sampling: A pathway to HVM yield estimation. ITC Ali Ahmadi, Ke Huang, Suriyaprakash Natarajan, John M. Carulli Jr., Yiorgos Makris
2013	C	`conf`	A post-deployment IC trust evaluation architecture. IOLTS Yier Jin, Dzmitry Maliuk, Yiorgos Makris
2013	A	`conf`	A proof-carrying based framework for trusted microprocessor IP. ICCAD Yier Jin, Yiorgos Makris
2013	A	`conf`	AVF-driven parity optimization for MBU protection of in-core memory arrays. DATE Michail Maniatakos, Maria K. Michael, Yiorgos Makris
2013	A	`conf`	Counterfeit electronics: A rising threat in the semiconductor manufacturing industry. ITC Ke Huang, John M. Carulli, Yiorgos Makris
2013	—	`conf`	Cycle-accurate information assurance by proof-carrying based signal sensitivity tracing. HOST Yier Jin, Bo Yang, Yiorgos Makris
2013	A	`conf`	Handling discontinuous effects in modeling spatial correlation of wafer-level analog/RF tests. DATE Ke Huang, Nathan Kupp, John M. Carulli Jr., Yiorgos Makris
2013	A	`conf`	Hardware Trojans in wireless cryptographic ICs: silicon demonstration & detection method evaluation. ICCAD Yu Liu, Yier Jin, Yiorgos Makris
2013	Misc	`conf`	Innovative practices session 7C: Self-calibration & trimming. VTS Chen-Yong Cher, Yiorgos Makris, C. Thibeault, Alan J. Drake
2013	C	`conf`	Investigating the limits of AVF analysis in the presence of multiple bit errors. IOLTS Michail Maniatakos, Maria K. Michael, Yiorgos Makris
2013	J	`jnl`	Low-Cost Concurrent Error Detection for Floating-Point Unit (FPU) Controllers. IEEE Trans. Computers Michail Maniatakos, Prabhakar Kudva, Bruce M. Fleischer, Yiorgos Makris
2013	B	`conf`	On combining alternate test with spatial correlation modeling in analog/RF ICs. ETS Ke Huang, Nathan Kupp, John M. Carulli Jr., Yiorgos Makris
2013	J	`jnl`	On the Impact of Performance Faults in Modern Microprocessors. J. Electron. Test. Naghmeh Karimi, Michail Maniatakos, Chandrasekharan Tirumurti, Yiorgos Makris
2013	A	`conf`	Process monitoring through wafer-level spatial variation decomposition. ITC Ke Huang, Nathan Kupp, John M. Carulli Jr., Yiorgos Makris
2013	B	`conf`	Reconciling the IC test and security dichotomy. ETS Ozgur Sinanoglu, Naghmeh Karimi, Jeyavijayan Rajendran, Ramesh Karri, Yier Jin, Ke Huang, Yiorgos Makris
2012	C	`conf`	A dual-mode weight storage analog neural network platform for on-chip applications. ISCAS Dzmitry Maliuk, Yiorgos Makris
2012	J	`jnl`	Applying the Model-View-Controller Paradigm to Adaptive Test. IEEE Des. Test Comput. Nathan Kupp, Yiorgos Makris
2012	C	`conf`	Exposing vulnerabilities of untrusted computing platforms. ICCD Yier Jin, Michail Maniatakos, Yiorgos Makris
2012	J	`jnl`	Global Signal Vulnerability (GSV) Analysis for Selective State Element Hardening in Modern Microprocessors. IEEE Trans. Computers Michail Maniatakos, Chandrasekharan Tirumurti, Rajesh Galivanche, Yiorgos Makris
2012	A	`conf`	Integrated optimization of semiconductor manufacturing: A machine learning approach. ITC Nathan Kupp, Yiorgos Makris
2012	—	`conf`	Parametric counterfeit IC detection via Support Vector Machines. DFT Ke Huang, John M. Carulli Jr., Yiorgos Makris
2012	A	`conf`	Post-deployment trust evaluation in wireless cryptographic ICs. DATE Yier Jin, Dzmitry Maliuk, Yiorgos Makris
2012	Misc	`conf`	Proof carrying-based information flow tracking for data secrecy protection and hardware trust. VTS Yier Jin, Yiorgos Makris
2012	J	`jnl`	Proof-Carrying Hardware Intellectual Property: A Pathway to Trusted Module Acquisition. IEEE Trans. Inf. Forensics Secur. Eric Love, Yier Jin, Yiorgos Makris
2012	A	`conf`	Spatial correlation modeling for probe test cost reduction in RF devices. ICCAD Nathan Kupp, Ke Huang, John M. Carulli Jr., Yiorgos Makris
2012	A	`conf`	Spatial estimation of wafer measurement parameters using Gaussian process models. ITC Nathan Kupp, Ke Huang, John M. Carulli Jr., Yiorgos Makris
2012	Misc	`conf`	Towards a fully stand-alone analog/RF BIST: A cost-effective implementation of a neural classifier. VTS Dzmitry Maliuk, Nathan Kupp, Yiorgos Makris
2012	A	`conf`	Vulnerability-based Interleaving for Multi-Bit Upset (MBU) protection in modern microprocessors. ITC Michail Maniatakos, Maria K. Michael, Yiorgos Makris
2011	B	`conf`	AVF Analysis Acceleration via Hierarchical Fault Pruning. ETS Michail Maniatakos, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris
2011	A	`conf`	Correlating inline data with final test outcomes in analog/RF devices. DATE Nathan Kupp, Mustapha Slamani, Yiorgos Makris
2011	—	`conf`	Enhancing security via provably trustworthy hardware intellectual property. HOST Eric Love, Yier Jin, Yiorgos Makris
2011	Misc	`conf`	Exponent monitoring for low-cost concurrent error detection in FPU control logic. VTS Michail Maniatakos, Yiorgos Makris, Prabhakar Kudva, Bruce M. Fleischer
2011	J	`jnl`	Guest Editors' Introduction: Special Section on Chips and Architectures for Emerging Technologies and Applications. IEEE Trans. Computers Alfredo Benso, Yiorgos Makris, Pinaki Mazumder
2011	J	`jnl`	Improving Analog and RF Device Yield through Performance Calibration. IEEE Des. Test Comput. Nathan Kupp, He Huang, Yiorgos Makris, Petros Drineas
2011	J	`jnl`	Instruction-Level Impact Analysis of Low-Level Faults in a Modern Microprocessor Controller. IEEE Trans. Computers Michail Maniatakos, Naghmeh Karimi, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris
2011	C	`conf`	Is single-scheme Trojan prevention sufficient? ICCD Yier Jin, Yiorgos Makris
2011	A	`conf`	On proving the efficiency of alternative RF tests. ICCAD Nathan Kupp, Haralampos-G. D. Stratigopoulos, Petros Drineas, Yiorgos Makris
2011	—	`conf`	PSCML: Pseudo-Static Current Mode Logic. ICECS Yier Jin, Yiorgos Makris
2011	J	`jnl`	Workload-Cognizant Concurrent Error Detection in the Scheduler of a Modern Microprocessor. IEEE Trans. Computers Naghmeh Karimi, Michail Maniatakos, Abhijit Jas, Chandra Tirumurti, Yiorgos Makris
2010	C	`conf`	An analog VLSI multilayer perceptron and its application towards built-in self-test in analog circuits. IOLTS Dzmitry Maliuk, Haralampos-G. D. Stratigopoulos, Yiorgos Makris
2010	A	`conf`	Analog neural network design for RF built-in self-test. ITC Dzmitry Maliuk, Haralampos-G. D. Stratigopoulos, He Huang, Yiorgos Makris
2010	—	`conf`	DFTT: Design for Trojan Test. ICECS Yier Jin, Nathan Kupp, Yiorgos Makris
2010	J	`jnl`	Hardware Trojans in Wireless Cryptographic ICs. IEEE Des. Test Comput. Yier Jin, Yiorgos Makris
2010	A	`conf`	Post-production performance calibration in analog/RF devices. ITC Nathan Kupp, He Huang, Petros Drineas, Yiorgos Makris
2010	J	`jnl`	RF Specification Test Compaction Using Learning Machines. IEEE Trans. Very Large Scale Integr. Syst. Haralampos-G. D. Stratigopoulos, Petros Drineas, Mustapha Slamani, Yiorgos Makris
2010	Misc	`conf`	Workload-driven selective hardening of control state elements in modern microprocessors. VTS Michail Maniatakos, Yiorgos Makris
2009	J	`jnl`	Enhancing Simulation Accuracy through Advanced Hazard Detection in Asynchronous Circuits. IEEE Trans. Computers Feng Shi, Yiorgos Makris
2009	A	`conf`	Enrichment of limited training sets in machine-learning-based analog/RF test. DATE Haralampos-G. D. Stratigopoulos, Salvador Mir, Yiorgos Makris
2009	—	`conf`	Experiences in Hardware Trojan Design and Implementation. HOST Yier Jin, Nathan Kupp, Yiorgos Makris
2009	C	`conf`	Impact analysis of performance faults in modern microprocessors. ICCD Naghmeh Karimi, Michail Maniatakos, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris
2009	Misc	`conf`	Instruction-Level Impact Comparison of RT- vs. Gate-Level Faults in a Modern Microprocessor Controller. VTS Michail Maniatakos, Naghmeh Karimi, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris
2009	J	`jnl`	On Boosting the Accuracy of Non-RF to RF Correlation-Based Specification Test Compaction. J. Electron. Test. Nathan Kupp, Petros Drineas, Mustapha Slamani, Yiorgos Makris
2009	J	`jnl`	Soft-Error Tolerance and Mitigation in Asynchronous Burst-Mode Circuits. IEEE Trans. Very Large Scale Integr. Syst. Sobeeh Almukhaizim, Feng Shi, Eric Love, Yiorgos Makris
2009	Misc	`conf`	Special Session 7C: TTTC 2009 Best Doctoral Thesis Contest. VTS Yiorgos Makris, Haralampos-G. D. Stratigopoulos
2009	—	`conf`	Workload-Cognizant Impact Analysis and its Applications in Error Detection and Tolerance in Modern Microprocessors. DFT Yiorgos Makris
2008	Misc	`conf`	A Statistical Approach to Characterizing and Testing Functionalized Nanowires. VTS James Dardig, Haralampos-G. D. Stratigopoulos, Eric Stern, Mark A. Reed, Yiorgos Makris
2008	B	`conf`	Confidence Estimation in Non-RF to RF Correlation-Based Specification Test Compaction. ETS Nathan Kupp, Petros Drineas, Mustapha Slamani, Yiorgos Makris
2008	—	`conf`	Coping with Soft Errors in Asynchronous Burst-Mode Machines. ASYNC Sobeeh Almukhaizim, Feng Shi, Yiorgos Makris
2008	—	`conf`	Design and Evaluation of a Timestamp-Based Concurrent Error Detection Method (CED) in a Modern Microprocessor Controller. DFT Michail Maniatakos, Naghmeh Karimi, Yiorgos Makris, Abhijit Jas, Chandra Tirumurti
2008	J	`jnl`	Error Moderation in Low-Cost Machine-Learning-Based Analog/RF Testing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Haralampos-G. D. Stratigopoulos, Yiorgos Makris
2008	—	`conf`	Hardware Trojan Detection Using Path Delay Fingerprint. HOST Yier Jin, Yiorgos Makris
2008	A	`conf`	On the Correlation between Controller Faults and Instruction-Level Errors in Modern Microprocessors. ITC Naghmeh Karimi, Michail Maniatakos, Abhijit Jas, Yiorgos Makris
2008	C	`conf`	On the Minimization of Potential Transient Errors and SER in Logic Circuits Using SPFD. IOLTS Sobeeh Almukhaizim, Yiorgos Makris, Yu-Shen Yang, Andreas G. Veneris
2008	J	`jnl`	Soft Error Mitigation Through Selective Addition of Functionally Redundant Wires. IEEE Trans. Reliab. Sobeeh Almukhaizim, Yiorgos Makris
2007	J	`jnl`	Concurrent Error Detection Methods for Asynchronous Burst-Mode Machines. IEEE Trans. Computers Sobeeh Almukhaizim, Yiorgos Makris
2007	Misc	`conf`	Non-RF to RF Test Correlation Using Learning Machines: A Case Study. VTS Haralampos-G. D. Stratigopoulos, Petros Drineas, Mustapha Slamani, Yiorgos Makris
2007	J	`jnl`	On the identification of modular test requirements for low cost hierarchical test path construction. Integr. Yiorgos Makris, Alex Orailoglu
2006	—	`conf`	A Transistor-Level Test Strategy for C^2MOS MOUSETRAP Asynchronous Pipelines. ASYNC Feng Shi, Yiorgos Makris
2006	J	`jnl`	An adaptive checker for the fully differential analog code. IEEE J. Solid State Circuits Haralampos-G. D. Stratigopoulos, Yiorgos Makris
2006	A	`conf`	Berger code-based concurrent error detection in asynchronous burst-mode machines. DATE Sobeeh Almukhaizim, Yiorgos Makris
2006	Misc	`conf`	Bridging the Accuracy of Functional and Machine-Learning-Based Mixed-Signal Testing. VTS Haralampos-G. D. Stratigopoulos, Yiorgos Makris
2006	J	`jnl`	Concurrent detection of erroneous responses in linear analog circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Haralampos-G. D. Stratigopoulos, Yiorgos Makris
2006	J	`jnl`	Entropy-driven parity-tree selection for low-overhead concurrent error detection in finite state machines. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris
2006	—	`conf`	Low-Overhead Testing of Delay Faults in High-Speed Asynchronous Pipelines. ASYNC Gennette Gill, Ankur Agiwal, Montek Singh, Feng Shi, Yiorgos Makris
2006	A	`conf`	Seamless Integration of SER in Rewiring-Based Design Space Exploration. ITC Sobeeh Almukhaizim, Yiorgos Makris, Yu-Shen Yang, Andreas G. Veneris
2006	Misc	`conf`	Session Abstract. VTS Andreas G. Veneris, Yiorgos Makris
2006	A	`conf`	Testing delay faults in asynchronous handshake circuits. ICCAD Feng Shi, Yiorgos Makris
2005	J	`jnl`	Compaction-based concurrent error detection for digital circuits. Microelectron. J. Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris
2005	A	`conf`	Concurrent Error Detection in Asynchronous Burst-Mode Controllers. DATE Sobeeh Almukhaizim, Yiorgos Makris
2005	Misc	`conf`	Constructive Derivation of Analog Specification Test Criteria. VTS Haralampos-G. D. Stratigopoulos, Yiorgos Makris
2005	—	`conf`	Generating decision regions in analog measurement spaces. ACM Great Lakes Symposium on VLSI Haralampos-G. D. Stratigopoulos, Yiorgos Makris
2005	J	`jnl`	Nonlinear decision boundaries for testing analog circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Haralampos-G. D. Stratigopoulos, Yiorgos Makris
2005	—	`conf`	SPIN-PAC: test compaction for speed-independent circuits. ASP-DAC Feng Shi, Yiorgos Makris
2005	A	`conf`	Test generation for ultra-high-speed asynchronous pipelines. ITC Feng Shi, Yiorgos Makris, Steven M. Nowick, Montek Singh
2004	J	`jnl`	An Analog Checker with Input-Relative Tolerance for Duplicate Signals. J. Electron. Test. Haralampos-G. D. Stratigopoulos, Yiorgos Makris
2004	C	`conf`	Compiler-Based Frame Formation for Static Optimization. ICCD Feng Shi, Sobeeh Almukhaizim, Pey-Chang Lin, Yiorgos Makris
2004	—	`conf`	Concurrent Error Detection for Combinational and Sequential Logic via Output Compaction. ISQED Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris
2004	Misc	`conf`	Cost-Driven Selection of Parity Trees. VTS Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris
2004	J	`jnl`	Enhancing reliability of RTL controller-datapath circuits via Invariant-based concurrent test. IEEE Trans. Reliab. Yiorgos Makris, Ismet Bayraktaroglu, Alex Orailoglu
2004	—	`conf`	Fault simulation and random test generation for speed-independent circuits. ACM Great Lakes Symposium on VLSI Feng Shi, Yiorgos Makris
2004	A	`conf`	On Concurrent Error Detection with Bounded Latency in FSMs. DATE Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris
2004	A	`conf`	SPIN-SIM: Logic and Fault Simulation for Speed-Independent Circuits. ITC Feng Shi, Yiorgos Makris
2004	A	`conf`	SPIN-TEST: automatic test pattern generation for speed-independent circuits. ICCAD Feng Shi, Yiorgos Makris
2003	C	`conf`	An Analog Checker With Input-Relative Tolerance for Duplicate Signals. IOLTS Haralampos-G. D. Stratigopoulos, Yiorgos Makris
2003	Misc	`conf`	An Analog Checker with Dynamically Adjustable Error Threshold for Fully Differential Circuits. VTS Haralampos-G. D. Stratigopoulos, Yiorgos Makris
2003	A	`conf`	Concurrent Error Detection in Linear Analog Circuits Using State Estimation. ITC Haralampos-G. D. Stratigopoulos, Yiorgos Makris
2003	—	`conf`	Concurrent Fault Detection in Random Combinational Logic. ISQED Petros Drineas, Yiorgos Makris
2003	C	`conf`	Cost-Effective Graceful Degradation in Speculative Processor Subsystems: The Branch Prediction Case. ICCD Sobeeh Almukhaizim, Thomas Verdel, Yiorgos Makris
2003	—	`conf`	Fault Tolerant Design of Combinational and Sequential Logic Based on a Parity Check Code. DFT Sobeeh Almukhaizim, Yiorgos Makris
2003	C	`conf`	Independent Test Sequence Compaction through Integer Programming. ICCD Petros Drineas, Yiorgos Makris
2003	—	`conf`	Low Cost Convolutional Code Based Concurrent Error Detection in FSMs. DFT Konstantinos Rokas, Yiorgos Makris, Dimitris Gizopoulos
2003	A	`conf`	Non-Intrusive Concurrent Error Detection in FSMs through State/Output Compaction and Monitoring via Parity Trees. DATE Petros Drineas, Yiorgos Makris
2003	C	`conf`	On Compaction-Based Concurrent Error Detection. IOLTS Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris
2003	Misc	`conf`	SPaRe: Selective Partial Replication for Concurrent Fault Detection in FSMs. VLSI Design Petros Drineas, Yiorgos Makris
2003	J	`jnl`	SPaRe: selective partial replication for concurrent fault-detection in FSMs. IEEE Trans. Instrum. Meas. Petros Drineas, Yiorgos Makris
2002	—	`conf`	Duplication-Based Concurrent Error Detection in Asynchronous Circuits: Shortcomings and Remedies. DFT Thomas Verdel, Yiorgos Makris
2002	J	`jnl`	Fast Hierarchical Test Path Construction for Circuits with DFT-Free Controller-Datapath Interface. J. Electron. Test. Yiorgos Makris, Jamison Collins, Alex Orailoglu
2002	—	`conf`	Non-Intrusive Design of Concurrently Self-Testable FSMs. Asian Test Symposium Petros Drineas, Yiorgos Makris
2002	—	`conf`	Test Requirement Analysis for Low Cost Hierarchical Test Path Construction. Asian Test Symposium Yiorgos Makris, Alex Orailoglu
2001	Misc	`conf`	Efficient Transparency Extraction and Utilization in Hierarchical Test. VTS Yiorgos Makris, Vishal Patel, Alex Orailoglu
2000	—	`conf`	Exploiting Off-Line Hierarchical Test Paths in Module Diagnosis and On-Line Test. LATW Yiorgos Makris, Alex Orailoglu
2000	—	`conf`	Fast hierarchical test path construction for DFT-free controller-datapath circuits. Asian Test Symposium Yiorgos Makris, Jamison Collins, Alex Orailoglu
2000	—	`conf`	How to avoid random walks in hierarchical test path identification. ETW Yiorgos Makris, Jamison Collins, Alex Orailoglu
2000	Misc	`conf`	Invariance-Based On-Line Test for RTL Controller-Datapath Circuits. VTS Yiorgos Makris, Ismet Bayraktaroglu, Alex Orailoglu
2000	—	`conf`	Modular test generation and concurrent transparency-based test translation using gate-level ATPG. CICC Yiorgos Makris, Alex Orailoglu, Praveen Vishakantaiah
2000	C	`conf`	Transparency-based hierarchical test generation for modular RTL designs. ISCAS Yiorgos Makris, Jamison Collins, Alex Orailoglu, Praveen Vishakantaiah
1999	—	`conf`	A Module Diagnosis and Design-for-Debug Methodology Based on Hierarchical Test Paths. DFT Yiorgos Makris, Alex Orailoglu
1999	A	`conf`	Channel-Based Behavioral Test Synthesis for Improved Module Reachability. DATE Yiorgos Makris, Alex Orailoglu
1999	—	`conf`	Property-based testability analysis for hierarchical RTL designs. ICECS Yiorgos Makris, Alex Orailoglu
1999	—	`conf`	TRANSPARENT: a system for RTL testability analysis, DFT guidance and hierarchical test generation. CICC Yiorgos Makris, Jamison Collins, Alex Orailoglu, Praveen Vishakantaiah
1998	A	`conf`	DFT guidance through RTL test justification and propagation analysis. ITC Yiorgos Makris, Alex Orailoglu
1998	J	`jnl`	RTL Test Justification and Propagation Analysis for Modular Designs. J. Electron. Test. Yiorgos Makris, Alex Orailoglu