Ying Wang

290 papers A* 41A 36B 9C 10Misc 4Journal 140Unranked 50
YearRankTypeTitle / Venue / Authors
2026 J jnl
A System Architecture for Low Latency Multiprogramming Quantum Computing.
CoRR
Yilun Zhao, Yu Chen, Kaiyan Chang, He Li, Bing Li, Yinhe Han, Ying Wang
2026 J jnl
CGR-NPU: A Hybrid CGRA and NPU Architecture for Adaptive Neural Computing Workloads.
IEEE Comput. Archit. Lett.
Junzhe Jing, Feng Min, Yiming Gan, Ying Wang, Yinhe Han
2026 J jnl
Chipletizer 2.0: Toward Cost-Effective Chiplet Design via Reuse-Aware Decomposition.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Fuping Li, Ding Yuan, Yujie Wang, Juelei Zhou, Xihao Liang, Yinhe Han, Huawei Li, Xiaowei Li, Ying Wang
2026 J jnl
Chiplever: A Hardware-Software Co-Design Framework Toward Extension of Chiplet System for Fully Homomorphic Encryption.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yibo Du, Ying Wang, Mengdi Wang, Xiaowei Li, Yinhe Han
2026 J jnl
From Buffers to Registers: Unlocking Fine-Grained FlashAttention with Hybrid-Bonded 3D NPU Co-Design.
CoRR
Jinxin Yu, Yudong Pan, Mengdi Wang, Huawei Li, Yinhe Han, Xiaowei Li, Ying Wang
2026 — conf
Ouroboros: Wafer-Scale SRAM CIM with Token-Grained Pipelining for Large Language Model Inference.
ASPLOS (2)
Yiqi Liu, Yudong Pan, Mengdi Wang, Shixin Zhao, Haonan Zhu, Yinhe Han, Lei Zhang, Ying Wang
2026 J jnl
Ouroboros: Wafer-Scale SRAM CIM with Token-Grained Pipelining for Large Language Model Inference.
CoRR
Yiqi Liu, Yudong Pan, Mengdi Wang, Shixin Zhao, Haonan Zhu, Yinhe Han, Lei Zhang, Ying Wang
2026 J jnl
PAM: Processing Across Memory Hierarchy for Efficient KV-centric LLM Serving System.
CoRR
Lian Liu, Shixin Zhao, Yutian Zhou, Yintao He, Mengdi Wang, Yinhe Han, Ying Wang
2026 J jnl
SAP: Shared-Aware Prefetching for Reducing Inter-Chiplet Data Access Latency.
IEEE Comput. Archit. Lett.
Junpei Huang, Haobo Xu, Yiming Gan, Ying Li, Wenhao Sun, Mengdi Wang, Xiaotong Wei, Feng Min, Ying Wang, Yinhe Han
2026 J jnl
SuperEncoder: Towards Efficient Neural Approximate Quantum State Preparation.
IEEE Trans. Computers
Yilun Zhao, Bingmeng Wang, Wenle Jiang, Xiwei Pan, Bing Li, Yinhe Han, Ying Wang
2026 J jnl
Testing Storage-System Correctness: Challenges, Fuzzing Limitations, and AI-Augmented Opportunities.
CoRR
Ying Wang, Jiahui Chen, Dejun Jiang
2026 J jnl
TriMoE: Augmenting GPU with AMX-Enabled CPU and DIMM-NDP for High-Throughput MoE Inference via Offloading.
CoRR
Yudong Pan, Yintao He, Tianhua Han, Lian Liu, Shixin Zhao, Zhirong Chen, Mengdi Wang, Cangyuan Li, Yinhe Han, Ying Wang
2025 J jnl
A Visual-Cortex-Mimetic Tiny Neuromorphic Vision Processor Based on Reconfigurable Cortical Neuron Unit.
IEEE Trans. Circuits Syst. II Express Briefs
Mingju Chen, Junxian He, Haibing Wang, Tengxiao Wang, Haoran Gao, Liyuan Liu, Ying Wang, Cong Shi
2025 J jnl
A data-centric chip design agent framework for Verilog code generation.
ACM Trans. Design Autom. Electr. Syst.
Kaiyan Chang, Wenlong Zhu, Kun Wang, Xinyang He, Nan Yang, Zhirong Chen, Dantong Jin, Cangyuan Li, Yunhao Zhou, Hao Yan, Zhuoliang Zhao, Yuan Cheng, Mengdi Wang, Shengwen Liang, Yinhe Han, Xiaowei Li, Huawei Li, Ying Wang
2025 J jnl
APoX-M: Accelerate deep point cloud analysis via adaptive graph construction.
Integr.
Lei Dai, Shengwen Liang, Ying Wang, Huawei Li, Xiaowei Li
2025 J jnl
Accelerate Point Cloud Structuring for Deep Neural Networks via Fast Spatial-Searching Tree.
IEEE Trans. Circuits Syst. Video Technol.
Jinyu Zhan, Shiyu Zou, Wei Jiang, Youyuan Zhang, Suidi Peng, Ying Wang
2025 J jnl
Attar: RRAM-based in-memory attention accelerator with software-hardware co-optimization.
Sci. China Inf. Sci.
Bing Li, Ying Qi, Ying Wang, Yinhe Han
2025 J jnl
AutoSilicon: Scaling Up RTL Design Generation Capability of Large Language Models.
ACM Trans. Design Autom. Electr. Syst.
Cangyuan Li, Chujie Chen, Yudong Pan, Wenjun Xu, Yiqi Liu, Kaiyan Chang, Yujie Wang, Mengdi Wang, Huawei Li, Yinhe Han, Ying Wang
2025 A* conf
BaWA: Automatic Optimizing Pruning Metric for Large Language Models with Balanced Weight and Activation.
ICML
Lian Liu, Xiandong Zhao, Guanchen Li, Dong Li, Mengdi Wang, Yinhe Han, Xiaowei Li, Ying Wang
2025 — conf
Be CIM or Be Memory: A Dual-mode-aware DNN Compiler for CIM Accelerators.
ASPLOS (2)
Shixin Zhao, Yuming Li, Bing Li, Yintao He, Mengdi Wang, Yinhe Han, Ying Wang
2025 J jnl
Be CIM or Be Memory: A Dual-mode-aware DNN Compiler for CIM Accelerators.
CoRR
Shixin Zhao, Yuming Li, Bing Li, Yintao He, Mengdi Wang, Yinhe Han, Ying Wang
2025 C conf
CIT-CTPlacer: An Analytical RDL Chiplet-Terminal Co-Placement Algorithm for Large-Scale 2.5D IC.
ISCAS
Xihao Liang, Yujie Wang, Xupengkai Lu, Lang Feng, Jixiang Zhu, Ying Wang, Yinhe Han
2025 A conf
CLASS: A Controller-Centric Layout Synthesizer for Dynamic Quantum Circuits.
ICCAD
Yu Chen, Yilun Zhao, Bing Li, He Li, Mengdi Wang, Yinhe Han, Ying Wang
2025 J jnl
CLASS: A Controller-Centric Layout Synthesizer for Dynamic Quantum Circuits.
CoRR
Yu Chen, Yilun Zhao, Bing Li, He Li, Mengdi Wang, Yinhe Han, Ying Wang
2025 — conf
COMET: Towards Practical W4A4KV4 LLMs Serving.
ASPLOS (2)
Lian Liu, Long Cheng, Haimeng Ren, Zhaohui Xu, Yudong Pan, Mengdi Wang, Xiaowei Li, Yinhe Han, Ying Wang
2025 J jnl
ChipSeek-R1: Generating Human-Surpassing RTL with LLM via Hierarchical Reward-Driven Reinforcement Learning.
CoRR
Zhirong Chen, Kaiyan Chang, Zhuolin Li, Xinyang He, Chujie Chen, Cangyuan Li, Mengdi Wang, Haobo Xu, Yinhe Han, Ying Wang
2025 J jnl
DNA: A General Dynamic Neural Network Accelerator.
IEEE Trans. Computers
Lian Liu, Jinxin Yu, Mengdi Wang, Xiaowei Li, Yinhe Han, Ying Wang
2025 A conf
DRIM-ANN: An Approximate Nearest Neighbor Search Engine based on Commercial DRAM-PIMs.
SC
Mingkai Chen, Tianhua Han, Cheng Liu, Shengwen Liang, Kuai Yu, Lei Dai, Ziming Yuan, Ying Wang, Lei Zhang, Huawei Li, Xiaowei Li
2025 J jnl
Deep Reinforcement Learning for Job Scheduling and Resource Management in Cloud Computing: An Algorithm-Level Review.
CoRR
Yan Gu, Zhaoze Liu, Shuhong Dai, Cong Liu, Ying Wang, Shen Wang, Georgios Theodoropoulos, Long Cheng
2025 A* conf
Distributed-HISQ: A Distributed Quantum Control Architecture.
MICRO
Yilun Zhao, Kangding Zhao, Peng Zhou, Dingdong Liu, Tingyu Luo, Yuzhen Zheng, Peng Luo, Shun Hu, Jin Lin, Cheng Guo, Yinhe Han, Ying Wang, Mingtang Deng, Junjie Wu, Xiang Fu
2025 J jnl
Distributed-HISQ: A Distributed Quantum Control Architecture.
CoRR
Yilun Zhao, Kangding Zhao, Peng Zhou, Dingdong Liu, Tingyu Luo, Yuzhen Zheng, Peng Luo, Shun Hu, Jin Lin, Cheng Guo, Yinhe Han, Ying Wang, Mingtang Deng, Junjie Wu, Xiang Fu
2025 C conf
FlexIO: A Scalable IO Chiplet Architecture with Flexible Memory Controller Mapping.
ICCD
Junpei Huang, Haobo Xu, Ying Wang, Yinhe Han
2025 J jnl
Functional Testing and Repair for ReRAM-Based Deep-Learning Accelerators.
IEEE Des. Test
Wen Li, Ying Wang, Huawei Li, Xiaowei Li, Kaiwei Zou
2025 — conf
High-Parallel In-Memory NTT Engine with Hierarchical Structure and Even-Odd Data Mapping.
ASP-DAC
Bing Li, Huaijun Liu, Yibo Du, Ying Wang
2025 J jnl
Improving DNN Accuracy on MLC PIM via Non-Ideal PIM Device Fine-Tuning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hao Lv, Lei Zhang, Ying Wang
2025 J jnl
In-Situ NAS: A Plug-and-Search Neural Architecture Search Framework Across Hardware Platforms.
IEEE Trans. Computers
Hao Lv, Lei Zhang, Ying Wang
2025 A* conf
LAD: Efficient Accelerator for Generative Inference of LLM with Locality Aware Decoding.
HPCA
Haoran Wang, Yuming Li, Haobo Xu, Ying Wang, Liqi Liu, Jun Yang, Yinhe Han
2025 A* conf
LLMulator: Generalizable Cost Modeling for Dataflow Accelerators with Input-Adaptive Control Flow.
MICRO
Kaiyan Chang, Wenlong Zhu, Shengwen Liang, Huawei Li, Ying Wang
2025 J jnl
LLMulator: Generalizable Cost Modeling for Dataflow Accelerators with Input-Adaptive Control Flow.
CoRR
Kaiyan Chang, Wenlong Zhu, Shengwen Liang, Huawei Li, Ying Wang
2025 J jnl
Large Processor Chip Model.
CoRR
Kaiyan Chang, Mingzhi Chen, Yunji Chen, Zhirong Chen, Dongrui Fan, Junfeng Gong, Nan Guo, Yinhe Han, Qinfen Hao, Shuo Hou, Xuanjing Huang, Pengwei Jin, Changxin Ke, Cangyuan Li, Guangli Li, Huawei Li, Kuan Li, Naipeng Li, Shengwen Liang, Cheng Liu, Hongwei Liu, Jiahua Liu, Junliang Lv, Jianan Mu, Jin Qin, Bin Sun, Chenxi Wang, Duo Wang, Mingjun Wang, Ying Wang, Chenggang Wu, Peiyang Wu, Teng Wu, Xiao Xiao, Mengyao Xie, Chenwei Xiong, Ruiyuan Xu, Mingyu Yan, Xiaochun Ye, Kuai Yu, Rui Zhang, Shuoming Zhang, Jiacheng Zhao
2025 A conf
MMCircuitEval: A Comprehensive Multimodal Circuit-Focused Benchmark for Evaluating LLMs.
ICCAD
Chenchen Zhao, Zhengyuan Shi, Xiangyu Wen, Chengjie Liu, Yi Liu, Yunhao Zhou, Yuxiang Zhao, Hefei Feng, Yinan Zhu, Gwok-Waa Wan, Xin Cheng, Weiyu Chen, Yongqi Fu, Chujie Chen, Chenhao Xue, Ying Wang, Yibo Lin, Jun Yang, Ning Xu, Xi Wang, Qiang Xu
2025 J jnl
MMCircuitEval: A Comprehensive Multimodal Circuit-Focused Benchmark for Evaluating LLMs.
CoRR
Chenchen Zhao, Zhengyuan Shi, Xiangyu Wen, Chengjie Liu, Yi Liu, Yunhao Zhou, Yuxiang Zhao, Hefei Feng, Yinan Zhu, Gwok-Waa Wan, Xin Cheng, Weiyu Chen, Yongqi Fu, Chujie Chen, Chenhao Xue, Guangyu Sun, Ying Wang, Yibo Lin, Jun Yang, Ning Xu, Xi Wang, Qiang Xu
2025 A* conf
Make LLM Inference Affordable to Everyone: Augmenting GPU Memory with NDP-DIMM.
HPCA
Lian Liu, Shixin Zhao, Bing Li, Haimeng Ren, Zhaohui Xu, Mengdi Wang, Xiaowei Li, Yinhe Han, Ying Wang
2025 J jnl
Make LLM Inference Affordable to Everyone: Augmenting GPU Memory with NDP-DIMM.
CoRR
Lian Liu, Shixin Zhao, Bing Li, Haimeng Ren, Zhaohui Xu, Mengdi Wang, Xiaowei Li, Yinhe Han, Ying Wang
2025 A* conf
NeuVSA: A Unified and Efficient Accelerator for Neural Vector Search.
HPCA
Ziming Yuan, Lei Dai, Wen Li, Jie Zhang, Shengwen Liang, Ying Wang, Cheng Liu, Huawei Li, Xiaowei Li, Jiafeng Guo, Peng Wang, Renhai Chen, Gong Zhang
2025 — conf
PAPI: Exploiting Dynamic Parallelism in Large Language Model Decoding with a Processing-In-Memory-Enabled Computing System.
ASPLOS (2)
Yintao He, Haiyu Mao, Christina Giannoula, Mohammad Sadrosadati, Juan Gómez-Luna, Huawei Li, Xiaowei Li, Ying Wang, Onur Mutlu
2025 J jnl
PAPI: Exploiting Dynamic Parallelism in Large Language Model Decoding with a Processing-In-Memory-Enabled Computing System.
CoRR
Yintao He, Haiyu Mao, Christina Giannoula, Mohammad Sadrosadati, Juan Gómez-Luna, Huawei Li, Xiaowei Li, Ying Wang, Onur Mutlu
2025 B conf
PStore: End-to-End Integrity and High-Performance I/O for Cloud-Native Databases.
ICPADS
Ying Wang, Dejun Jiang
2025 J jnl
QiMeng: Fully Automated Hardware and Software Design for Processor Chip.
CoRR
Rui Zhang, Yuanbo Wen, Shuyao Cheng, Di Huang, Shaohui Peng, Jiaming Guo, Pengwei Jin, Jiacheng Zhao, Tianrui Ma, Yaoyu Zhu, Yifan Hao, Yongwei Zhao, Shengwen Liang, Ying Wang, Xing Hu, Zidong Du, Huimin Cui, Ling Li, Qi Guo, Yunji Chen
2025 — conf
RTLMarker: Protecting LLM-Generated RTL Copyright via a Hardware Watermarking Framework.
ASP-DAC
Kun Wang, Kaiyan Chang, Mengdi Wang, Xingqi Zou, Haobo Xu, Yinhe Han, Ying Wang
2025 J jnl
RTLMarker: Protecting LLM-Generated RTL Copyright via a Hardware Watermarking Framework.
CoRR
Kun Wang, Kaiyan Chang, Mengdi Wang, Xinqi Zou, Haobo Xu, Yinhe Han, Ying Wang
2025 A conf
RTPU: Unifying Non-Private and Private Inference with Reconfigurable Architecture.
ICCAD
Fuping Li, Ying Wang, Yinghao Yang, Jingxuan Li, Yibo Du, Huawei Li, Yinhe Han, Hang Lu, Xiaowei Li
2025 A conf
Taijigraph: an Out-Of-Core Graph Processing System Enhanced with Computational Storage.
IPDPS
Xinmiao Zhang, Cheng Liu, Shengwen Liang, Hayden Kwok-Hay So, Ying Wang, Lei Zhang, Huawei Li, Xiaowei Li
2024 J jnl
A Deep Reinforcement Learning-Based Preemptive Approach for Cost-Aware Cloud Job Scheduling.
IEEE Trans. Sustain. Comput.
Long Cheng, Yue Wang, Feng Cheng, Cheng Liu, Zhiming Zhao, Ying Wang
2024 J jnl
A Task-Adaptive In-Situ ReRAM Computing for Graph Convolutional Networks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yintao He, Bing Li, Ying Wang, Cheng Liu, Huawei Li, Xiaowei Li
2024 J jnl
A visual cortex-inspired edge neuromorphic hardware architecture with on-chip multi-layer STDP learning.
Comput. Electr. Eng.
Junxian He, Min Tian, Ying Jiang, Haibing Wang, Tengxiao Wang, Xichuan Zhou, Liyuan Liu, Nanjian Wu, Ying Wang, Cong Shi
2024 A conf
AGC: A Unified Architecture for Accelerating K-Nearest Neighbor Graph Construction in Vector Search.
ICCAD
Lei Dai, Ziming Yuan, Wen Li, Shengwen Liang, Kaiwei Zou, Ying Wang, Cheng Liu, Huawei Li, Xiaowei Li
2024 B conf
APoX: Accelerate Graph-Based Deep Point Cloud Analysis via Adaptive Graph Construction.
ASPDAC
Lei Dai, Shengwen Liang, Ying Wang, Huawei Li, Xiaowei Li
2024 J jnl
Advancements in Accelerating Deep Neural Network Inference on AIoT Devices: A Survey.
IEEE Trans. Sustain. Comput.
Long Cheng, Yan Gu, Qingzhi Liu, Lei Yang, Cheng Liu, Ying Wang
2024 J jnl
An Automatic Neural Network Architecture-and-Quantization Joint Optimization Framework for Efficient Model Inference.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Lian Liu, Ying Wang, Xiandong Zhao, Weiwei Chen, Huawei Li, Xiaowei Li, Yinhe Han
2024 J jnl
An Energy-Efficient In-Memory Accelerator for Graph Construction and Updating.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Mingkai Chen, Cheng Liu, Shengwen Liang, Lei He, Ying Wang, Lei Zhang, Huawei Li, Xiaowei Li
2024 J jnl
Approximate data mapping in refresh-free DRAM for energy-efficient computing in modern mobile systems.
Comput. Commun.
Sen Li, Hui Jin, Yingke Gao, Ying Wang, Shuhong Dai, Yongjun Xu, Long Cheng
2024 A conf
Bit-Trimmer: Ineffectual Bit-Operation Removal for CLM Architecture.
DATE
Yintao He, Shixin Zhao, Songyun Qu, Huawei Li, Xiaowei Li, Ying Wang
2024 — conf
CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators.
ASPLOS (2)
Songyun Qu, Shixin Zhao, Bing Li, Yintao He, Xuyi Cai, Lei Zhang, Ying Wang
2024 J jnl
CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators.
CoRR
Songyun Qu, Shixin Zhao, Bing Li, Yintao He, Xuyi Cai, Lei Zhang, Ying Wang
2024 J jnl
COMET: Towards Partical W4A4KV4 LLMs Serving.
CoRR
Lian Liu, Haimeng Ren, Long Cheng, Zhaohui Xu, Yudong Pan, Mengdi Wang, Xiaowei Li, Yinhe Han, Ying Wang
2024 — conf
Chaos: Function Granularity Runtime Address Layout Space Randomization for Kernel Module.
APSys
Zihao Chang, Jihan Lin, Haifeng Sun, Runkuang Li, Ying Wang, Bin Hu, Xiaofang Zhao, Dejun Jiang, Ninghui Sun, Sa Wang
2024 B conf
Chipletizer: Repartitioning SoCs for Cost-Effective Chiplet Integration.
ASPDAC
Fuping Li, Ying Wang, Yujie Wang, Mengdi Wang, Yinhe Han, Huawei Li, Xiaowei Li
2024 A* conf
Chiplever: Towards Effortless Extension of Chiplet-based System for FHE.
DAC
Yibo Du, Ying Wang, Bing Li, Fuping Li, Shengwen Liang, Huawei Li, Xiaowei Li, Yinhe Han
2024 J jnl
DRIM-ANN: An Approximate Nearest Neighbor Search Engine based on Commercial DRAM-PIMs.
CoRR
Mingkai Chen, Tianhua Han, Cheng Liu, Shengwen Liang, Kuai Yu, Lei Dai, Ziming Yuan, Ying Wang, Lei Zhang, Huawei Li, Xiaowei Li
2024 A* conf
Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework.
DAC
Kaiyan Chang, Kun Wang, Nan Yang, Ying Wang, Dantong Jin, Wenlong Zhu, Zhirong Chen, Cangyuan Li, Hao Yan, Yunhao Zhou, Zhuoliang Zhao, Yuan Cheng, Yudong Pan, Yiqi Liu, Mengdi Wang, Shengwen Liang, Yinhe Han, Huawei Li, Xiaowei Li
2024 J jnl
Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework.
CoRR
Kaiyan Chang, Kun Wang, Nan Yang, Ying Wang, Dantong Jin, Wenlong Zhu, Zhirong Chen, Cangyuan Li, Hao Yan, Yunhao Zhou, Zhuoliang Zhao, Yuan Cheng, Yudong Pan, Yiqi Liu, Mengdi Wang, Shengwen Liang, Yinhe Han, Huawei Li, Xiaowei Li
2024 J jnl
Discovering Hierarchical Multi-Instance Business Processes From Event Logs.
IEEE Trans. Serv. Comput.
Cong Liu, Ying Wang, Lijie Wen, Jiujun Cheng, Long Cheng, Qingtian Zeng
2024 A* conf
Drift: Leveraging Distribution-based Dynamic Precision Quantization for Efficient Deep Neural Network Acceleration.
DAC
Lian Liu, Zhaohui Xu, Yintao He, Ying Wang, Huawei Li, Xiaowei Li, Yinhe Han
2024 J jnl
Dynamic WiFi indoor positioning based on the multi-scale metric learning.
Comput. Commun.
Yujie Wang, Ying Wang, Qingqing Liu, Yong Zhang
2024 A conf
GPACE: An Energy-Efficient PQ-Based GCN Accelerator with Redundancy Reduction.
DATE
Yibo Du, Shengwen Liang, Ying Wang, Huawei Li, Xiaowei Li, Yinhe Han
2024 J jnl
GTA: a new General Tensor Accelerator with Better Area Efficiency and Data Reuse.
CoRR
Chenyang Ai, Lechuan Zhao, Zhijie Huang, Cangyuan Li, Xinan Wang, Ying Wang
2024 A conf
HyQA: Hybrid Near-Data Processing Platform for Embedding Based Question Answering System.
DATE
Shengwen Liang, Ziming Yuan, Ying Wang, Dawen Xu, Huawei Li, Xiaowei Li
2024 A conf
Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generation.
ICCAD
Kaiyan Chang, Zhirong Chen, Yunhao Zhou, Wenlong Zhu, Kun Wang, Haobo Xu, Cangyuan Li, Mengdi Wang, Shengwen Liang, Huawei Li, Yinhe Han, Ying Wang
2024 J jnl
Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generation.
CoRR
Kaiyan Chang, Zhirong Chen, Yunhao Zhou, Wenlong Zhu, Kun Wang, Haobo Xu, Cangyuan Li, Mengdi Wang, Shengwen Liang, Huawei Li, Yinhe Han, Ying Wang
2024 — conf
PrimePar: Efficient Spatial-temporal Tensor Partitioning for Large Transformer Model Training.
ASPLOS (3)
Haoran Wang, Lei Wang, Haobo Xu, Ying Wang, Yuming Li, Yinhe Han
2024 J jnl
Real-Time Robust Video Object Detection System Against Physical-World Adversarial Attacks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Husheng Han, Xing Hu, Yifan Hao, Kaidi Xu, Pucheng Dang, Ying Wang, Yongwei Zhao, Zidong Du, Qi Guo, Yanzhi Wang, Xishan Zhang, Tianshi Chen
2024 J jnl
SuperEncoder: Towards Universal Neural Approximate Quantum State Preparation.
CoRR
Yilun Zhao, Bingmeng Wang, Wenle Jiang, Xiwei Pan, Bing Li, Yinhe Han, Ying Wang
2023 J jnl
A Coordinated Model Pruning and Mapping Framework for RRAM-Based DNN Accelerators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Songyun Qu, Bing Li, Shixin Zhao, Lei Zhang, Ying Wang
2023 J jnl
A Framework for Neural Network Architecture and Compile Co-optimization.
ACM Trans. Embed. Comput. Syst.
Weiwei Chen, Ying Wang, Ying Xu, Chengsi Gao, Cheng Liu, Lei Zhang
2023 J jnl
A Survey of Non-Volatile Main Memory File Systems.
J. Comput. Sci. Technol.
Ying Wang, Wenqing Jia, Dejun Jiang, Jin Xiong
2023 A* conf
APPEND: Rethinking ASIP Synthesis in the Era of AI.
DAC
Cangyuan Li, Ying Wang, Huawei Li, Yinhe Han
2023 J jnl
Accelerating Deformable Convolution Networks with Dynamic and Irregular Memory Accesses.
ACM Trans. Design Autom. Electr. Syst.
Cheng Chu, Cheng Liu, Dawen Xu, Ying Wang, Tao Luo, Huawei Li, Xiaowei Li
2023 — conf
Adversarial Testing: A Novel On-Line Testing Method for Deep Learning Processors.
ATS
Wen Li, Ying Wang, Kaiwei Zou, Huawei Li, Xiaowei Li
2023 A* conf
AmgR: Algebraic Multigrid Accelerated on ReRAM.
DAC
Mingjia Fan, Xiaotian Tian, Yintao He, Junxian Li, Yiru Duan, Xiaozhe Hu, Ying Wang, Zhou Jin, Weifeng Liu
2023 J jnl
An Energy-Efficient Computing-in-Memory (CiM) Scheme Using Field-Free Spin-Orbit Torque (SOT) Magnetic RAMs.
IEEE Trans. Emerg. Top. Comput.
Bi Wu, Haonan Zhu, Dayane Reis, Zhaohao Wang, Ying Wang, Ke Chen, Weiqiang Liu, Fabrizio Lombardi, Xiaobo Sharon Hu
2023 J jnl
ApproxABFT: Approximate Algorithm-Based Fault Tolerance for Vision Transformers.
CoRR
Xinghua Xue, Cheng Liu, Haitong Huang, Ying Wang, Bing Yang, Tao Luo, Lei Zhang, Huawei Li, Xiaowei Li
2023 A* conf
CTA: Hardware-Software Co-design for Compressed Token Attention Mechanism.
HPCA
Haoran Wang, Haobo Xu, Ying Wang, Yinhe Han
2023 J jnl
ChipGPT: How far are we from natural language hardware design.
CoRR
Kaiyan Chang, Ying Wang, Haimeng Ren, Mengdi Wang, Shengwen Liang, Yinhe Han, Huawei Li, Xiaowei Li
2023 B conf
Communication-aware Quantization for Deep Learning Inference Parallelization on Chiplet-based Accelerators.
ICPADS
Kaiwei Zou, Songyun Qu, Wen Li, Ying Wang, Huawei Li, Yongpan Liu
2023 J jnl
Cross-Layer Optimization for Fault-Tolerant Deep Learning.
CoRR
Qing Zhang, Cheng Liu, Bo Liu, Haitong Huang, Ying Wang, Huawei Li, Xiaowei Li
2023 — conf
Deep Learning Compiler Optimization on Multi-Chiplet Architecture.
AICAS
Huiqing Xu, Kuang Mao, Quihong Pan, Zhaorong Tang, Mengdi Wang, Ying Wang
2023 A conf
DeepBurning-MixQ: An Open Source Mixed-Precision Neural Network Accelerator Design Framework for FPGAs.
ICCAD
Erjing Luo, Haitong Huang, Cheng Liu, Guoyu Li, Bing Yang, Ying Wang, Huawei Li, Xiaowei Li
2023 J jnl
DeepBurning-MixQ: An Open Source Mixed-Precision Neural Network Accelerator Design Framework for FPGAs.
CoRR
Erjing Luo, Haitong Huang, Cheng Liu, Guoyu Li, Bing Yang, Ying Wang, Huawei Li, Xiaowei Li
2023 A conf
ENASA: Towards Edge Neural Architecture Search based on CIM acceleration.
DATE
Shixin Zhao, Songyun Qu, Ying Wang, Yinhe Han
2023 A* conf
Efficient Supernet Training Using Path Parallelism.
HPCA
Ying Xu, Long Cheng, Xuyi Cai, Xiaohan Ma, Weiwei Chen, Lei Zhang, Ying Wang
2023 J jnl
Exploring Winograd Convolution for Cost-Effective Neural Network Fault Tolerance.
IEEE Trans. Very Large Scale Integr. Syst.
Xinghua Xue, Cheng Liu, Bo Liu, Haitong Huang, Ying Wang, Tao Luo, Lei Zhang, Huawei Li, Xiaowei Li
2023 J jnl
Exploring Winograd Convolution for Cost-effective Neural Network Fault Tolerance.
CoRR
Xinghua Xue, Cheng Liu, Bo Liu, Haitong Huang, Ying Wang, Tao Luo, Lei Zhang, Huawei Li, Xiaowei Li
2023 A conf
Full State Quantum Circuit Simulation Beyond Memory Limit.
ICCAD
Yilun Zhao, Yu Chen, He Li, Ying Wang, Kaiyan Chang, Bingmeng Wang, Bing Li, Yinhe Han
2023 J jnl
IVP: An Intelligent Video Processing Architecture for Video Streaming.
IEEE Trans. Computers
Chengsi Gao, Ying Wang, Yinhe Han, Weiwei Chen, Lei Zhang
2023 A conf
Layer-Puzzle: Allocating and Scheduling Multi-task on Multi-core NPUs by Using Layer Heterogeneity.
DATE
Chengsi Gao, Ying Wang, Cheng Liu, Mengdi Wang, Weiwei Chen, Yinhe Han, Lei Zhang
2023 J jnl
MRFI: An Open Source Multi-Resolution Fault Injection Framework for Neural Network Processing.
CoRR
Haitong Huang, Cheng Liu, Xinghua Xue, Ying Wang, Huawei Li, Xiaowei Li
2023 J jnl
Network Pruning for Bit-Serial Accelerators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xiandong Zhao, Ying Wang, Cheng Liu, Cong Shi, Kaijie Tu, Lei Zhang
2023 — conf
Occamy: Elastically Sharing a SIMD Co-processor across Multiple CPU Cores.
ASPLOS (3)
Zhongcheng Zhang, Yan Ou, Ying Liu, Chenxi Wang, Yongbin Zhou, Xiaoyu Wang, Yuyang Zhang, Yucheng Ouyang, Jiahao Shan, Ying Wang, Jingling Xue, Huimin Cui, Xiaobing Feng
2023 J jnl
On-Line Fault Protection for ReRAM-Based Neural Networks.
IEEE Trans. Computers
Wen Li, Ying Wang, Cheng Liu, Yintao He, Lian Liu, Huawei Li, Xiaowei Li
2023 J jnl
Optimus: An Operator Fusion Framework for Deep Neural Networks.
ACM Trans. Embed. Comput. Syst.
Xuyi Cai, Ying Wang, Lei Zhang
2023 C conf
PANG: A Pattern-Aware GCN Accelerator for Universal Graphs.
ICCD
Yibo Du, Ying Wang, Shengwen Liang, Huawei Li, Xiaowei Li, Yinhe Han
2023 J jnl
Reliability Analysis of Vision Transformers.
CoRR
Xinghua Xue, Cheng Liu, Ying Wang, Bing Yang, Tao Luo, Lei Zhang, Huawei Li, Xiaowei Li
2023 J jnl
S$^{2}$ Loop: A Lightweight Spectral-Spatio Loop Closure Detector for Resource-Constrained Platforms.
IEEE Robotics Autom. Lett.
Yuquan He, Long Zhang, Cheng Liu, Lei Zhang, Ying Wang
2023 J jnl
Soft Error Reliability Analysis of Vision Transformers.
IEEE Trans. Very Large Scale Integr. Syst.
Xinghua Xue, Cheng Liu, Ying Wang, Bing Yang, Tao Luo, Lei Zhang, Huawei Li, Xiaowei Li
2023 J jnl
Statistical Modeling of Soft Error Influence on Neural Networks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Haitong Huang, Xinghua Xue, Cheng Liu, Ying Wang, Tao Luo, Long Cheng, Huawei Li, Xiaowei Li
2023 J jnl
Toward Network-Aware Query Execution Systems in Large Datacenters.
IEEE Trans. Netw. Serv. Manag.
Long Cheng, Ying Wang, Rutvij H. Jhaveri, Qingle Wang, Ying Mao
2023 J jnl
Variation Enhanced Attacks Against RRAM-Based Neuromorphic Computing System.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hao Lv, Bing Li, Lei Zhang, Cheng Liu, Ying Wang
2023 J jnl
Variation Enhanced Attacks Against RRAM-based Neuromorphic Computing System.
CoRR
Hao Lv, Bing Li, Lei Zhang, Cheng Liu, Ying Wang
2022 J jnl
A Fast Precision Tuning Solution for Always-On DNN Accelerators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Ying Wang, Yintao He, Long Cheng, Huawei Li, Xiaowei Li
2022 J jnl
A Low-Cost FPGA Implementation of Spiking Extreme Learning Machine With On-Chip Reward-Modulated STDP Learning.
IEEE Trans. Circuits Syst. II Express Briefs
Zhen He, Cong Shi, Tengxiao Wang, Ying Wang, Min Tian, Xichuan Zhou, Ping Li, Liyuan Liu, Nanjian Wu, Gang Luo
2022 J jnl
Amphis: Managing Reconfigurable Processor Architectures With Generative Adversarial Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Weiwei Chen, Ying Wang, Ying Xu, Chengsi Gao, Yinhe Han, Lei Zhang
2022 J jnl
An Automated Quantization Framework for High-Utilization RRAM-Based PIM.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Bing Li, Songyun Qu, Ying Wang
2022 J jnl
An Efficient Deep Learning Accelerator Architecture for Compressed Video Analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yongchen Wang, Ying Wang, Huawei Li, Xiaowei Li
2022 J jnl
CAP: Communication-Aware Automated Parallelization for Deep Learning Inference on CMP Architectures.
IEEE Trans. Computers
Kaiwei Zou, Ying Wang, Long Cheng, Songyun Qu, Huawei Li, Xiaowei Li
2022 A conf
Canopy: A CNFET-based Process Variation Aware Systolic DNN Accelerator.
ISLPED
Cheng Chu, Dawen Xu, Ying Wang, Fan Chen
2022 J jnl
Cognitive SSD+: a deep learning engine for energy-efficient unstructured data retrieval.
CCF Trans. High Perform. Comput.
Shengwen Liang, Ying Wang, Huawei Li, Xiaowei Li
2022 J jnl
Dadu-SV: Accelerate Stereo Vision Processing on NPU.
IEEE Embed. Syst. Lett.
Feng Min, Ying Wang, Haobo Xu, Junpei Huang, Yujie Wang, Xingqi Zou, Meixuan Lu, Yinhe Han
2022 A* conf
DeepBurning-SEG: Generating DNN Accelerators of Segment-Grained Pipeline Architecture.
MICRO
Xuyi Cai, Ying Wang, Xiaohan Ma, Yinhe Han, Lei Zhang
2022 A conf
GIA: A Reusable General Interposer Architecture for Agile Chiplet Integration.
ICCAD
Fuping Li, Ying Wang, Yuanqing Cheng, Yujie Wang, Yinhe Han, Huawei Li, Xiaowei Li
2022 J jnl
HyCA: A Hybrid Computing Architecture for Fault-Tolerant Deep Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Cheng Liu, Cheng Chu, Dawen Xu, Ying Wang, Qianlong Wang, Huawei Li, Xiaowei Li, Kwang-Ting Cheng
2022 A* conf
InfoX: an energy-efficient ReRAM accelerator design with information-lossless low-bit ADCs.
DAC
Yintao He, Songyun Qu, Ying Wang, Bing Li, Huawei Li, Xiaowei Li
2022 J jnl
LINAC: A Spatially Linear Accelerator for Convolutional Neural Networks.
IEEE Comput. Archit. Lett.
Hang Xiao, Haobo Xu, Ying Wang, Yujie Wang, Yinhe Han
2022 — conf
MOCCA: A Process Variation Tolerant Systolic DNN Accelerator using CNFETs in Monolithic 3D.
ACM Great Lakes Symposium on VLSI
Samuel J. Engers, Cheng Chu, Dawen Xu, Ying Wang, Fan Chen
2022 J jnl
MPC-CSAS: Multi-Party Computation for Real-Time Privacy-Preserving Speed Advisory Systems.
IEEE Trans. Intell. Transp. Syst.
Mingming Liu, Long Cheng, Yingqi Gu, Ying Wang, Qingzhi Liu, Noel E. O'Connor
2022 A conf
NoCeption: A Fast PPA Prediction Framework for Network-on-Chips Using Graph Neural Network.
DATE
Fuping Li, Ying Wang, Cheng Liu, Huawei Li, Xiaowei Li
2022 J jnl
Olympus: Reaching Memory-Optimality on DNN Processors.
IEEE Trans. Computers
Xuyi Cai, Ying Wang, Kaijie Tu, Chengsi Gao, Lei Zhang
2022 A* conf
Processing-in-SRAM acceleration for ultra-low power visual 3D perception.
DAC
Yuquan He, Songyun Qu, Gangliang Lin, Cheng Liu, Lei Zhang, Ying Wang
2022 J jnl
Real-Time Robust Video Object Detection System Against Physical-World Adversarial Attacks.
CoRR
Husheng Han, Xing Hu, Kaidi Xu, Pucheng Dang, Ying Wang, Yongwei Zhao, Zidong Du, Qi Guo, Yanzhi Yang, Tianshi Chen
2022 C conf
Reexamining CGRA Memory Sub-system for Higher Memory Utilization and Performance.
ICCD
Lei Dai, Ying Wang, Cheng Liu, Fuping Li, Huawei Li, Xiaowei Li
2022 J jnl
Saving Energy of RRAM-Based Neural Accelerator Through State-Aware Computing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yintao He, Ying Wang, Huawei Li, Xiaowei Li
2022 — conf
Security Threat to the Robustness of RRAM-based Neuromorphic Computing System.
iSES
Bing Li, Hao Lv, Ying Wang, Yiran Chen
2022 J jnl
Statistical Modeling of Soft Error Influence on Neural Networks.
CoRR
Haitong Huang, Xinghua Xue, Cheng Liu, Ying Wang, Tao Luo, Long Cheng, Huawei Li, Xiaowei Li
2022 J jnl
Survey on chiplets: interface, interconnect and integration methodology.
CCF Trans. High Perform. Comput.
Xiaohan Ma, Ying Wang, Yujie Wang, Xuyi Cai, Yinhe Han
2022 J jnl
Taming Process Variations in CNFET for Efficient Last-Level Cache Design.
IEEE Trans. Very Large Scale Integr. Syst.
Dawen Xu, Zhuangyu Feng, Cheng Liu, Li Li, Ying Wang, Huawei Li, Xiaowei Li
2022 J jnl
TripleBrain: A Compact Neuromorphic Hardware Core With Fast On-Chip Self-Organizing and Reinforcement Spike-Timing Dependent Plasticity.
IEEE Trans. Biomed. Circuits Syst.
Haibing Wang, Zhen He, Tengxiao Wang, Junxian He, Xichuan Zhou, Ying Wang, Liyuan Liu, Nanjian Wu, Min Tian, Cong Shi
2022 A* conf
VStore: in-storage graph based vector search accelerator.
DAC
Shengwen Liang, Ying Wang, Ziming Yuan, Cheng Liu, Huawei Li, Xiaowei Li
2022 J jnl
Winograd Convolution: A Perspective from Fault Tolerance.
CoRR
Xinghua Xue, Haitong Huang, Cheng Liu, Ying Wang, Tao Luo, Lei Zhang
2022 A* conf
Winograd convolution: a perspective from fault tolerance.
DAC
Xinghua Xue, Haitong Huang, Cheng Liu, Tao Luo, Lei Zhang, Ying Wang
2021 J jnl
A NAND-SPIN-Based Magnetic ADC.
IEEE Trans. Circuits Syst. II Express Briefs
Bi Wu, Zhaohao Wang, Yuxuan Li, Ying Wang, Dijun Liu, Weisheng Zhao, Xiaobo Sharon Hu
2021 A* conf
ASBP: Automatic Structured Bit-Pruning for RRAM-based NN Accelerator.
DAC
Songyun Qu, Bing Li, Ying Wang, Lei Zhang
2021 J jnl
An Edge 3D CNN Accelerator for Low-Power Activity Recognition.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Ying Wang, Yongchen Wang, Cong Shi, Long Cheng, Huawei Li, Xiaowei Li
2021 A* conf
An Intelligent Video Processing Architecture for Edge-cloud Video Streaming.
DAC
Chengsi Gao, Ying Wang, Weiwei Chen, Lei Zhang
2021 B conf
CHaNAS: coordinated search for network architecture and scheduling policy.
LCTES
Weiwei Chen, Ying Wang, Gangliang Lin, Chengsi Gao, Cheng Liu, Lei Zhang
2021 J jnl
CompSNN: A lightweight spiking neural network based on spatiotemporally compressive spike features.
Neurocomputing
Tengxiao Wang, Cong Shi, Xichuan Zhou, Yingcheng Lin, Junxian He, Ping Gan, Ping Li, Ying Wang, Liyuan Liu, Nanjian Wu, Gang Luo
2021 J jnl
Dadu-Eye: A 5.3 TOPS/W, 30 fps/1080p High Accuracy Stereo Vision Accelerator.
IEEE Trans. Circuits Syst. I Regul. Pap.
Feng Min, Haobo Xu, Ying Wang, Yujie Wang, Jiajun Li, Xingqi Zou, Bei Li, Yinhe Han
2021 J jnl
EnGN: A High-Throughput and Energy-Efficient Accelerator for Large Graph Neural Networks.
IEEE Trans. Computers
Shengwen Liang, Ying Wang, Cheng Liu, Lei He, Huawei Li, Dawen Xu, Xiaowei Li
2021 J jnl
Energy-Efficient Accelerator Design for Deformable Convolution Networks.
CoRR
Dawen Xu, Cheng Chu, Cheng Liu, Ying Wang, Huawei Li, Xiaowei Li, Kwang-Ting Cheng
2021 J jnl
Enhancing the security of memory in cloud infrastructure through in-phase change memory data randomisation.
IET Comput. Digit. Tech.
Xianzhong Zhou, Ying Wang
2021 — conf
Exploiting Memristors for Neuromorphic Reinforcement Learning.
AICAS
Cong Shi, Jing Lu, Ying Wang, Ping Li, Min Tian
2021 A* conf
GCiM: A Near-Data Processing Accelerator for Graph Construction.
DAC
Lei He, Cheng Liu, Ying Wang, Shengwen Liang, Huawei Li, Xiaowei Li
2021 — conf
GLIST: Towards In-Storage Graph Learning.
USENIX ATC
Cangyuan Li, Ying Wang, Cheng Liu, Shengwen Liang, Huawei Li, Xiaowei Li
2021 J jnl
HyCA: A Hybrid Computing Architecture for Fault Tolerant Deep Learning.
CoRR
Dawen Xu, Qianlong Wang, Cheng Liu, Cheng Chu, Ying Wang, Huawei Li, Xiaowei Li, Kwang-Ting Cheng
2021 J jnl
MPC-CSAS: Multi-Party Computation for Real-time Privacy-preserving Speed Advisory Systems.
CoRR
Mingming Liu, Long Cheng, Yingqi Gu, Ying Wang, Qingzhi Liu, Noel E. O'Connor
2021 — conf
MT-DLA: An Efficient Multi-Task Deep Learning Accelerator Design.
ACM Great Lakes Symposium on VLSI
Mengdi Wang, Bing Li, Ying Wang, Cheng Liu, Xiaohan Ma, Xiandong Zhao, Lei Zhang
2021 A* conf
NASA: Accelerating Neural Network Design with a NAS Processor.
ISCA
Xiaohan Ma, Chang Si, Ying Wang, Cheng Liu, Lei Zhang
2021 J jnl
Network-Aware Locality Scheduling for Distributed Data Operators in Data Centers.
IEEE Trans. Parallel Distributed Syst.
Long Cheng, Ying Wang, Qingzhi Liu, Dick H. J. Epema, Cheng Liu, Ying Mao, John Murphy
2021 A* conf
Network-on-Interposer Design for Agile Neural-Network Processor Chip Customization.
DAC
Mengdi Wang, Ying Wang, Cheng Liu, Lei Zhang
2021 B conf
Optimus: towards optimal layer-fusion on deep learning processors.
LCTES
Xuyi Cai, Ying Wang, Lei Zhang
2021 A* conf
PicoVO: A Lightweight RGB-D Visual Odometry Targeting Resource-Constrained IoT Devices.
ICRA
Yuquan He, Ying Wang, Cheng Liu, Lei Zhang
2021 A* conf
PixelSieve: Towards Efficient Activity Analysis From Compressed Video Streams.
DAC
Yongchen Wang, Ying Wang, Huawei Li, Xiaowei Li
2021 J jnl
R2F: A Remote Retraining Framework for AIoT Processors With Computing Errors.
IEEE Trans. Very Large Scale Integr. Syst.
Dawen Xu, Meng He, Cheng Liu, Ying Wang, Long Cheng, Huawei Li, Xiaowei Li, Kwang-Ting Cheng
2021 J jnl
R2F: A Remote Retraining Framework for AIoT Processors with Computing Errors.
CoRR
Dawen Xu, Meng He, Cheng Liu, Ying Wang, Long Cheng, Huawei Li, Xiaowei Li, Kwang-Ting Cheng
2021 — conf
RECOIN: A Low-Power Processing-in-ReRAM Architecture for Deformable Convolution.
ACM Great Lakes Symposium on VLSI
Cheng Chu, Fan Chen, Dawen Xu, Ying Wang
2021 J jnl
Reliability Evaluation and Analysis of FPGA-Based Neural Network Acceleration System.
IEEE Trans. Very Large Scale Integr. Syst.
Dawen Xu, Ziyang Zhu, Cheng Liu, Ying Wang, Shuang Zhao, Lei Zhang, Huaguo Liang, Huawei Li, Kwang-Ting Cheng
2021 Misc conf
Special Session - Test for AI Chips: from DFT to On-line Testing.
VTS
Huawei Li, Xiaowei Li, Yu Huang, Ying Wang, Gary Guo
2021 A* conf
TARe: Task-Adaptive in-situ ReRAM Computing for Graph Learning.
DAC
Yintao He, Ying Wang, Cheng Liu, Huawei Li, Xiaowei Li
2021 J jnl
Taming Process Variations in CNFET for Efficient Last Level Cache Design.
CoRR
Dawen Xu, Zhuangyu Feng, Cheng Liu, Li Li, Ying Wang, Yuanqing Cheng, Huawei Li, Xiaowei Li
2021 — conf
Tenet: A Neural Network Model Extraction Attack in Multi-core Architecture.
ACM Great Lakes Symposium on VLSI
Chengsi Gao, Bing Li, Ying Wang, Weiwei Chen, Lei Zhang
2021 J jnl
To cloud or not to cloud: an on-line scheduler for dynamic privacy-protection of deep learning workload on edge devices.
CCF Trans. High Perform. Comput.
Yibin Tang, Ying Wang, Huawei Li, Xiaowei Li
2021 — conf
VADER: Leveraging the Natural Variation of Hardware to Enhance Adversarial Attack.
ASP-DAC
Hao Lv, Bing Li, Ying Wang, Cheng Liu, Lei Zhang
2020 J jnl
A High-Speed Low-Cost VLSI System Capable of On-Chip Online Learning for Dynamic Vision Sensor Data Classification.
Sensors
Wei He, Jinguo Huang, Tengxiao Wang, Yingcheng Lin, Junxian He, Xichuan Zhou, Ping Li, Ying Wang, Nanjian Wu, Cong Shi
2020 C conf
A Hybrid Computing Architecture for Fault-tolerant Deep Learning Accelerators.
ICCD
Dawen Xu, Cheng Chu, Qianlong Wang, Cheng Liu, Ying Wang, Lei Zhang, Huaguo Liang, Kwang-Ting Cheng
2020 A conf
A Many-Core Accelerator Design for On-Chip Deep Reinforcement Learning.
ICCAD
Ying Wang, Mengdi Wang, Bing Li, Huawei Li, Xiaowei Li
2020 J jnl
A Novel High Performance and Energy Efficient NUCA Architecture for STT-MRAM LLCs With Thermal Consideration.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Bi Wu, Pengcheng Dai, Yuanqing Cheng, Ying Wang, Jianlei Yang, Zhaohao Wang, Dijun Liu, Weisheng Zhao
2020 J jnl
Accelerating Generative Neural Networks on Unmodified Deep Learning Processors - A Software Approach.
IEEE Trans. Computers
Dawen Xu, Cheng Liu, Ying Wang, Kaijie Tu, Bingsheng He, Lei Zhang
2020 A* conf
An Efficient Deep Learning Accelerator for Compressed Video Analysis.
DAC
Yongchen Wang, Ying Wang, Huawei Li, Yinhe Han, Xiaowei Li
2020 A* conf
BitPruner: Network Pruning for Bit-serial Accelerators.
DAC
Xiandong Zhao, Ying Wang, Cheng Liu, Cong Shi, Kaijie Tu, Lei Zhang
2020 J jnl
Bulkyflip: A NAND-SPIN-Based Last-Level Cache With Bandwidth-Oriented Write Management Policy.
IEEE Trans. Circuits Syst. I Regul. Pap.
Bi Wu, Weisheng Zhao, Xiaobo Sharon Hu, Pengcheng Dai, Zhaohao Wang, Chao Wang, Ying Wang, Jianlei Yang, Yuanqing Cheng, Dijun Liu, Youguang Zhang
2020 A conf
CNT-Cache: an Energy-Efficient Carbon Nanotube Cache with Adaptive Encoding.
DATE
Dawen Xu, Kexin Chu, Cheng Liu, Ying Wang, Lei Zhang, Huawei Li
2020 A conf
DeepBurning-GL: an Automated Framework for Generating Graph Neural Network Accelerators.
ICCAD
Shengwen Liang, Cheng Liu, Ying Wang, Huawei Li, Xiaowei Li
2020 J jnl
Field-Free 3T2SOT MRAM for Non-Volatile Cache Memories.
IEEE Trans. Circuits Syst.
Bi Wu, Chao Wang, Zhaohao Wang, Ying Wang, Deming Zhang, Dijun Liu, Youguang Zhang, Xiaobo Sharon Hu
2020 A conf
HitM: High-Throughput ReRAM-based PIM for Multi-Modal Neural Networks.
ICCAD
Bing Li, Ying Wang, Yiran Chen
2020 A* conf
Linear Symmetric Quantization of Neural Networks for Low-precision Integer Hardware.
ICLR
Xiandong Zhao, Ying Wang, Xuyi Cai, Cheng Liu, Lei Zhang
2020 — conf
Multi-task Scheduling for PIM-based Heterogeneous Computing System.
ACM Great Lakes Symposium on VLSI
Dawen Xu, Cheng Chu, Cheng Liu, Ying Wang, Xianzhong Zhou, Lei Zhang, Huaguo Liang, Huawei Li
2020 — conf
Persistent Fault Analysis of Neural Networks on FPGA-based Acceleration System.
ASAP
Dawen Xu, Ziyang Zhu, Cheng Liu, Ying Wang, Huawei Li, Lei Zhang, Kwang-Ting Cheng
2020 A* conf
RaQu: An automatic high-utilization CNN quantization and mapping framework for general-purpose RRAM Accelerator.
DAC
Songyun Qu, Bing Li, Ying Wang, Dawen Xu, Xiandong Zhao, Lei Zhang
2020 — conf
Search-free Accelerator for Sparse Convolutional Neural Networks.
ASP-DAC
Bosheng Liu, Xiaoming Chen, Yinhe Han, Ying Wang, Jiajun Li, Haobo Xu, Xiaowei Li
2020 Misc conf
Special Session - Emerging Memristor Based Memory and CIM Architecture: Test, Repair and Yield Analysis.
VTS
Rajendra Bishnoi, Lizhou Wu, Moritz Fieback, Christopher Münch, Sarath Mohanachandran Nair, Mehdi Baradaran Tahoori, Ying Wang, Huawei Li, Said Hamdioui
2020 A conf
Towards Best-effort Approximation: Applying NAS to General-purpose Approximate Computing.
DATE
Weiwei Chen, Ying Wang, Shuang Yang, Chen Liu, Lei Zhang
2020 A* conf
Towards State-Aware Computation in ReRAM Neural Networks.
DAC
Yintao He, Ying Wang, Xiandong Zhao, Huawei Li, Xiaowei Li
2020 J jnl
Write Back Energy Optimization for STT-MRAM-based Last-level Cache with Data Pattern Characterization.
ACM J. Emerg. Technol. Comput. Syst.
Jiacheng Ni, Keren Liu, Bi Wu, Weisheng Zhao, Yuanqing Cheng, Xiaolong Zhang, Ying Wang
2020 A conf
You Only Search Once: A Fast Automation Framework for Single-Stage DNN/Accelerator Co-design.
DATE
Weiwei Chen, Ying Wang, Shuang Yang, Chen Liu, Lei Zhang
2019 A* conf
A None-Sparse Inference Accelerator that Distills and Reuses the Computation Redundancy in CNNs.
DAC
Ying Wang, Shengwen Liang, Huawei Li, Xiaowei Li
2019 J jnl
A QoS-QoR Aware CNN Accelerator Design Approach.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Ying Wang, Huawei Li, Long Cheng, Xiaowei Li
2019 A conf
ACG-Engine: An Inference Accelerator for Content Generative Neural Networks.
ICCAD
Haobo Xu, Ying Wang, Yujie Wang, Jiajun Li, Bosheng Liu, Yinhe Han
2019 — conf
Addressing the issue of processing element under-utilization in general-purpose systolic deep learning accelerators.
ASP-DAC
Bosheng Liu, Xiaoming Chen, Ying Wang, Yinhe Han, Jiajun Li, Haobo Xu, Xiaowei Li
2019 J jnl
An Adaptive Thermal-Aware ECC Scheme for Reliable STT-MRAM LLC Design.
IEEE Trans. Very Large Scale Integr. Syst.
Bi Wu, Beibei Zhang, Yuanqing Cheng, Ying Wang, Dijun Liu, Weisheng Zhao
2019 A conf
An Agile Precision-Tunable CNN Accelerator based on ReRAM.
ICCAD
Yintao He, Ying Wang, Yongchen Wang, Huawei Li, Xiaowei Li
2019 J jnl
Cluster Restoration-Based Trace Signal Selection for Post-Silicon Debug.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yun Cheng, Huawei Li, Ying Wang, Xiaowei Li
2019 — conf
Cognitive SSD: A Deep Learning Engine for In-Storage Data Retrieval.
USENIX ATC
Shengwen Liang, Ying Wang, Youyou Lu, Zhe Yang, Huawei Li, Xiaowei Li
2019 J jnl
Correlation of Gut Microbiome Between ASD Children and Mothers and Potential Biomarkers for Risk Assessment.
Genom. Proteom. Bioinform.
Ning Li, Junjie Yang, Jiaming Zhang, Cheng Liang, Ying Wang, Bin Chen, Changying Zhao, Jingwen Wang, Guangye Zhang, Dongmei Zhao, Yi Liu, Lehai Zhang, Jun Yang, Guimei Li, Zhongtao Gai, Lei Zhang, Guoping Zhao
2019 — conf
CuckooPIM: an efficient and less-blocking coherence mechanism for processing-in-memory systems.
ASP-DAC
Sheng Xu, Xiaoming Chen, Ying Wang, Yinhe Han, Xiaowei Li
2019 — conf
Exploring emerging CNFET for efficient last level cache design.
ASP-DAC
Dawen Xu, Li Li, Ying Wang, Cheng Liu, Huawei Li
2019 B conf
InS-DLA: An In-SSD Deep Learning Accelerator for Near-Data Processing.
FPL
Shengwen Liang, Ying Wang, Cheng Liu, Huawei Li, Xiaowei Li
2019 A conf
Learn-to-Scale: Parallelizing Deep Learning Inference on Chip Multiprocessor Architecture.
DATE
Kaiwei Zou, Ying Wang, Huawei Li, Xiaowei Li
2019 Misc conf
Leveraging Memory PUFs and PIM-based encryption to secure edge deep learning systems.
VTS
Wen Li, Ying Wang, Huawei Li, Xiaowei Li
2019 J jnl
Load-balancing distributed outer joins through operator decomposition.
J. Parallel Distributed Comput.
Long Cheng, Spyros Kotoulas, Qingzhi Liu, Ying Wang
2019 J jnl
MV-Net: Toward Real-Time Deep Learning on Mobile GPGPU Systems.
ACM J. Emerg. Technol. Comput. Syst.
Yibin Tang, Ying Wang, Huawei Li, Xiaowei Li
2019 J jnl
Modeling of Mixing Uniformity for Food With Special Medicinal Purposes Based on Chinese Herbal Medicine.
IEEE Access
Ke Han, Lei Zhang, Ying Wang, Miao Wang, Mian Guo, Huan Li, Yu Zhang, Ming Zhao, Qian Zhao, Chunyu Wang, Rui Zhang
2019 — conf
OBFS: OpenCL Based BFS Optimizations on Software Programmable FPGAs.
FPT
Cheng Liu, Xinyu Chen, Bingsheng He, Xiaofei Liao, Ying Wang, Lei Zhang
2019 — conf
P
ASP-DAC
Wen Li, Ying Wang, Huawei Li, Xiaowei Li
2019 J jnl
PIMSim: A Flexible and Detailed Processing-in-Memory Simulator.
IEEE Comput. Archit. Lett.
Sheng Xu, Xiaoming Chen, Ying Wang, Yinhe Han, Xuehai Qian, Xiaowei Li
2019 C conf
RRAMedy: Protecting ReRAM-Based Neural Network from Permanent and Soft Faults During Its Lifetime.
ICCD
Wen Li, Ying Wang, Huawei Li, Xiaowei Li
2019 — conf
Resilient Neural Network Training for Accelerators with Computing Errors.
ASAP
Dawen Xu, KouZi Xing, Cheng Liu, Ying Wang, Yulin Dai, Long Cheng, Huawei Li, Lei Zhang
2019 — conf
Simulate-the-hardware: training accurate binarized neural networks for low-precision neural accelerators.
ASP-DAC
Jiajun Li, Ying Wang, Bosheng Liu, Yinhe Han, Xiaowei Li
2019 — conf
Squeezing the Last MHz for CNN Acceleration on FPGAs.
ITC-Asia
Li Li, Dawen Xu, KouZi Xing, Cheng Liu, Ying Wang, Huawei Li, Xiaowei Li
2019 A* conf
Systolic Cube: A Spatial 3D CNN Accelerator Architecture for Low Power Video Analysis.
DAC
Yongchen Wang, Ying Wang, Huawei Li, Cong Shi, Xiaowei Li
2019 J jnl
Thread: Towards fine-grained precision reconfiguration in variable-precision neural network accelerator.
IEICE Electron. Express
Shichang Zhang, Ying Wang, Xiaoming Chen, Yinhe Han, Yujie Wang, Xiaowei Li
2018 J jnl
A Case of On-Chip Memory Subsystem Design for Low-Power CNN Accelerators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Ying Wang, Huawei Li, Xiaowei Li
2018 J jnl
A Low Overhead In-Network Data Compressor for the Memory Hierarchy of Chip Multiprocessors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Ying Wang, Huawei Li, Yinhe Han, Xiaowei Li
2018 A conf
A retrospective evaluation of energy-efficient object detection solutions on embedded devices.
DATE
Ying Wang, Zhenyu Quan, Jiajun Li, Yinhe Han, Huawei Li, Xiaowei Li
2018 — conf
Caching or Not: Rethinking Virtual File System for Non-Volatile Main Memory.
HotStorage
Ying Wang, Dejun Jiang, Jin Xiong
2018 A* conf
Dadu-P: a scalable accelerator for robot motion planning in a dynamic environment.
DAC
Shiqi Lian, Yinhe Han, Xiaoming Chen, Ying Wang, Hang Xiao
2018 J jnl
DimRouter: A Multi-Mode Router Architecture for Higher Energy-Proportionality of On-Chip Networks.
J. Comput. Sci. Technol.
Shiqi Lian, Ying Wang, Yinhe Han
2018 J jnl
Exploiting Lightweight Statistical Learning for Event-Based Vision Processing.
IEEE Access
Cong Shi, Jiajun Li, Ying Wang, Gang Luo
2018 A conf
FCN-engine: accelerating deconvolutional layers in classic CNN processors.
ICCAD
Dawen Xu, Kaijie Tu, Ying Wang, Cheng Liu, Bingsheng He, Huawei Li
2018 J jnl
Fault tolerance on-chip: a reliable computing paradigm using self-test, self-diagnosis, and self-repair (3S) approach.
Sci. China Inf. Sci.
Xiaowei Li, Guihai Yan, Jing Ye, Ying Wang
2018 — conf
Leveraging DRAM Refresh to Protect the Memory Timing Channel of Cloud Chip Multi-processors.
ITC-Asia
Ying Wang, Wen Li, Huawei Li, Xiaowei Li
2018 A conf
Lightweight Timing Channel Protection for Shared DRAM Controller.
ITC
Ying Wang, Wen Li, Huawei Li, Xiaowei Li
2018 — conf
MTTF-Aware Reliability Task Scheduling for PIM-Based Heterogeneous Computing System.
ITC-Asia
Desong Pang, Dawen Xu, Ying Wang, Huaguo Liang
2018 C conf
NEAR: A Novel Energy Aware Replacement Policy for STT-MRAM LLCs.
ISCAS
Chen Liu, Yuanqing Cheng, Ying Wang, Youguang Zhang, Weisheng Zhao
2018 J jnl
On Trace Buffer Reuse-Based Trigger Generation in Post-Silicon Debug.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yun Cheng, Huawei Li, Ying Wang, Haihua Shen, Bo Liu, Xiaowei Li
2018 — conf
PIMCH: Cooperative memory prefetching in processing-in-memory architecture.
ASP-DAC
Sheng Xu, Ying Wang, Yinhe Han, Xiaowei Li
2018 — conf
XORiM: A case of in-memory bit-comparator implementation and its performance implications.
ASP-DAC
Kaiwei Zou, Ying Wang, Huawei Li, Xiaowei Li
2017 B conf
A Coflow-Based Co-Optimization Framework for High-Performance Data Analytics.
ICPP
Long Cheng, Ying Wang, Yulong Pei, Dick H. J. Epema
2017 — conf
ApproxPIM: Exploiting realistic 3D-stacked DRAM for energy-efficient processing in-memory.
ASP-DAC
Yibin Tang, Ying Wang, Huawei Li, Xiaowei Li
2017 — conf
BoDNoC: Providing bandwidth-on-demand interconnection for multi-granularity memory systems.
ASP-DAC
Shiqi Lian, Ying Wang, Yinhe Han, Xiaowei Li
2017 — conf
CNN-based object detection solutions for embedded heterogeneous multicore SoCs.
ASP-DAC
Cheng Wang, Ying Wang, Yinhe Han, Lili Song, Zhenyu Quan, Jiajun Li, Xiaowei Li
2017 A conf
Cross-program design space exploration by ensemble transfer learning.
ICCAD
Dandan Li, Shuzhen Yao, Senzhang Wang, Ying Wang
2017 A* conf
Dadu: Accelerating Inverse Kinematics for High-DOF Robots.
DAC
Shiqi Lian, Yinhe Han, Ying Wang, Yungang Bao, Hang Xiao, Xiaowei Li, Ninghui Sun
2017 Misc conf
Flip-flop clustering based trace signal selection for post-silicon debug.
VTS
Yun Cheng, Huawei Li, Ying Wang, Yingke Gao, Bo Liu, Xiaowei Li
2017 J jnl
Power-Utility-Driven Write Management for MLC PCM.
ACM J. Emerg. Technol. Comput. Syst.
Bing Li, Yu Hu, Ying Wang, Jing Ye, Xiaowei Li
2017 A* conf
Real-Time Meets Approximate Computing: An Elastic CNN Inference Accelerator with Adaptive Trade-off between QoS and QoR.
DAC
Ying Wang, Huawei Li, Xiaowei Li
2017 J jnl
Resilience-Aware Frequency Tuning for Neural-Network-Based Approximate Computing Chips.
IEEE Trans. Very Large Scale Integr. Syst.
Ying Wang, Jiachao Deng, Yuntan Fang, Huawei Li, Xiaowei Li
2017 J jnl
Retention-Aware DRAM Assembly and Repair for Future FGR Memories.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Ying Wang, Yinhe Han, Cheng Wang, Huawei Li, Xiaowei Li
2017 J jnl
STT-RAM Buffer Design for Precision-Tunable General-Purpose Neural Network Accelerator.
IEEE Trans. Very Large Scale Integr. Syst.
Lili Song, Ying Wang, Yinhe Han, Huawei Li, Yuanqing Cheng, Xiaowei Li
2017 — conf
Selective off-loading to Memory: Task Partitioning and Mapping for PIM-enabled Heterogeneous Systems.
Conf. Computing Frontiers
Dawen Xu, Yi Liao, Ying Wang, Huawei Li, Xiaowei Li
2017 — conf
Test and Reliability of Emerging Non-volatile Memories.
ATS
Said Hamdioui, Peyman Pouyan, Huawei Li, Ying Wang, Arijit Raychowdhury, Insik Yoon
2017 A conf
Thermosiphon: A thermal aware NUCA architecture for write energy reduction of the STT-MRAM based LLCs.
ICCAD
Bi Wu, Yuanqing Cheng, Pengcheng Dai, Jianlei Yang, Youguang Zhang, Dijun Liu, Ying Wang, Weisheng Zhao
2016 A* conf
C-brain: a deep learning accelerator that tames the diversity of CNNs through adaptive data-level parallelization.
DAC
Lili Song, Ying Wang, Yinhe Han, Xin Zhao, Bosheng Liu, Xiaowei Li
2016 A* conf
DISCO: a low overhead in-network data compressor for energy-efficient chip multi-processors.
DAC
Ying Wang, Yinhe Han, Jun Zhou, Huawei Li, Xiaowei Li
2016 A* conf
DeepBurning: automatic generation of FPGA-based learning accelerators for the neural network family.
DAC
Ying Wang, Jie Xu, Yinhe Han, Huawei Li, Xiaowei Li
2016 J jnl
Enhanced Wear-Rate Leveling for PRAM Lifetime Improvement Considering Process Variation.
IEEE Trans. Very Large Scale Integr. Syst.
Yinhe Han, Jianbo Dong, Kaiheng Weng, Ying Wang, Xiaowei Li
2016 A conf
Frequency scheduling for resilient chip multi-processors operating at Near Threshold Voltage.
DATE
Ying Wang, Huawei Li, Xiaowei Li
2016 J jnl
PSI Conscious Write Scheduling: Architectural Support for Reliable Power Delivery in 3-D Die-Stacked PCM.
IEEE Trans. Very Large Scale Integr. Syst.
Ying Wang, Yinhe Han, Huawei Li, Lei Zhang, Yuanqing Cheng, Xiaowei Li
2016 A conf
Re-architecting the on-chip memory sub-system of machine-learning accelerator for embedded devices.
ICCAD
Ying Wang, Huawei Li, Xiaowei Li
2016 J jnl
VANUCA: Enabling Near-Threshold Voltage Operation in Large-Capacity Cache.
IEEE Trans. Very Large Scale Integr. Syst.
Ying Wang, Yinhe Han, Huawei Li, Xiaowei Li
2015 — conf
A Lightweight Timing Channel Protection for Shared Memory Controllers.
ATS
Guopei Liu, Ying Wang, Sen Li, Huawei Li, Xiaowei Li
2015 — conf
A Similarity Based Circuit Partitioning and Trimming Method to Defend against Hardware Trojans.
ISVLSI
Yun Cheng, Ying Wang, Huawei Li, Xiaowei Li
2015 C conf
A case of precision-tunable STT-RAM memory design for approximate neural network.
ISCAS
Ying Wang, Lili Song, Yinhe Han, Yuanqing Cheng, Huawei Li, Xiaowei Li
2015 J jnl
A signal degradation reduction method for memristor ratioed logic (MRL) gates.
IEICE Electron. Express
Bosheng Liu, Ying Wang, Zhiqiang You, Yinhe Han, Xiaowei Li
2015 — conf
An architecture-level cache simulation framework supporting advanced PMA STT-MRAM.
NANOARCH
Bi Wu, Yuanqing Cheng, Ying Wang, Aida Todri-Sanial, Guangyu Sun, Lionel Torres, Weisheng Zhao
2015 J jnl
Data Remapping for Static NUCA in Degradable Chip Multiprocessors.
IEEE Trans. Very Large Scale Integr. Syst.
Ying Wang, Lei Zhang, Yinhe Han, Huawei Li, Xiaowei Li
2015 J jnl
Economizing TSV Resources in 3-D Network-on-Chip Design.
IEEE Trans. Very Large Scale Integr. Syst.
Ying Wang, Yinhe Han, Lei Zhang, Binzhang Fu, Cheng Liu, Huawei Li, Xiaowei Li
2015 A* conf
ProPRAM: exploiting the transparent logic resources in non-volatile memory for near data computing.
DAC
Ying Wang, Yinhe Han, Lei Zhang, Huawei Li, Xiaowei Li
2015 J jnl
RISO: Enforce Noninterfered Performance With Relaxed Network-on-Chip Isolation in Many-Core Cloud Processors.
IEEE Trans. Very Large Scale Integr. Syst.
Hang Lu, Binzhang Fu, Ying Wang, Yinhe Han, Guihai Yan, Xiaowei Li
2015 A conf
Retraining-based timing error mitigation for hardware neural networks.
DATE
Jiachao Deng, Yuntan Fang, Zidong Du, Ying Wang, Huawei Li, Olivier Temam, Paolo Ienne, David Novo, Xiaowei Li, Yunji Chen, Chengyong Wu
2015 — conf
ShuttleNoC: Boosting on-chip communication efficiency by enabling localized power adaptation.
ASP-DAC
Hang Lu, Guihai Yan, Yinhe Han, Ying Wang, Xiaowei Li
2015 — conf
TURO: A lightweight turn-guided routing scheme for 3D NoCs.
COOL Chips
Jun Zhou, Huawei Li, Tiancheng Wang, Ying Wang, Xiaowei Li
2015 — conf
TWiN: A Turn-Guided Reliable Routing Scheme for Wireless 3D NoCs.
ATS
Jun Zhou, Huawei Li, Tiancheng Wang, Sen Li, Ying Wang, Xiaowei Li
2014 — conf
A low power DRAM refresh control scheme for 3D memory cube.
COOL Chips
Ying Wang, Yinhe Han, Huawei Li
2014 A conf
Data-aware DRAM refresh to squeeze the margin of retention time in hybrid memory cube.
ICCAD
Yinhe Han, Ying Wang, Huawei Li, Xiaowei Li
2014 J jnl
Reinventing Memory System Design for Many-Accelerator Architecture.
J. Comput. Sci. Technol.
Ying Wang, Lei Zhang, Yinhe Han, Huawei Li
2013 C conf
Enabling Near-Threshold Voltage(NTV) operation in Multi-VDD cache for power reduction.
ISCAS
Yinhe Han, Ying Wang, Huawei Li, Xiaowei Li
2011 A conf
Flex memory: Exploiting and managing abundant off-chip optical bandwidth.
DATE
Ying Wang, Lei Zhang, Yinhe Han, Huawei Li, Xiaowei Li
2011 B conf
Scheduling Mixed Real-Time and Non-real-Time Applications in MapReduce Environment.
ICPADS
Xicheng Dong, Ying Wang, Huaming Liao
2011 A* conf
Wear rate leveling: lifetime enhancement of PRAM with endurance variation.
DAC
Jianbo Dong, Lei Zhang, Yinhe Han, Ying Wang, Xiaowei Li
2010 C conf
Address Remapping for Static NUCA in NoC-Based Degradable Chip-Multiprocessors.
PRDC
Ying Wang, Lei Zhang, Yinhe Han, Huawei Li, Xiaowei Li
2006 — conf
Efficient Filtering Query Indexing in Data Stream.
WISE Workshops
Ying Wang, Shuo Bai, Jianlong Tan, Li Guo