Yibin Ye

47 papers A* 5A 1C 2Journal 25Unranked 14
YearRankTypeTitle / Venue / Authors
2026 J jnl
Scale-Aware UAV-to-Satellite Cross-View Geo-Localization: A Semantic Geometric Approach.
CoRR
Yibin Ye, Shuo Chen, Kun Wang, Xiaokai Song, Jisheng Dang, Qifeng Yu, Xichao Teng, Zhang Li
2025 J jnl
3MOS: a multi-source, multi-resolution, and multi-scene optical-SAR dataset with insights for multi-modal image matching.
Vis. Intell.
Yibin Ye, Xichao Teng, Hongrui Yang, Shuo Chen, Yuli Sun, Yijie Bian, Tao Tan, Zhang Li, Qifeng Yu
2025 J jnl
Cross transformer for LiDAR-based loop closure detection.
Mach. Vis. Appl.
Rui Zheng, Yang Ren, Qi Zhou, Yibin Ye, Hui Zeng
2025 J jnl
Exploring the best way for UAV visual localization under Low-altitude Multi-view Observation Condition: a Benchmark.
CoRR
Yibin Ye, Xichao Teng, Shuo Chen, Zhang Li, Leqi Liu, Qifeng Yu, Tao Tan
2025 J jnl
LiDAR odometry method based on multi-scale fusion and semantic enhancement.
Robotics Auton. Syst.
Yibin Ye, Yang Ren, Yiming Fan, Yiyou Liang, Hui Zeng
2024 J jnl
3MOS: Multi-sources, Multi-resolutions, and Multi-scenes dataset for Optical-SAR image matching.
CoRR
Yibin Ye, Xichao Teng, Shuo Chen, Yijie Bian, Tao Tan, Zhang Li
2024 J jnl
An adaptive network fusing light detection and ranging height-sliced bird's-eye view and vision for place recognition.
Eng. Appl. Artif. Intell.
Rui Zheng, Zuo Jiang, Yibin Ye, Yang Ren, Hui Zeng, Junwei Li, Zhiyuan Zhang
2024 J jnl
Fast and Robust Optical-to-SAR Remote Sensing Image Registration Using Region-Aware Phase Descriptor.
IEEE Trans. Geosci. Remote. Sens.
Yibin Ye, Qinwei Wang, Hong Zhao, Xichao Teng, Yijie Bian, Zhang Li
2018 — conf
A unified scheme of text localization and structured data extraction for joint OCR and data mining.
IEEE BigData
Yibin Ye, Shenggao Zhu, Jing Wang, Qi Du, Yezhang Yang, Dandan Tu, Lanjun Wang, Jiebo Luo
2016 J jnl
Analysis for TCP in data center networks: Outcast and Incast.
J. Netw. Comput. Appl.
Yang Qin, Weihong Yang, Yibin Ye, Yao Shi
2016 J jnl
Combined channel assignment and network coded opportunistic routing in cognitive radio networks.
Comput. Electr. Eng.
Yang Qin, Xiaoxiong Zhong, Yuanyuan Yang, Li Li, Yibin Ye
2015 J jnl
An environment aware epidemic spreading model and immune strategy in complex networks.
Appl. Math. Comput.
Yang Qin, Xiaoxiong Zhong, Hao Jiang, Yibin Ye
2015 J jnl
Opportunistic routing with admission control in wireless ad hoc networks.
Comput. Commun.
Yang Qin, Li Li, Xiaoxiong Zhong, Yuanyuan Yang, Yibin Ye
2015 J jnl
QR factorization based Incremental Extreme Learning Machine with growth of hidden nodes.
Pattern Recognit. Lett.
Yibin Ye, Yang Qin
2013 — conf
Learning Capabilities of ELM-Trained Time-Varying Neural Networks.
WIRN
Stefano Squartini, Yibin Ye, Francesco Piazza
2013 J jnl
Online sequential extreme learning machine in nonstationary environments.
Neurocomputing
Yibin Ye, Stefano Squartini, Francesco Piazza
2011 — conf
ELM-Based Time-Variant Neural Networks with Incremental Number of Output Basis Functions.
ISNN (1)
Yibin Ye, Stefano Squartini, Francesco Piazza
2011 — conf
ELM-based Algorithms for Nonstationary Volterra System Identification.
WIRN
Yibin Ye, Stefano Squartini, Francesco Piazza
2011 — conf
On-Line Extreme Learning Machine for Training Time-Varying Neural Networks.
ICIC (3)
Yibin Ye, Stefano Squartini, Francesco Piazza
2010 — conf
A Group Selection Evolutionary Extreme Learning Machine approach for Time-Variant Neural Networks.
WIRN
Yibin Ye, Stefano Squartini, Francesco Piazza
2010 — conf
Incremental-Based Extreme Learning Machine Algorithms for Time-Variant Neural Networks.
ICIC (1)
Yibin Ye, Stefano Squartini, Francesco Piazza
2009 J jnl
2 GHz 2 Mb 2T Gain Cell Memory Macro With 128 GBytes/sec Bandwidth in a 65 nm Logic Process Technology.
IEEE J. Solid State Circuits
Dinesh Somasekhar, Yibin Ye, Paolo A. Aseron, Shih-Lien Lu, Muhammad M. Khellah, Jason Howard, Gregory Ruhl, Tanay Karnik, Shekhar Borkar, Vivek K. De, Ali Keshavarzi
2009 — conf
EasyFace: a realistic face modeling and facial animation authoring system.
VRCAI
Yibin Ye, Mingmin Zhang, Huansen Li, Ruiying Jiang, Xing Tang, Zhigeng Pan
2009 J jnl
Photo Realistic 3D Cartoon Face Modeling Based on Active Shape Model.
Trans. Edutainment
Zhigeng Pan, Huansen Li, Mingmin Zhang, Yibin Ye, Xi Cheng, Alvin Tang, Ruigang Yang
2009 J jnl
Process, Temperature, and Supply-Noise Tolerant 45nm Dense Cache Arrays With Diffusion-Notch-Free (DNF) 6T SRAM Cells and Dynamic Multi-Vcc Circuits.
IEEE J. Solid State Circuits
Muhammad M. Khellah, Nam-Sung Kim, Yibin Ye, Dinesh Somasekhar, Tanay Karnik, Nitin Borkar, Gunjan Pandya, Fatih Hamzaoglu, Tom Coan, Yih Wang, Kevin Zhang, Clair Webb, Vivek De
2008 — conf
2GHz 2Mb 2T Gain-Cell Memory Macro with 128GB/s Bandwidth in a 65nm Logic Process.
ISSCC
Dinesh Somasekhar, Yibin Ye, Paolo A. Aseron, Shih-Lien Lu, Muhammad M. Khellah, Jason Howard, Gregory Ruhl, Tanay Karnik, Shekhar Y. Borkar, Vivek De, Ali Keshavarzi
2008 J jnl
Skewed Repeater Bus: A Low-Power Scheme for On-Chip Buses.
IEEE Trans. Circuits Syst. I Regul. Pap.
Maged Ghoneima, Muhammad M. Khellah, James W. Tschanz, Yibin Ye, Nasser A. Kurd, Javed Barkatullah, Srikanth Nimmagadda, Yehea I. Ismail, Vivek K. De
2007 J jnl
A 256-Kb Dual-V
IEEE J. Solid State Circuits
Muhammad M. Khellah, Dinesh Somasekhar, Yibin Ye, Nam-Sung Kim, Jason Howard, Gregory Ruhl, Murad Sunna, James W. Tschanz, Nitin Borkar, Fatih Hamzaoglu, Gunjan Pandya, Ali Farhang, Kevin Zhang, Vivek De
2006 — conf
A 4.2GHz 0.3mm2 256kb Dual-V
ISSCC
Muhammad M. Khellah, Nam-Sung Kim, Jason Howard, Gregory Ruhl, Yibin Ye, James W. Tschanz, Dinesh Somasekhar, Nitin Borkar, Fatih Hamzaoglu, Gunjan Pandya, Ali Farhang, Kevin Zhang, Vivek De
2006 C conf
Evaluation of differential vs. single-ended sensing and asymmetric cells in 90 nm logic technology for on-chip caches.
ISCAS
Yibin Ye, Muhammad M. Khellah, Dinesh Somasekhar, Vivek De
2005 C conf
A Skewed Repeater Bus Architecture for On-Chip Energy Reduction in Microprocessors.
ICCD
Muhammad M. Khellah, Maged Ghoneima, James W. Tschanz, Yibin Ye, Nasser A. Kurd, Javed Barkatullah, Srikanth Nimmagadda, Yehea I. Ismail
2005 — conf
Skewing adjacent line repeaters to reduce the delay and energy dissipation of on-chip buses.
ISCAS (1)
Yehea I. Ismail, Muhammad M. Khellah, Maged Ghoneima, James W. Tschanz, Yibin Ye, Vivek De
2004 A* conf
Design optimizations for microprocessors at low temperature.
DAC
Arman Vassighi, Ali Keshavarzi, Siva G. Narendra, Gerhard Schrom, Yibin Ye, Seri Lee, Greg Chrysler, Manoj Sachdev, Vivek De
2003 J jnl
A 6-GHz 16-kB L1 cache in a 100-nm dual-V
IEEE J. Solid State Circuits
Yibin Ye, Muhammad M. Khellah, Dinesh Somasekhar, Ali Farhang, Vivek De
2003 J jnl
Dynamic sleep transistor and body bias for active leakage power control of microprocessors.
IEEE J. Solid State Circuits
James W. Tschanz, Siva G. Narendra, Yibin Ye, Bradley A. Bloechel, Shekhar Borkar, Vivek De
2002 J jnl
5-GHz 32-bit integer execution core in 130-nm dual-V
IEEE J. Solid State Circuits
Sriram R. Vangal, Mark A. Anders, Nitin Borkar, Erik Seligman, Venkatesh Govindarajulu, Vasantha Erraguntla, Howard Wilson, Amaresh Pangal, Venkat Veeramachaneni, James W. Tschanz, Yibin Ye, Dinesh Somasekhar, Bradley A. Bloechel, Gregory E. Dermer, Ram K. Krishnamurthy, Krishnamurthy Soumyanath, Sanu Mathew, Siva G. Narendra, Mircea R. Stan, Scott Thompson, Vivek De, Shekhar Borkar
2002 J jnl
Analysis of dual-V
IEEE Trans. Very Large Scale Integr. Syst.
Fatih Hamzaoglu, Yibin Ye, Ali Keshavarzi, Kevin Zhang, Siva G. Narendra, Shekhar Borkar, Mircea R. Stan, Vivek De
2002 A* conf
Total power optimization by simultaneous dual-Vt allocation and device sizing in high performance microprocessors.
DAC
Tanay Karnik, Yibin Ye, James W. Tschanz, Liqiong Wei, Steven M. Burns, Venkatesh Govindarajulu, Vivek De, Shekhar Borkar
2001 J jnl
QSERL: quasi-static energy recovery logic.
IEEE J. Solid State Circuits
Yibin Ye, Kaushik Roy
2000 A* conf
Dynamic noise analysis in precharge-evaluate circuits.
DAC
Dinesh Somasekhar, Seung Hoon Choi, Kaushik Roy, Yibin Ye, Vivek De
1999 J jnl
Design and optimization of dual-threshold circuits for low-voltage low-power applications.
IEEE Trans. Very Large Scale Integr. Syst.
Liqiong Wei, Zhanping Chen, Kaushik Roy, Mark C. Johnson, Yibin Ye, Vivek De
1999 A* conf
Mixed-
DAC
Liqiong Wei, Zhanping Chen, Kaushik Roy, Yibin Ye, Vivek De
1999 — conf
Power Consumption in XOR-Based Circuits.
ASP-DAC
Yibin Ye, Kaushik Roy, Rolf Drechsler
1998 — conf
Estimation of average switching power under accurate modeling of signal correlations.
CICC
Zhanping Chen, Kaushik Roy, Yibin Ye
1997 A* conf
A Graph-Based Synthesis Algorithm for AND/XOR Networks.
DAC
Yibin Ye, Kaushik Roy
1997 — conf
Efficient synthesis of AND/XOR networks.
ASP-DAC
Yibin Ye, Kaushik Roy
1997 A conf
Quasi-static energy recovery logic and supply-clock generation circuits.
ISLPED
Yibin Ye, Kaushik Roy, Georgios I. Stamoulis