Yi-Chun Shih

18 papers Journal 7Unranked 11
YearRankTypeTitle / Venue / Authors
2024 — conf
15.9 A 16nm 16Mb Embedded STT-MRAM with a 20ns Write Time, a 10
ISSCC
Ku-Feng Lin, Hiroki Noguchi, Yi-Chun Shih, Perng-Fei Yuh, Yuan-Jen Lee, Tung-Cheng Chang, Sheng-Po Huang, Yu-Fan Lin, Chun-Ying Lee, Yen-Hsiang Huang, Jui-Che Tsai, Saman Adham, Peter Noel, Ramin Yazdi, Marat Gershoig, YangJae Shin, Vineet Joshi, Ted Wong, Meng-Ru Jiang, J. J. Wu, Chun-Tai Cheng, Yu-Jen Wang, Harry Chuang, Yu-Der Chih, Yih Wang, Tsung-Yung Jonathan Chang
2023 — conf
A 16nm 32Mb Embedded STT-MRAM with a 6ns Read-Access Time, a 1M-Cycle Write Endurance, 20-Year Retention at 150°C and MTJ-OTP Solutions for Magnetic Immunity.
ISSCC
Po-Hao Lee, Chia-Fu Lee, Yi-Chun Shih, Hon-Jarn Lin, Yen-An Chang, Cheng-Han Lu, Yu-Lin Chen, Chieh-Pu Lo, Chung-Chieh Chen, Cheng-Hsiung Kuo, Tan-Li Chou, Chia-Yu Wang, J. J. Wu, Roger Wang, Harry Chuang, Yih Wang, Yu-Der Chih, Tsung-Yung Jonathan Chang
2022 — conf
A 12nm 121-TOPS/W 41.6-TOPS/mm2 All Digital Full Precision SRAM-based Compute-in-Memory with Configurable Bit-width For AI Edge Applications.
VLSI Technology and Circuits
Chia-Fu Lee, Cheng-Han Lu, Cheng-En Lee, Haruki Mori, Hidehiro Fujiwara, Yi-Chun Shih, Tan-Li Chou, Yu-Der Chih, Tsung-Yung Jonathan Chang
2022 J jnl
A 22-nm 1-Mb 1024-b Read Data-Protected STT-MRAM Macro With Near-Memory Shift-and-Rotate Functionality and 42.6-GB/s Read Bandwidth for Security-Aware Mobile Device.
IEEE J. Solid State Circuits
Yen-Cheng Chiu, Tung-Cheng Chang, Chun-Ying Lee, Je-Min Hung, Kuang-Tang Chang, Cheng-Xin Xue, Ssu-Yen Wu, Hui-Yao Kao, Peng Chen, Hsiao-Yu Huang, Shih-Hsih Teng, Chieh-Pu Lo, Yi-Chun Shih, Yu-Der Chih, Tsung-Yung Jonathan Chang, Yier Jin, Meng-Fan Chang
2021 — conf
An 89TOPS/W and 16.3TOPS/mm
ISSCC
Yu-Der Chih, Po-Hao Lee, Hidehiro Fujiwara, Yi-Chun Shih, Chia-Fu Lee, Rawan Naous, Yu-Lin Chen, Chieh-Pu Lo, Cheng-Han Lu, Haruki Mori, Wei-Cheng Zhao, Dar Sun, Mahmut E. Sinangil, Yen-Huei Chen, Tan-Li Chou, Kerem Akarvardar, Hung-Jen Liao, Yih Wang, Meng-Fan Chang, Tsung-Yung Jonathan Chang
2020 — conf
13.3 A 22nm 32Mb Embedded STT-MRAM with 10ns Read Speed, 1M Cycle Write Endurance, 10 Years Retention at 150°C and High Immunity to Magnetic Field Interference.
ISSCC
Yu-Der Chih, Yi-Chun Shih, Chia-Fu Lee, Yen-An Chang, Po-Hao Lee, Hon-Jarn Lin, Yu-Lin Chen, Chieh-Pu Lo, Meng-Chun Shih, Kuei-Hung Shen, Harry Chuang, Tsung-Yung Jonathan Chang
2019 J jnl
A 1-Mb 28-nm 1T1MTJ STT-MRAM With Single-Cap Offset-Cancelled Sense Amplifier and In Situ Self-Write-Termination.
IEEE J. Solid State Circuits
Qing Dong, Zhehong Wang, Jongyup Lim, Yiqun Zhang, Mahmut E. Sinangil, Yi-Chun Shih, Yu-Der Chih, Tsung-Yung Jonathan Chang, David T. Blaauw, Dennis Sylvester
2019 J jnl
Logic Process Compatible 40-nm 16-Mb, Embedded Perpendicular-MRAM With Hybrid-Resistance Reference, Sub- $\mu$ A Sensing Resolution, and 17.5-nS Read Access Time.
IEEE J. Solid State Circuits
Yi-Chun Shih, Chia-Fu Lee, Yen-An Chang, Po-Hao Lee, Hon-Jarn Lin, Yu-Lin Chen, Ku-Feng Lin, Ta-Ching Yeh, Hung-Chang Yu, Harry Chuang, Yu-Der Chih, Tsung-Yung Jonathan Chang
2019 — conf
Recent Progress and Next Directions for Embedded MRAM Technology.
VLSI Circuits
William J. Gallagher, Eric Chien, Tien-Wei Chiang, Jian-Cheng Huang, Meng-Chun Shih, C. Y. Wang, Christine Bair, George Lee, Yi-Chun Shih, Chia-Fu Lee, Roger Wang, Kuei-Hung Shen, J. J. Wu, Wayne Wang, Harry Chuang
2018 — conf
A 1Mb 28nm STT-MRAM with 2.8ns read access time at 1.2V VDD using single-cap offset-cancelled sense amplifier and in-situ self-write-termination.
ISSCC
Qing Dong, Zhehong Wang, Jongyup Lim, Yiqun Zhang, Yi-Chun Shih, Yu-Der Chih, Tsung-Yung Jonathan Chang, David T. Blaauw, Dennis Sylvester
2018 — conf
A 28NM Integrated True Random Number Generator Harvesting Entropy from MRAM.
VLSI Circuits
Kaiyuan Yang, Qing Dong, Zhehong Wang, Yi-Chun Shih, Yu-Der Chih, Tsung-Yung Jonathan Chang, David T. Blaauw, Dennis Sylvester
2018 — conf
Logic Process Compatible 40NM 16MB, Embedded Perpendicular-MRAM with Hybrid-Resistance Reference, Sub-μA Sensing Resolution, and 17.5NS Read Access Time.
VLSI Circuits
Yi-Chun Shih, Chia-Fu Lee, Yen-An Chang, Po-Hao Lee, Hon-Jarn Lin, Yu-Lin Chen, Ku-Feng Lin, Ta-Ching Yeh, Hung-Chang Yu, Harry Chuang, Yu-Der Chih, Tsung-Yung Jonathan Chang
2016 J jnl
Enabling Wide Autonomous DVFS in a 22 nm Graphics Execution Core Using a Digitally Controlled Fully Integrated Voltage Regulator.
IEEE J. Solid State Circuits
Stephen T. Kim, Yi-Chun Shih, Kaushik Mazumdar, Rinkle Jain, Joseph F. Ryan, Carlos Tokunaga, Charles Augustine, Jaydeep P. Kulkarni, Krishnan Ravichandran, James W. Tschanz, Muhammad M. Khellah, Vivek De
2015 — conf
8.6 Enabling wide autonomous DVFS in a 22nm graphics execution core using a digitally controlled hybrid LDO/switched-capacitor VR with fast droop mitigation.
ISSCC
Stephen T. Kim, Yi-Chun Shih, Kaushik Mazumdar, Rinkle Jain, Joseph F. Ryan, Carlos Tokunaga, Charles Augustine, Jaydeep P. Kulkarni, Krishnan Ravichandran, James W. Tschanz, Muhammad M. Khellah, Vivek De
2014 — conf
5.7 A graphics execution core in 22nm CMOS featuring adaptive clocking, selective boosting and state-retentive sleep.
ISSCC
Carlos Tokunaga, Joseph F. Ryan, Charles Augustine, Jaydeep P. Kulkarni, Yi-Chun Shih, Stephen T. Kim, Rinkle Jain, Keith A. Bowman, Arijit Raychowdhury, Muhammad M. Khellah, James W. Tschanz, Vivek De
2013 J jnl
An On-Chip Tunable Frequency Generator for Crystal-Less Low-Power WBAN Radio.
IEEE Trans. Circuits Syst. II Express Briefs
Yi-Chun Shih, Brian P. Otis
2011 J jnl
A 2.3 μ W Wireless Intraocular Pressure/Temperature Monitor.
IEEE J. Solid State Circuits
Yi-Chun Shih, Tueng Shen, Brian P. Otis
2011 J jnl
An Inductorless DC-DC Converter for Energy Harvesting With a 1.2-µW Bandgap-Referenced Output Controller.
IEEE Trans. Circuits Syst. II Express Briefs
Yi-Chun Shih, Brian P. Otis