Yi-Chieh Huang

12 papers Journal 5Unranked 7
YearRankTypeTitle / Venue / Authors
2025 J jnl
Evaluating circular economy performance in the global chemical sector: a dynamic network Data Envelopment Analysis model approach.
INFOR Inf. Syst. Oper. Res.
Shih-Fang Lo, Wen-Min Lu, Irene Wei Kiong Ting, Shiu-Wan Hung, Yi-Chieh Huang, Wei-Ting Luo
2021 J jnl
Estimating the Critical Parameter in Almost Stochastic Dominance from Insurance Deductibles.
Manag. Sci.
Yi-Chieh Huang, Kamhon Kan, Larry Y. Tzeng, Kili C. Wang
2020 — conf
6.2 A 460mW 112Gb/s DSP-Based Transceiver with 38dB Loss Compensation for Next-Generation Data Centers in 7nm FinFET Technology.
ISSCC
Tamer A. Ali, Ehung Chen, Henry Park, Ramy Yousry, Yu-Ming Ying, Mohammed Abdullatif, Miguel Gandara, Chun-Cheng Liu, Po-Shuan Weng, Huan-Sheng Chen, Mohammad Elbadry, Qaiser Nehal, Kun-Hung Tsai, Kevin Tan, Yi-Chieh Huang, Chung-Hsien Tsai, Yuyun Chang, Yuan-Hao Tung
2019 — conf
A 180mW 56Gb/s DSP-Based Transceiver for High Density IOs in Data Center Switches in 7nm FinFET Technology.
ISSCC
Tamer A. Ali, Ramy Yousry, Henry Park, Ehung Chen, Po-Shuan Weng, Yi-Chieh Huang, Chun-Cheng Liu, Chien-Hua Wu, Shih-Hao Huang, Chungshi Lin, Ke-Chung Wu, Kun-Hung Tsai, Kai-Wen Tan, Ahmed ElShater, Kuang-Ren Chen, Wei-Hao Tsai, Huan-Sheng Chen, Weiyu Leng, Mazen Soliman
2019 — conf
An 8b Injection-Locked Phase Rotator with Dynamic Multiphase Injection for 28/56/112Gb/s Serdes Application.
ISSCC
Yi-Chieh Huang, Bo-Jiun Chen
2015 — conf
A 1V fractional-N PLL with nonlinearity-insensitive modulator.
A-SSCC
Yi-Chieh Huang, Che-Fu Liang, Ping-Ying Wang
2014 — conf
15.3 A 2.4GHz ADPLL with digital-regulated supply-noise-insensitive and temperature-self-compensated ring DCO.
ISSCC
Yi-Chieh Huang, Che-Fu Liang, Hsien-Sheng Huang, Ping-Ying Wang
2013 J jnl
A 2.4-GHz Subharmonically Injection-Locked PLL With Self-Calibrated Injection Timing.
IEEE J. Solid State Circuits
Yi-Chieh Huang, Shen-Iuan Liu
2012 — conf
A 2.4GHz sub-harmonically injection-locked PLL with self-calibrated injection timing.
ISSCC
Yi-Chieh Huang, Shen-Iuan Liu
2012 J jnl
An All-Digital Jitter Tolerance Measurement Technique for CDR Circuits.
IEEE Trans. Circuits Syst. II Express Briefs
Yi-Chieh Huang, Ping-Ying Wang, Shen-Iuan Liu
2011 — conf
A 6Gb/s receiver with 32.7dB adaptive DFE-IIR equalization.
ISSCC
Yi-Chieh Huang, Shen-Iuan Liu
2008 J jnl
Stability and Almost Disturbance Decoupling Analysis of Nonlinear System Subject to Feedback Linearization and Feedforward Neural Network Controller.
IEEE Trans. Neural Networks
Ting-Li Chien, Chung-Cheng Chen, Yi-Chieh Huang, Wen-Jiun Lin