Yasuki Tanabe

12 papers B 1Misc 2Journal 2Unranked 7
YearRankTypeTitle / Venue / Authors
2020 J jnl
A 20.5 TOPS Multicore SoC With DNN Accelerator and Image Signal Processor for Automotive Applications.
IEEE J. Solid State Circuits
Yutaka Yamada, Masato Uchiyama, Masashi Jobashi, Tomohiro Koizumi, Takanori Tamai, Nobuhiro Sato, Jun Tanabe, Katsuyuki Kimura, Yoshinari Ojima, Ryusuke Murakami, Takashi Yoshikawa, Toru Sano, Yasuki Tanabe, Yutaro Ishigaki, Soichiro Hosoda, Fumihiko Hyuga, Akira Moriya, Ryuji Hada, Atsushi Masuda
2019 — conf
A 20.5TOPS and 217.3GOPS/mm
ISSCC
Yutaka Yamada, Toru Sano, Yasuki Tanabe, Yutaro Ishigaki, Soichiro Hosoda, Fumihiko Hyuga, Akira Moriya, Ryuji Hada, Atsushi Masuda, Masato Uchiyama, Tomohiro Koizumi, Takanori Tamai, Nobuhiro Sato, Jun Tanabe, Katsuyuki Kimura, Ryusuke Murakami, Takashi Yoshikawa
2018 — conf
A Power-Efficient Hybrid Architecture Design for Image Recognition Using CNNs.
ISVLSI
Jinhang Choi, Srivatsa Rangachar Srinivasa, Yasuki Tanabe, Jack Sampson, Vijaykrishnan Narayanan
2015 B conf
A scalable architecture for multi-class visual object detection.
FPL
Siddharth Advani, Yasuki Tanabe, Kevin M. Irick, Jack Sampson, Vijaykrishnan Narayanan
2015 — conf
Implementation and evaluation of image recognition algorithm for an intelligent vehicle using heterogeneous multi-core SoC.
ASP-DAC
Nau Ozaki, Masato Uchiyama, Yasuki Tanabe, Shuichi Miyazaki, Takaaki Sawada, Takanori Tamai, Moriyasu Banno
2015 — conf
Visual co-occurrence network: using context for large-scale object recognition in retail.
ESTIMedia
Siddharth Advani, Brigid Smith, Yasuki Tanabe, Kevin M. Irick, Matthew Cotter, Jack Sampson, Vijaykrishnan Narayanan
2012 — conf
A 464GOPS 620GOPS/W heterogeneous multi-core SoC for image-recognition applications.
ISSCC
Yasuki Tanabe, Masato Sumiyoshi, Manabu Nishiyama, Itaru Yamazaki, Shinsuke Fujii, Katsuyuki Kimura, Takuma Aoyama, Moriyasu Banno, Hiroo Hayashi, Takashi Miyamori
2012 — conf
Visconti2 - a heterogeneous multi-core SoC for image-recognition applications.
Hot Chips Symposium
Masato Uchiyama, Hideho Arakida, Yasuki Tanabe, Tsukasa Ike, Takanori Tamai, Moriyasu Banno
2005 Misc conf
Implementation of ISIS-SimpleScalar.
PDPTA
Toshihiro Hanawa, Toshiya Minai, Yasuki Tanabe, Hideharu Amano
2005 J jnl
The performance of SNAIL-2 (a SSS-MIN connected multiprocessor with cache coherent mechanism).
Parallel Comput.
Takashi Midorikawa, Daisuke Shiraishi, Masayoshi Shigeno, Yasuki Tanabe, Toshihiro Hanawa, Hideharu Amano
2004 — conf
Design and Evaluation of a Switch Architecture for Multistage Interconnection Network with Temporary Directory.
PDCS
Masato Sumiyoshi, Takashi Midorikawa, Yasuki Tanabe, Hideharu Amano
2003 Misc conf
Performance Evaluation of 3-Dimensional MIN with Cache Consistency Maintenance Mechanism.
PDPTA
Yasuki Tanabe, Takashi Midorikawa, Daisuke Shiraishi, Masayoshi Shigeno, Toshihiro Hanawa, Hideharu Amano